1 /* 2 * Copyright (c) 1982, 1986 Regents of the University of California. 3 * All rights reserved. The Berkeley software License Agreement 4 * specifies the terms and conditions for redistribution. 5 * 6 * @(#)cpu.h 7.4 (Berkeley) 05/07/88 7 */ 8 9 #ifndef LOCORE 10 /* 11 * Cpu identification, from SID register. 12 */ 13 union cpusid { 14 int cpusid; 15 struct cpuany { 16 u_int :24, 17 cp_type:8; 18 } cpuany; 19 struct cpu8600 { 20 u_int cp_sno:12, /* serial number */ 21 cp_plant:4, /* plant number */ 22 cp_eco:8, /* eco level */ 23 cp_type:8; /* VAX_8600 */ 24 } cpu8600; 25 struct cpu8200 { 26 u_int cp_urev:8, /* ucode rev */ 27 cp_secp:1, /* secondary patch? */ 28 cp_patch:10, /* patch number */ 29 cp_hrev:4, /* hardware rev */ 30 cp_5:1, /* true iff KA825 */ 31 cp_type:8; /* VAX_8200 */ 32 } cpu8200; 33 struct cpu780 { 34 u_int cp_sno:12, /* serial number */ 35 cp_plant:3, /* plant number */ 36 cp_eco:8, /* eco level */ 37 cp_5:1, /* true iff 785 */ 38 cp_type:8; /* VAX_780 */ 39 } cpu780; 40 struct cpu750 { 41 u_int cp_hrev:8, /* hardware rev level */ 42 cp_urev:8, /* ucode rev level */ 43 :8, 44 cp_type:8; /* VAX_750 */ 45 } cpu750; 46 struct cpu730 { 47 u_int :8, /* reserved */ 48 cp_urev:8, /* ucode rev level */ 49 :8, /* reserved */ 50 cp_type:8; /* VAX_730 */ 51 } cpu730; 52 struct cpu630 { 53 u_int :24, /* reserved */ 54 cp_type:8; /* VAX_630 */ 55 } cpu630; 56 }; 57 #endif 58 /* 59 * Vax CPU types. 60 * Similar types are grouped with their earliest example. 61 */ 62 #define VAX_780 1 63 #define VAX_750 2 64 #define VAX_730 3 65 #define VAX_8600 4 66 #define VAX_8200 5 67 #define VAX_8800 6 /* not positive */ 68 #define VAX_8500 6 /* same as 8800, 8700 */ 69 #define VAX_610 7 /* uVAX I */ 70 #define VAX_630 8 /* uVAX II */ 71 72 #define VAX_MAX 8 73 74 /* 75 * Main IO backplane types. 76 * This gives us a handle on how to do autoconfiguration. 77 */ 78 #define IO_SBI780 1 79 #define IO_CMI750 2 80 #define IO_XXX730 3 81 #define IO_ABUS 4 82 #define IO_QBUS 5 83 #define IO_BI 6 84 85 #ifndef LOCORE 86 /* 87 * CPU-dependent operations. 88 */ 89 struct clockops { 90 int (*clkstartrt)(); /* start real time clock */ 91 int (*clkread)(); /* set system time from clock */ 92 int (*clkwrite)(); /* reset clock from system time */ 93 }; 94 95 struct cpuops { 96 struct clockops *cpu_clock; /* clock operations */ 97 int (*cpu_memenable)(); /* memory error (CRD intr) enable */ 98 int (*cpu_memerr)(); /* memory error handler */ 99 int (*cpu_mchk)(); /* machine check handler */ 100 int (*cpu_init)(); /* special initialisation, if any */ 101 }; 102 103 /* return values from cpu_mchk */ 104 #define MCHK_PANIC -1 105 #define MCHK_RECOVERED 0 106 107 /* 108 * Per-cpu information for system. 109 */ 110 struct percpu { 111 short pc_cputype; /* cpu type code */ 112 short pc_cpuspeed; /* relative speed of cpu */ 113 short pc_nioa; /* number of IO adaptors/nexus blocks */ 114 struct iobus *pc_io; /* descriptions of IO adaptors */ 115 struct cpuops *pc_ops; /* per-cpu operations */ 116 }; 117 118 /* 119 * Generic description of an I/O "adaptor" 120 * (any top-level I/O bus visible to software 121 * and requiring autoconfiguration). 122 * The remainder of the description 123 * is pointed to by io_details. 124 */ 125 struct iobus { 126 int io_type; /* io adaptor types */ 127 caddr_t io_addr; /* phys address of IO adaptor */ 128 int io_size; /* size of an IO space */ 129 caddr_t io_details; /* specific to adaptor types */ 130 }; 131 132 /* 133 * Description of a main bus that maps "nexi", ala the 780 SBI. 134 */ 135 struct nexusconnect { 136 short psb_nnexus; /* number of nexus slots */ 137 struct nexus *psb_nexbase; /* base of nexus space */ 138 short psb_ubatype; /* type of "unibus adaptor" */ 139 short psb_nubabdp; /* number of bdp's per uba */ 140 caddr_t *psb_umaddr; /* unibus memory addresses */ 141 /* the 750 has some slots which don't promise to tell you their types */ 142 /* if this pointer is non-zero, then you get the type from this array */ 143 /* rather than from the (much more sensible) low byte of the config register */ 144 short *psb_nextype; /* botch */ 145 }; 146 147 /* 148 * Description of a BI bus configuration. 149 */ 150 struct bibus { 151 struct bi_node *pbi_base; /* base of node space */ 152 /* that cannot possibly be all! */ 153 }; 154 155 /* 156 * Description of a Q-bus configuration. 157 */ 158 struct qbus { 159 int qb_type; /* type of "unibus adaptor" */ 160 int qb_memsize; /* size of (used) memory, pages */ 161 struct pte *qb_map; /* base of map registers */ 162 caddr_t qb_maddr; /* "unibus" memory address */ 163 caddr_t qb_iopage; /* "unibus" IO page address */ 164 }; 165 166 #ifdef KERNEL 167 int cpu; 168 #if VAX8800 || VAX8200 169 int mastercpu; /* if multiple cpus, this identifies master */ 170 #endif 171 struct percpu percpu[]; 172 struct cpuops *cpuops; 173 #endif 174 175 /* 176 * Enable realtime clock (always enabled). 177 */ 178 #define enablertclock() 179 #endif /* LOCORE */ 180