123258Smckusick /* 223258Smckusick * Copyright (c) 1982 Regents of the University of California. 323258Smckusick * All rights reserved. The Berkeley software License Agreement 423258Smckusick * specifies the terms and conditions for redistribution. 523258Smckusick * 6*26979Skarels * @(#)cpu.h 6.7 (Berkeley) 03/29/86 723258Smckusick */ 82550Swnj 92712Swnj #ifndef LOCORE 102550Swnj /* 112550Swnj * Cpu identification, from SID register. 122550Swnj */ 132550Swnj union cpusid { 142550Swnj int cpusid; 152550Swnj struct cpuany { 162550Swnj u_int :24, 172550Swnj cp_type:8; 182550Swnj } cpuany; 1924174Sbloom struct cpu8600 { 2024174Sbloom u_int cp_sno:12, /* serial number */ 2124174Sbloom cp_plant:4, /* plant number */ 2224174Sbloom cp_eco:8, /* eco level */ 2324174Sbloom cp_type:8; /* VAX_8600 */ 2424174Sbloom } cpu8600; 252550Swnj struct cpu780 { 262550Swnj u_int cp_sno:12, /* serial number */ 272550Swnj cp_plant:3, /* plant number */ 282550Swnj cp_eco:9, /* eco level */ 292550Swnj cp_type:8; /* VAX_780 */ 302550Swnj } cpu780; 312550Swnj struct cpu750 { 322550Swnj u_int cp_hrev:8, /* hardware rev level */ 332550Swnj cp_urev:8, /* ucode rev level */ 342550Swnj :8, 352550Swnj cp_type:8; /* VAX_750 */ 362550Swnj } cpu750; 3724173Sbloom struct cpu730 { 3824173Sbloom u_int :8, /* reserved */ 3924173Sbloom cp_urev:8, /* ucode rev level */ 4024173Sbloom :8, /* reserved */ 4124173Sbloom cp_type:8; /* VAX_730 */ 4224173Sbloom } cpu730; 432550Swnj }; 442712Swnj #endif 4526347Skarels /* 4626347Skarels * Vax CPU types. 4726347Skarels * Similar types are grouped with their earliest example. 4826347Skarels */ 492550Swnj #define VAX_780 1 502550Swnj #define VAX_750 2 516943Ssam #define VAX_730 3 5224174Sbloom #define VAX_8600 4 532550Swnj 5424174Sbloom #define VAX_MAX 4 552550Swnj 5626347Skarels /* 5726347Skarels * Main IO backplane types. 5826347Skarels * This gives us a handle on how to do autoconfiguration. 5926347Skarels */ 6026347Skarels #define IO_SBI780 1 6126347Skarels #define IO_CMI750 2 6226347Skarels #define IO_XXX730 3 6326347Skarels #define IO_ABUS 4 6426347Skarels 652712Swnj #ifndef LOCORE 662550Swnj /* 672550Swnj * Per-cpu information for system. 682550Swnj */ 692550Swnj struct percpu { 703245Swnj short pc_cputype; /* cpu type code */ 7124887Skarels short pc_cpuspeed; /* relative speed of cpu */ 7226347Skarels short pc_nioa; /* number of IO adaptors/nexus blocks */ 7326347Skarels struct iobus *pc_io; /* descriptions of IO adaptors */ 7424174Sbloom }; 7524174Sbloom 7626347Skarels struct iobus { 77*26979Skarels int io_type; /* io adaptor types */ 7826347Skarels caddr_t io_addr; /* phys address of IO adaptor */ 7926347Skarels int io_size; /* size of an IO space */ 8026347Skarels caddr_t io_details; /* specific to adaptor types */ 8126347Skarels }; 8226347Skarels 8326347Skarels /* 8426347Skarels * Description of a main bus that maps "nexi", ala the 780 SBI. 8526347Skarels */ 8626347Skarels struct nexusconnect { 8724174Sbloom short psb_nnexus; /* number of nexus slots */ 8824174Sbloom struct nexus *psb_nexbase; /* base of nexus space */ 893245Swnj /* we should be able to have just one address for the unibus memories */ 903245Swnj /* and calculate successive addresses by adding to the base, but the 750 */ 913245Swnj /* doesn't obey the sensible rule: uba1 has a lower address than uba0! */ 9224174Sbloom caddr_t *psb_umaddr; /* unibus memory addresses */ 9324174Sbloom short psb_nubabdp; /* number of bdp's per uba */ 9424174Sbloom short psb_haveubasr; /* have uba status register */ 953245Swnj /* the 750 has some slots which don't promise to tell you their types */ 963245Swnj /* if this pointer is non-zero, then you get the type from this array */ 973245Swnj /* rather than from the (much more sensible) low byte of the config register */ 9824174Sbloom short *psb_nextype; /* botch */ 992550Swnj }; 1002550Swnj 1012550Swnj #ifdef KERNEL 1022550Swnj int cpu; 1033245Swnj struct percpu percpu[]; 1042550Swnj #endif 1052712Swnj #endif 106