1 /* 2 * Copyright (c) 1988 Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Digital Equipment Corp. 7 * 8 * Redistribution and use in source and binary forms are permitted 9 * provided that the above copyright notice and this paragraph are 10 * duplicated in all such forms and that any documentation, 11 * advertising materials, and other materials related to such 12 * distribution and use acknowledge that the software was developed 13 * by the University of California, Berkeley. The name of the 14 * University may not be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 18 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 19 * 20 * @(#)if_qe.c 7.7 (Berkeley) 08/04/88 21 */ 22 23 /* from @(#)if_qe.c 1.15 (ULTRIX) 4/16/86 */ 24 25 /**************************************************************** 26 * * 27 * Licensed from Digital Equipment Corporation * 28 * Copyright (c) * 29 * Digital Equipment Corporation * 30 * Maynard, Massachusetts * 31 * 1985, 1986 * 32 * All rights reserved. * 33 * * 34 * The Information in this software is subject to change * 35 * without notice and should not be construed as a commitment * 36 * by Digital Equipment Corporation. Digital makes no * 37 * representations about the suitability of this software for * 38 * any purpose. It is supplied "As Is" without expressed or * 39 * implied warranty. * 40 * * 41 * If the Regents of the University of California or its * 42 * licensees modify the software in a manner creating * 43 * derivative copyright rights, appropriate copyright * 44 * legends may be placed on the derivative work in addition * 45 * to that set forth above. * 46 * * 47 ****************************************************************/ 48 /* --------------------------------------------------------------------- 49 * Modification History 50 * 51 * 15-Apr-86 -- afd 52 * Rename "unused_multi" to "qunused_multi" for extending Generic 53 * kernel to MicroVAXen. 54 * 55 * 18-mar-86 -- jaw br/cvec changed to NOT use registers. 56 * 57 * 12 March 86 -- Jeff Chase 58 * Modified to handle the new MCLGET macro 59 * Changed if_qe_data.c to use more receive buffers 60 * Added a flag to poke with adb to log qe_restarts on console 61 * 62 * 19 Oct 85 -- rjl 63 * Changed the watch dog timer from 30 seconds to 3. VMS is using 64 * less than 1 second in their's. Also turned the printf into an 65 * mprintf. 66 * 67 * 09/16/85 -- Larry Cohen 68 * Add 43bsd alpha tape changes for subnet routing 69 * 70 * 1 Aug 85 -- rjl 71 * Panic on a non-existent memory interrupt and the case where a packet 72 * was chained. The first should never happen because non-existant 73 * memory interrupts cause a bus reset. The second should never happen 74 * because we hang 2k input buffers on the device. 75 * 76 * 1 Aug 85 -- rich 77 * Fixed the broadcast loopback code to handle Clusters without 78 * wedging the system. 79 * 80 * 27 Feb. 85 -- ejf 81 * Return default hardware address on ioctl request. 82 * 83 * 12 Feb. 85 -- ejf 84 * Added internal extended loopback capability. 85 * 86 * 27 Dec. 84 -- rjl 87 * Fixed bug that caused every other transmit descriptor to be used 88 * instead of every descriptor. 89 * 90 * 21 Dec. 84 -- rjl 91 * Added watchdog timer to mask hardware bug that causes device lockup. 92 * 93 * 18 Dec. 84 -- rjl 94 * Reworked driver to use q-bus mapping routines. MicroVAX-I now does 95 * copying instead of m-buf shuffleing. 96 * A number of deficencies in the hardware/firmware were compensated 97 * for. See comments in qestart and qerint. 98 * 99 * 14 Nov. 84 -- jf 100 * Added usage counts for multicast addresses. 101 * Updated general protocol support to allow access to the Ethernet 102 * header. 103 * 104 * 04 Oct. 84 -- jf 105 * Added support for new ioctls to add and delete multicast addresses 106 * and set the physical address. 107 * Add support for general protocols. 108 * 109 * 14 Aug. 84 -- rjl 110 * Integrated Shannon changes. (allow arp above 1024 and ? ) 111 * 112 * 13 Feb. 84 -- rjl 113 * 114 * Initial version of driver. derived from IL driver. 115 * 116 * --------------------------------------------------------------------- 117 */ 118 119 #include "qe.h" 120 #if NQE > 0 121 /* 122 * Digital Q-BUS to NI Adapter 123 */ 124 #include "param.h" 125 #include "systm.h" 126 #include "mbuf.h" 127 #include "buf.h" 128 #include "protosw.h" 129 #include "socket.h" 130 #include "vmmac.h" 131 #include "ioctl.h" 132 #include "errno.h" 133 #include "syslog.h" 134 #include "time.h" 135 #include "kernel.h" 136 137 #include "../net/if.h" 138 #include "../net/netisr.h" 139 #include "../net/route.h" 140 141 #ifdef INET 142 #include "../netinet/in.h" 143 #include "../netinet/in_systm.h" 144 #include "../netinet/in_var.h" 145 #include "../netinet/ip.h" 146 #include "../netinet/if_ether.h" 147 #endif 148 149 #ifdef NS 150 #include "../netns/ns.h" 151 #include "../netns/ns_if.h" 152 #endif 153 154 #include "../vax/pte.h" 155 #include "../vax/cpu.h" 156 #include "../vax/mtpr.h" 157 #include "if_qereg.h" 158 #include "if_uba.h" 159 #include "../vaxuba/ubareg.h" 160 #include "../vaxuba/ubavar.h" 161 162 #if NQE > 1 163 #define NRCV 15 /* Receive descriptors */ 164 #else 165 #define NRCV 20 /* Receive descriptors */ 166 #endif 167 #define NXMT 5 /* Transmit descriptors */ 168 #define NTOT (NXMT + NRCV) 169 170 #define QETIMEOUT 2 /* transmit timeout, must be > 1 */ 171 172 /* 173 * This constant should really be 60 because the qna adds 4 bytes of crc. 174 * However when set to 60 our packets are ignored by deuna's , 3coms are 175 * okay ?????????????????????????????????????????? 176 */ 177 #define MINDATA 64 178 179 /* 180 * Ethernet software status per interface. 181 * 182 * Each interface is referenced by a network interface structure, 183 * qe_if, which the routing code uses to locate the interface. 184 * This structure contains the output queue for the interface, its address, ... 185 */ 186 struct qe_softc { 187 struct arpcom qe_ac; /* Ethernet common part */ 188 #define qe_if qe_ac.ac_if /* network-visible interface */ 189 #define qe_addr qe_ac.ac_enaddr /* hardware Ethernet address */ 190 struct ifubinfo qe_uba; /* Q-bus resources */ 191 struct ifrw qe_ifr[NRCV]; /* for receive buffers; */ 192 struct ifxmt qe_ifw[NXMT]; /* for xmit buffers; */ 193 int qe_flags; /* software state */ 194 #define QEF_RUNNING 0x01 195 #define QEF_SETADDR 0x02 196 int setupaddr; /* mapping info for setup pkts */ 197 struct qe_ring *rringaddr; /* mapping info for rings */ 198 struct qe_ring *tringaddr; /* "" */ 199 struct qe_ring rring[NRCV+1]; /* Receive ring descriptors */ 200 struct qe_ring tring[NXMT+1]; /* Transmit ring descriptors */ 201 u_char setup_pkt[16][8]; /* Setup packet */ 202 int rindex; /* Receive index */ 203 int tindex; /* Transmit index */ 204 int otindex; /* Old transmit index */ 205 int qe_intvec; /* Interrupt vector */ 206 struct qedevice *addr; /* device addr */ 207 int setupqueued; /* setup packet queued */ 208 int nxmit; /* Transmits in progress */ 209 int qe_restarts; /* timeouts */ 210 } qe_softc[NQE]; 211 212 struct uba_device *qeinfo[NQE]; 213 214 extern struct timeval time; 215 216 int qeprobe(), qeattach(), qeintr(), qetimeout(); 217 int qeinit(), qeoutput(), qeioctl(), qereset(); 218 219 u_short qestd[] = { 0 }; 220 struct uba_driver qedriver = 221 { qeprobe, 0, qeattach, 0, qestd, "qe", qeinfo }; 222 223 #define QE_TIMEO (15) 224 #define QEUNIT(x) minor(x) 225 static int mask = 0x3ffff; /* address mask */ 226 /* 227 * The deqna shouldn't receive more than ETHERMTU + sizeof(struct ether_header) 228 * but will actually take in up to 2048 bytes. To guard against the receiver 229 * chaining buffers (which we aren't prepared to handle) we allocate 2kb 230 * size buffers. 231 */ 232 #define MAXPACKETSIZE 2048 /* Should really be ETHERMTU */ 233 /* 234 * Probe the QNA to see if it's there 235 */ 236 qeprobe(reg) 237 caddr_t reg; 238 { 239 register int br, cvec; /* r11, r10 value-result */ 240 register struct qedevice *addr = (struct qedevice *)reg; 241 register struct qe_ring *rp; 242 register struct qe_ring *prp; /* physical rp */ 243 register int i, j; 244 static int next=0; /* softc index */ 245 register struct qe_softc *sc = &qe_softc[next++]; 246 247 #ifdef lint 248 br = 0; cvec = br; br = cvec; 249 qeintr(0); 250 #endif 251 /* 252 * Set the address mask for the particular cpu 253 */ 254 mask = 0x3ffff; 255 256 /* 257 * The QNA interrupts on i/o operations. To do an I/O operation 258 * we have to setup the interface by transmitting a setup packet. 259 */ 260 addr->qe_csr = QE_RESET; 261 addr->qe_vector = (uba_hd[numuba].uh_lastiv -= 4); 262 263 /* 264 * Map the communications area and the setup packet. 265 */ 266 sc->setupaddr = 267 uballoc(0, (caddr_t)sc->setup_pkt, sizeof(sc->setup_pkt), 0); 268 sc->rringaddr = (struct qe_ring *) uballoc(0, (caddr_t)sc->rring, 269 sizeof(struct qe_ring) * (NTOT+2), 0); 270 prp = (struct qe_ring *)((int)sc->rringaddr & mask); 271 272 /* 273 * The QNA will loop the setup packet back to the receive ring 274 * for verification, therefore we initialize the first 275 * receive & transmit ring descriptors and link the setup packet 276 * to them. 277 */ 278 qeinitdesc(sc->tring, (caddr_t)(sc->setupaddr & mask), 279 sizeof(sc->setup_pkt)); 280 qeinitdesc(sc->rring, (caddr_t)(sc->setupaddr & mask), 281 sizeof(sc->setup_pkt)); 282 283 rp = (struct qe_ring *)sc->tring; 284 rp->qe_setup = 1; 285 rp->qe_eomsg = 1; 286 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 287 rp->qe_valid = 1; 288 289 rp = (struct qe_ring *)sc->rring; 290 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 291 rp->qe_valid = 1; 292 293 /* 294 * Get the addr off of the interface and place it into the setup 295 * packet. This code looks strange due to the fact that the address 296 * is placed in the setup packet in col. major order. 297 */ 298 for( i = 0 ; i < 6 ; i++ ) 299 sc->setup_pkt[i][1] = addr->qe_sta_addr[i]; 300 301 qesetup( sc ); 302 /* 303 * Start the interface and wait for the packet. 304 */ 305 j = cvec; 306 addr->qe_csr = QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT; 307 addr->qe_rcvlist_lo = (short)prp; 308 addr->qe_rcvlist_hi = (short)((int)prp >> 16); 309 prp += NRCV+1; 310 addr->qe_xmtlist_lo = (short)prp; 311 addr->qe_xmtlist_hi = (short)((int)prp >> 16); 312 DELAY(10000); 313 /* 314 * All done with the bus resources. 315 */ 316 ubarelse(0, &sc->setupaddr); 317 ubarelse(0, (int *)&sc->rringaddr); 318 if( cvec == j ) 319 return 0; /* didn't interrupt */ 320 321 br = 0x15; /* q-bus doesn't get level */ 322 return( sizeof(struct qedevice) ); 323 } 324 325 /* 326 * Interface exists: make available by filling in network interface 327 * record. System will initialize the interface when it is ready 328 * to accept packets. 329 */ 330 qeattach(ui) 331 struct uba_device *ui; 332 { 333 register struct qe_softc *sc = &qe_softc[ui->ui_unit]; 334 register struct ifnet *ifp = &sc->qe_if; 335 register struct qedevice *addr = (struct qedevice *)ui->ui_addr; 336 register int i; 337 338 ifp->if_unit = ui->ui_unit; 339 ifp->if_name = "qe"; 340 ifp->if_mtu = ETHERMTU; 341 ifp->if_flags = IFF_BROADCAST; 342 343 /* 344 * Read the address from the prom and save it. 345 */ 346 for( i=0 ; i<6 ; i++ ) 347 sc->setup_pkt[i][1] = sc->qe_addr[i] = addr->qe_sta_addr[i] & 0xff; 348 printf("qe%d: hardware address %s\n", ui->ui_unit, 349 ether_sprintf(sc->qe_addr)); 350 351 /* 352 * Save the vector for initialization at reset time. 353 */ 354 sc->qe_intvec = addr->qe_vector; 355 356 ifp->if_init = qeinit; 357 ifp->if_output = qeoutput; 358 ifp->if_ioctl = qeioctl; 359 ifp->if_reset = qereset; 360 ifp->if_watchdog = qetimeout; 361 sc->qe_uba.iff_flags = UBA_CANTWAIT; 362 if_attach(ifp); 363 } 364 365 /* 366 * Reset of interface after UNIBUS reset. 367 * If interface is on specified uba, reset its state. 368 */ 369 qereset(unit, uban) 370 int unit, uban; 371 { 372 register struct uba_device *ui; 373 374 if (unit >= NQE || (ui = qeinfo[unit]) == 0 || ui->ui_alive == 0 || 375 ui->ui_ubanum != uban) 376 return; 377 printf(" qe%d", unit); 378 qe_softc[unit].qe_if.if_flags &= ~IFF_RUNNING; 379 qeinit(unit); 380 } 381 382 /* 383 * Initialization of interface. 384 */ 385 qeinit(unit) 386 int unit; 387 { 388 register struct qe_softc *sc = &qe_softc[unit]; 389 register struct uba_device *ui = qeinfo[unit]; 390 register struct qedevice *addr = (struct qedevice *)ui->ui_addr; 391 register struct ifnet *ifp = &sc->qe_if; 392 register i; 393 int s; 394 395 /* address not known */ 396 if (ifp->if_addrlist == (struct ifaddr *)0) 397 return; 398 if (sc->qe_flags & QEF_RUNNING) 399 return; 400 401 if ((ifp->if_flags & IFF_RUNNING) == 0) { 402 /* 403 * map the communications area onto the device 404 */ 405 sc->rringaddr = (struct qe_ring *) 406 ((int) uballoc(0, (caddr_t)sc->rring, 407 sizeof(struct qe_ring) * (NTOT+2), 0) & mask); 408 sc->tringaddr = sc->rringaddr + NRCV + 1; 409 sc->setupaddr = uballoc(0, (caddr_t)sc->setup_pkt, 410 sizeof(sc->setup_pkt), 0) & mask; 411 /* 412 * init buffers and maps 413 */ 414 if (if_ubaminit(&sc->qe_uba, ui->ui_ubanum, 415 sizeof (struct ether_header), (int)btoc(MAXPACKETSIZE), 416 sc->qe_ifr, NRCV, sc->qe_ifw, NXMT) == 0) { 417 printf("qe%d: can't initialize\n", unit); 418 sc->qe_if.if_flags &= ~IFF_UP; 419 return; 420 } 421 } 422 /* 423 * Init the buffer descriptors and indexes for each of the lists and 424 * loop them back to form a ring. 425 */ 426 for (i = 0; i < NRCV; i++) { 427 qeinitdesc( &sc->rring[i], 428 (caddr_t)(sc->qe_ifr[i].ifrw_info & mask), MAXPACKETSIZE); 429 sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET; 430 sc->rring[i].qe_valid = 1; 431 } 432 qeinitdesc(&sc->rring[i], (caddr_t)NULL, 0); 433 434 sc->rring[i].qe_addr_lo = (short)sc->rringaddr; 435 sc->rring[i].qe_addr_hi = (short)((int)sc->rringaddr >> 16); 436 sc->rring[i].qe_chain = 1; 437 sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET; 438 sc->rring[i].qe_valid = 1; 439 440 for( i = 0 ; i <= NXMT ; i++ ) 441 qeinitdesc(&sc->tring[i], (caddr_t)NULL, 0); 442 i--; 443 444 sc->tring[i].qe_addr_lo = (short)sc->tringaddr; 445 sc->tring[i].qe_addr_hi = (short)((int)sc->tringaddr >> 16); 446 sc->tring[i].qe_chain = 1; 447 sc->tring[i].qe_flag = sc->tring[i].qe_status1 = QE_NOTYET; 448 sc->tring[i].qe_valid = 1; 449 450 sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0; 451 452 /* 453 * Take the interface out of reset, program the vector, 454 * enable interrupts, and tell the world we are up. 455 */ 456 s = splimp(); 457 addr->qe_vector = sc->qe_intvec; 458 sc->addr = addr; 459 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | 460 QE_RCV_INT | QE_ILOOP; 461 addr->qe_rcvlist_lo = (short)sc->rringaddr; 462 addr->qe_rcvlist_hi = (short)((int)sc->rringaddr >> 16); 463 ifp->if_flags |= IFF_UP | IFF_RUNNING; 464 sc->qe_flags |= QEF_RUNNING; 465 qesetup( sc ); 466 qestart( unit ); 467 splx( s ); 468 469 } 470 471 /* 472 * Start output on interface. 473 * 474 */ 475 qestart(unit) 476 int unit; 477 { 478 struct uba_device *ui = qeinfo[unit]; 479 register struct qe_softc *sc = &qe_softc[unit]; 480 register struct qedevice *addr; 481 register struct qe_ring *rp; 482 register index; 483 struct mbuf *m; 484 int buf_addr, len, s; 485 486 487 s = splimp(); 488 addr = (struct qedevice *)ui->ui_addr; 489 /* 490 * The deqna doesn't look at anything but the valid bit 491 * to determine if it should transmit this packet. If you have 492 * a ring and fill it the device will loop indefinately on the 493 * packet and continue to flood the net with packets until you 494 * break the ring. For this reason we never queue more than n-1 495 * packets in the transmit ring. 496 * 497 * The microcoders should have obeyed their own defination of the 498 * flag and status words, but instead we have to compensate. 499 */ 500 for( index = sc->tindex; 501 sc->tring[index].qe_valid == 0 && sc->nxmit < (NXMT-1) ; 502 sc->tindex = index = ++index % NXMT){ 503 rp = &sc->tring[index]; 504 if( sc->setupqueued ) { 505 buf_addr = sc->setupaddr; 506 len = 128; 507 rp->qe_setup = 1; 508 sc->setupqueued = 0; 509 } else { 510 IF_DEQUEUE(&sc->qe_if.if_snd, m); 511 if( m == 0 ){ 512 splx(s); 513 return; 514 } 515 buf_addr = sc->qe_ifw[index].ifw_info; 516 len = if_ubaput(&sc->qe_uba, &sc->qe_ifw[index], m); 517 } 518 /* 519 * Does buffer end on odd byte ? 520 */ 521 if( len & 1 ) { 522 len++; 523 rp->qe_odd_end = 1; 524 } 525 if( len < MINDATA ) 526 len = MINDATA; 527 rp->qe_buf_len = -(len/2); 528 buf_addr &= mask; 529 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 530 rp->qe_addr_lo = (short)buf_addr; 531 rp->qe_addr_hi = (short)(buf_addr >> 16); 532 rp->qe_eomsg = 1; 533 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 534 rp->qe_valid = 1; 535 sc->nxmit++; 536 sc->qe_if.if_timer = QETIMEOUT; 537 538 /* 539 * See if the xmit list is invalid. 540 */ 541 if( addr->qe_csr & QE_XL_INVALID ) { 542 buf_addr = (int)(sc->tringaddr+index); 543 addr->qe_xmtlist_lo = (short)buf_addr; 544 addr->qe_xmtlist_hi = (short)(buf_addr >> 16); 545 } 546 } 547 splx( s ); 548 } 549 550 /* 551 * Ethernet interface interrupt processor 552 */ 553 qeintr(unit) 554 int unit; 555 { 556 register struct qe_softc *sc = &qe_softc[unit]; 557 struct qedevice *addr = (struct qedevice *)qeinfo[unit]->ui_addr; 558 int s, buf_addr, csr; 559 560 s = splimp(); 561 csr = addr->qe_csr; 562 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT | QE_ILOOP; 563 if( csr & QE_RCV_INT ) 564 qerint( unit ); 565 if( csr & QE_XMIT_INT ) 566 qetint( unit ); 567 if( csr & QE_NEX_MEM_INT ) 568 panic("qe: Non existant memory interrupt"); 569 570 if( addr->qe_csr & QE_RL_INVALID && sc->rring[sc->rindex].qe_status1 == QE_NOTYET ) { 571 buf_addr = (int)&sc->rringaddr[sc->rindex]; 572 addr->qe_rcvlist_lo = (short)buf_addr; 573 addr->qe_rcvlist_hi = (short)(buf_addr >> 16); 574 } 575 splx( s ); 576 } 577 578 /* 579 * Ethernet interface transmit interrupt. 580 */ 581 582 qetint(unit) 583 int unit; 584 { 585 register struct qe_softc *sc = &qe_softc[unit]; 586 register struct qe_ring *rp; 587 register struct ifxmt *ifxp; 588 int status1, setupflag; 589 short len; 590 591 592 while( sc->otindex != sc->tindex && sc->tring[sc->otindex].qe_status1 != QE_NOTYET && sc->nxmit > 0 ) { 593 /* 594 * Save the status words from the descriptor so that it can 595 * be released. 596 */ 597 rp = &sc->tring[sc->otindex]; 598 status1 = rp->qe_status1; 599 setupflag = rp->qe_setup; 600 len = (-rp->qe_buf_len) * 2; 601 if( rp->qe_odd_end ) 602 len++; 603 /* 604 * Init the buffer descriptor 605 */ 606 bzero((caddr_t)rp, sizeof(struct qe_ring)); 607 if( --sc->nxmit == 0 ) 608 sc->qe_if.if_timer = 0; 609 if( !setupflag ) { 610 /* 611 * Do some statistics. 612 */ 613 sc->qe_if.if_opackets++; 614 sc->qe_if.if_collisions += ( status1 & QE_CCNT ) >> 4; 615 if (status1 & QE_ERROR) 616 sc->qe_if.if_oerrors++; 617 /* 618 * If this was a broadcast packet loop it 619 * back because the hardware can't hear its own 620 * transmits. 621 */ 622 ifxp = &sc->qe_ifw[sc->otindex]; 623 if (bcmp((caddr_t)((struct ether_header *)ifxp->ifw_addr)->ether_dhost, 624 (caddr_t)etherbroadcastaddr, 625 sizeof(etherbroadcastaddr)) == 0) 626 qeread(sc, &ifxp->ifrw, 627 len - sizeof(struct ether_header)); 628 if (ifxp->ifw_xtofree) { 629 m_freem(ifxp->ifw_xtofree); 630 ifxp->ifw_xtofree = 0; 631 } 632 } 633 sc->otindex = ++sc->otindex % NXMT; 634 } 635 qestart( unit ); 636 } 637 638 /* 639 * Ethernet interface receiver interrupt. 640 * If can't determine length from type, then have to drop packet. 641 * Othewise decapsulate packet based on type and pass to type specific 642 * higher-level input routine. 643 */ 644 qerint(unit) 645 int unit; 646 { 647 register struct qe_softc *sc = &qe_softc[unit]; 648 register struct qe_ring *rp; 649 int len, status1, status2; 650 int bufaddr; 651 652 /* 653 * Traverse the receive ring looking for packets to pass back. 654 * The search is complete when we find a descriptor not in use. 655 * 656 * As in the transmit case the deqna doesn't honor it's own protocols 657 * so there exists the possibility that the device can beat us around 658 * the ring. The proper way to guard against this is to insure that 659 * there is always at least one invalid descriptor. We chose instead 660 * to make the ring large enough to minimize the problem. With a ring 661 * size of 4 we haven't been able to see the problem. To be safe we 662 * doubled that to 8. 663 * 664 */ 665 for( ; sc->rring[sc->rindex].qe_status1 != QE_NOTYET ; sc->rindex = ++sc->rindex % NRCV ){ 666 rp = &sc->rring[sc->rindex]; 667 status1 = rp->qe_status1; 668 status2 = rp->qe_status2; 669 bzero((caddr_t)rp, sizeof(struct qe_ring)); 670 if( (status1 & QE_MASK) == QE_MASK ) 671 panic("qe: chained packet"); 672 len = ((status1 & QE_RBL_HI) | (status2 & QE_RBL_LO)) + 60; 673 sc->qe_if.if_ipackets++; 674 675 if (status1 & QE_ERROR) { 676 if ((status1 & QE_RUNT) == 0) 677 sc->qe_if.if_ierrors++; 678 } else { 679 /* 680 * We don't process setup packets. 681 */ 682 if( !(status1 & QE_ESETUP) ) 683 qeread(sc, &sc->qe_ifr[sc->rindex], 684 len - sizeof(struct ether_header)); 685 } 686 /* 687 * Return the buffer to the ring 688 */ 689 bufaddr = (int)sc->qe_ifr[sc->rindex].ifrw_info & mask; 690 rp->qe_buf_len = -((MAXPACKETSIZE)/2); 691 rp->qe_addr_lo = (short)bufaddr; 692 rp->qe_addr_hi = (short)((int)bufaddr >> 16); 693 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 694 rp->qe_valid = 1; 695 } 696 } 697 /* 698 * Ethernet output routine. 699 * Encapsulate a packet of type family for the local net. 700 * Use trailer local net encapsulation if enough data in first 701 * packet leaves a multiple of 512 bytes of data in remainder. 702 */ 703 qeoutput(ifp, m0, dst) 704 struct ifnet *ifp; 705 struct mbuf *m0; 706 struct sockaddr *dst; 707 { 708 int type, s, error; 709 u_char edst[6]; 710 struct in_addr idst; 711 register struct qe_softc *is = &qe_softc[ifp->if_unit]; 712 register struct mbuf *m = m0; 713 register struct ether_header *eh; 714 register int off; 715 int usetrailers; 716 717 if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) != (IFF_UP|IFF_RUNNING)) { 718 error = ENETDOWN; 719 goto bad; 720 } 721 722 switch (dst->sa_family) { 723 724 #ifdef INET 725 case AF_INET: 726 idst = ((struct sockaddr_in *)dst)->sin_addr; 727 if (!arpresolve(&is->qe_ac, m, &idst, edst, &usetrailers)) 728 return (0); /* if not yet resolved */ 729 off = ntohs((u_short)mtod(m, struct ip *)->ip_len) - m->m_len; 730 if (usetrailers && off > 0 && (off & 0x1ff) == 0 && 731 m->m_off >= MMINOFF + 2 * sizeof (u_short)) { 732 type = ETHERTYPE_TRAIL + (off>>9); 733 m->m_off -= 2 * sizeof (u_short); 734 m->m_len += 2 * sizeof (u_short); 735 *mtod(m, u_short *) = htons((u_short)ETHERTYPE_IP); 736 *(mtod(m, u_short *) + 1) = htons((u_short)m->m_len); 737 goto gottrailertype; 738 } 739 type = ETHERTYPE_IP; 740 off = 0; 741 goto gottype; 742 #endif 743 #ifdef NS 744 case AF_NS: 745 type = ETHERTYPE_NS; 746 bcopy((caddr_t)&(((struct sockaddr_ns *)dst)->sns_addr.x_host), 747 (caddr_t)edst, sizeof (edst)); 748 off = 0; 749 goto gottype; 750 #endif 751 752 753 case AF_UNSPEC: 754 eh = (struct ether_header *)dst->sa_data; 755 bcopy((caddr_t)eh->ether_dhost, (caddr_t)edst, sizeof (edst)); 756 type = eh->ether_type; 757 goto gottype; 758 759 default: 760 printf("qe%d: can't handle af%d\n", ifp->if_unit, 761 dst->sa_family); 762 error = EAFNOSUPPORT; 763 goto bad; 764 } 765 766 gottrailertype: 767 /* 768 * Packet to be sent as trailer: move first packet 769 * (control information) to end of chain. 770 */ 771 while (m->m_next) 772 m = m->m_next; 773 m->m_next = m0; 774 m = m0->m_next; 775 m0->m_next = 0; 776 m0 = m; 777 778 gottype: 779 /* 780 * Add local net header. If no space in first mbuf, 781 * allocate another. 782 */ 783 if (m->m_off > MMAXOFF || 784 MMINOFF + sizeof (struct ether_header) > m->m_off) { 785 m = m_get(M_DONTWAIT, MT_HEADER); 786 if (m == 0) { 787 error = ENOBUFS; 788 goto bad; 789 } 790 m->m_next = m0; 791 m->m_off = MMINOFF; 792 m->m_len = sizeof (struct ether_header); 793 } else { 794 m->m_off -= sizeof (struct ether_header); 795 m->m_len += sizeof (struct ether_header); 796 } 797 eh = mtod(m, struct ether_header *); 798 eh->ether_type = htons((u_short)type); 799 bcopy((caddr_t)edst, (caddr_t)eh->ether_dhost, sizeof (edst)); 800 bcopy((caddr_t)is->qe_addr, (caddr_t)eh->ether_shost, sizeof (is->qe_addr)); 801 802 /* 803 * Queue message on interface, and start output if interface 804 * not yet active. 805 */ 806 s = splimp(); 807 if (IF_QFULL(&ifp->if_snd)) { 808 IF_DROP(&ifp->if_snd); 809 splx(s); 810 m_freem(m); 811 return (ENOBUFS); 812 } 813 IF_ENQUEUE(&ifp->if_snd, m); 814 qestart(ifp->if_unit); 815 splx(s); 816 return (0); 817 818 bad: 819 m_freem(m0); 820 return (error); 821 } 822 823 824 /* 825 * Process an ioctl request. 826 */ 827 qeioctl(ifp, cmd, data) 828 register struct ifnet *ifp; 829 int cmd; 830 caddr_t data; 831 { 832 struct qe_softc *sc = &qe_softc[ifp->if_unit]; 833 struct ifaddr *ifa = (struct ifaddr *)data; 834 int s = splimp(), error = 0; 835 836 switch (cmd) { 837 838 case SIOCSIFADDR: 839 ifp->if_flags |= IFF_UP; 840 qeinit(ifp->if_unit); 841 switch(ifa->ifa_addr.sa_family) { 842 #ifdef INET 843 case AF_INET: 844 ((struct arpcom *)ifp)->ac_ipaddr = 845 IA_SIN(ifa)->sin_addr; 846 arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr); 847 break; 848 #endif 849 #ifdef NS 850 case AF_NS: 851 { 852 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); 853 854 if (ns_nullhost(*ina)) 855 ina->x_host = *(union ns_host *)(sc->qe_addr); 856 else 857 qe_setaddr(ina->x_host.c_host, ifp->if_unit); 858 break; 859 } 860 #endif 861 } 862 break; 863 864 case SIOCSIFFLAGS: 865 if ((ifp->if_flags & IFF_UP) == 0 && 866 sc->qe_flags & QEF_RUNNING) { 867 ((struct qedevice *) 868 (qeinfo[ifp->if_unit]->ui_addr))->qe_csr = QE_RESET; 869 sc->qe_flags &= ~QEF_RUNNING; 870 } else if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) == 871 IFF_RUNNING && (sc->qe_flags & QEF_RUNNING) == 0) 872 qerestart(sc); 873 break; 874 875 default: 876 error = EINVAL; 877 878 } 879 splx(s); 880 return (error); 881 } 882 883 /* 884 * set ethernet address for unit 885 */ 886 qe_setaddr(physaddr, unit) 887 u_char *physaddr; 888 int unit; 889 { 890 register struct qe_softc *sc = &qe_softc[unit]; 891 register int i; 892 893 for (i = 0; i < 6; i++) 894 sc->setup_pkt[i][1] = sc->qe_addr[i] = physaddr[i]; 895 sc->qe_flags |= QEF_SETADDR; 896 if (sc->qe_if.if_flags & IFF_RUNNING) 897 qesetup(sc); 898 qeinit(unit); 899 } 900 901 902 /* 903 * Initialize a ring descriptor with mbuf allocation side effects 904 */ 905 qeinitdesc(rp, addr, len) 906 register struct qe_ring *rp; 907 caddr_t addr; /* mapped address */ 908 int len; 909 { 910 /* 911 * clear the entire descriptor 912 */ 913 bzero((caddr_t)rp, sizeof(struct qe_ring)); 914 915 if( len ) { 916 rp->qe_buf_len = -(len/2); 917 rp->qe_addr_lo = (short)addr; 918 rp->qe_addr_hi = (short)((int)addr >> 16); 919 } 920 } 921 /* 922 * Build a setup packet - the physical address will already be present 923 * in first column. 924 */ 925 qesetup( sc ) 926 struct qe_softc *sc; 927 { 928 register i, j; 929 930 /* 931 * Copy the target address to the rest of the entries in this row. 932 */ 933 for ( j = 0; j < 6 ; j++ ) 934 for ( i = 2 ; i < 8 ; i++ ) 935 sc->setup_pkt[j][i] = sc->setup_pkt[j][1]; 936 /* 937 * Duplicate the first half. 938 */ 939 bcopy((caddr_t)sc->setup_pkt[0], (caddr_t)sc->setup_pkt[8], 64); 940 /* 941 * Fill in the broadcast address. 942 */ 943 for ( i = 0; i < 6 ; i++ ) 944 sc->setup_pkt[i][2] = 0xff; 945 sc->setupqueued++; 946 } 947 948 /* 949 * Pass a packet to the higher levels. 950 * We deal with the trailer protocol here. 951 */ 952 qeread(sc, ifrw, len) 953 register struct qe_softc *sc; 954 struct ifrw *ifrw; 955 int len; 956 { 957 struct ether_header *eh; 958 struct mbuf *m; 959 int off, resid; 960 struct ifqueue *inq; 961 962 /* 963 * Deal with trailer protocol: if type is INET trailer 964 * get true type from first 16-bit word past data. 965 * Remember that type was trailer by setting off. 966 */ 967 968 eh = (struct ether_header *)ifrw->ifrw_addr; 969 eh->ether_type = ntohs((u_short)eh->ether_type); 970 #define qedataaddr(eh, off, type) ((type)(((caddr_t)((eh)+1)+(off)))) 971 if (eh->ether_type >= ETHERTYPE_TRAIL && 972 eh->ether_type < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { 973 off = (eh->ether_type - ETHERTYPE_TRAIL) * 512; 974 if (off >= ETHERMTU) 975 return; /* sanity */ 976 eh->ether_type = ntohs(*qedataaddr(eh,off, u_short *)); 977 resid = ntohs(*(qedataaddr(eh, off+2, u_short *))); 978 if (off + resid > len) 979 return; /* sanity */ 980 len = off + resid; 981 } else 982 off = 0; 983 if (len == 0) 984 return; 985 986 /* 987 * Pull packet off interface. Off is nonzero if packet 988 * has trailing header; qeget will then force this header 989 * information to be at the front, but we still have to drop 990 * the type and length which are at the front of any trailer data. 991 */ 992 m = if_ubaget(&sc->qe_uba, ifrw, len, off, &sc->qe_if); 993 994 if (m == 0) 995 return; 996 997 if (off) { 998 struct ifnet *ifp; 999 1000 ifp = *(mtod(m, struct ifnet **)); 1001 m->m_off += 2 * sizeof (u_short); 1002 m->m_len -= 2 * sizeof (u_short); 1003 *(mtod(m, struct ifnet **)) = ifp; 1004 } 1005 switch (eh->ether_type) { 1006 1007 #ifdef INET 1008 case ETHERTYPE_IP: 1009 schednetisr(NETISR_IP); 1010 inq = &ipintrq; 1011 break; 1012 1013 case ETHERTYPE_ARP: 1014 arpinput(&sc->qe_ac, m); 1015 return; 1016 #endif 1017 #ifdef NS 1018 case ETHERTYPE_NS: 1019 schednetisr(NETISR_NS); 1020 inq = &nsintrq; 1021 break; 1022 1023 #endif 1024 1025 default: 1026 m_freem(m); 1027 return; 1028 } 1029 1030 if (IF_QFULL(inq)) { 1031 IF_DROP(inq); 1032 m_freem(m); 1033 return; 1034 } 1035 IF_ENQUEUE(inq, m); 1036 } 1037 1038 /* 1039 * Watchdog timeout routine. There is a condition in the hardware that 1040 * causes the board to lock up under heavy load. This routine detects 1041 * the hang up and restarts the device. 1042 */ 1043 qetimeout(unit) 1044 int unit; 1045 { 1046 register struct qe_softc *sc; 1047 1048 sc = &qe_softc[unit]; 1049 log(LOG_ERR, "qe%d: transmit timeout, restarted %d\n", 1050 unit, ++sc->qe_restarts); 1051 qerestart(sc); 1052 } 1053 /* 1054 * Restart for board lockup problem. 1055 */ 1056 qerestart(sc) 1057 register struct qe_softc *sc; 1058 { 1059 register struct ifnet *ifp = &sc->qe_if; 1060 register struct qedevice *addr = sc->addr; 1061 register struct qe_ring *rp; 1062 register i; 1063 1064 addr->qe_csr = QE_RESET; 1065 qesetup( sc ); 1066 for (i = 0, rp = sc->tring; i < NXMT; rp++, i++) { 1067 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 1068 rp->qe_valid = 0; 1069 } 1070 sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0; 1071 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | 1072 QE_RCV_INT | QE_ILOOP; 1073 addr->qe_rcvlist_lo = (short)sc->rringaddr; 1074 addr->qe_rcvlist_hi = (short)((int)sc->rringaddr >> 16); 1075 sc->qe_flags |= QEF_RUNNING; 1076 qestart(ifp->if_unit); 1077 } 1078 #endif 1079