1 /* @(#)if_qe.c 7.2 (Berkeley) 03/10/87 */ 2 3 /* from @(#)if_qe.c 1.15 (ULTRIX) 4/16/86 */ 4 5 6 /**************************************************************** 7 * * 8 * Licensed from Digital Equipment Corporation * 9 * Copyright (c) * 10 * Digital Equipment Corporation * 11 * Maynard, Massachusetts * 12 * 1985, 1986 * 13 * All rights reserved. * 14 * * 15 * The Information in this software is subject to change * 16 * without notice and should not be construed as a commitment * 17 * by Digital Equipment Corporation. Digital makes no * 18 * representations about the suitability of this software for * 19 * any purpose. It is supplied "As Is" without expressed or * 20 * implied warranty. * 21 * * 22 * If the Regents of the University of California or its * 23 * licensees modify the software in a manner creating * 24 * derivative copyright rights, appropriate copyright * 25 * legends may be placed on the derivative work in addition * 26 * to that set forth above. * 27 * * 28 ****************************************************************/ 29 /* --------------------------------------------------------------------- 30 * Modification History 31 * 32 * 15-Apr-86 -- afd 33 * Rename "unused_multi" to "qunused_multi" for extending Generic 34 * kernel to MicroVAXen. 35 * 36 * 18-mar-86 -- jaw br/cvec changed to NOT use registers. 37 * 38 * 12 March 86 -- Jeff Chase 39 * Modified to handle the new MCLGET macro 40 * Changed if_qe_data.c to use more receive buffers 41 * Added a flag to poke with adb to log qe_restarts on console 42 * 43 * 19 Oct 85 -- rjl 44 * Changed the watch dog timer from 30 seconds to 3. VMS is using 45 * less than 1 second in their's. Also turned the printf into an 46 * mprintf. 47 * 48 * 09/16/85 -- Larry Cohen 49 * Add 43bsd alpha tape changes for subnet routing 50 * 51 * 1 Aug 85 -- rjl 52 * Panic on a non-existent memory interrupt and the case where a packet 53 * was chained. The first should never happen because non-existant 54 * memory interrupts cause a bus reset. The second should never happen 55 * because we hang 2k input buffers on the device. 56 * 57 * 1 Aug 85 -- rich 58 * Fixed the broadcast loopback code to handle Clusters without 59 * wedging the system. 60 * 61 * 27 Feb. 85 -- ejf 62 * Return default hardware address on ioctl request. 63 * 64 * 12 Feb. 85 -- ejf 65 * Added internal extended loopback capability. 66 * 67 * 27 Dec. 84 -- rjl 68 * Fixed bug that caused every other transmit descriptor to be used 69 * instead of every descriptor. 70 * 71 * 21 Dec. 84 -- rjl 72 * Added watchdog timer to mask hardware bug that causes device lockup. 73 * 74 * 18 Dec. 84 -- rjl 75 * Reworked driver to use q-bus mapping routines. MicroVAX-I now does 76 * copying instead of m-buf shuffleing. 77 * A number of deficencies in the hardware/firmware were compensated 78 * for. See comments in qestart and qerint. 79 * 80 * 14 Nov. 84 -- jf 81 * Added usage counts for multicast addresses. 82 * Updated general protocol support to allow access to the Ethernet 83 * header. 84 * 85 * 04 Oct. 84 -- jf 86 * Added support for new ioctls to add and delete multicast addresses 87 * and set the physical address. 88 * Add support for general protocols. 89 * 90 * 14 Aug. 84 -- rjl 91 * Integrated Shannon changes. (allow arp above 1024 and ? ) 92 * 93 * 13 Feb. 84 -- rjl 94 * 95 * Initial version of driver. derived from IL driver. 96 * 97 * --------------------------------------------------------------------- 98 */ 99 100 #include "qe.h" 101 #if NQE > 0 102 /* 103 * Digital Q-BUS to NI Adapter 104 */ 105 #include "../machine/pte.h" 106 107 #include "param.h" 108 #include "systm.h" 109 #include "mbuf.h" 110 #include "buf.h" 111 #include "protosw.h" 112 #include "socket.h" 113 #include "vmmac.h" 114 #include "ioctl.h" 115 #include "errno.h" 116 #include "syslog.h" 117 #include "time.h" 118 #include "kernel.h" 119 120 #include "../net/if.h" 121 #include "../net/netisr.h" 122 #include "../net/route.h" 123 124 #ifdef INET 125 #include "../netinet/in.h" 126 #include "../netinet/in_systm.h" 127 #include "../netinet/in_var.h" 128 #include "../netinet/ip.h" 129 #include "../netinet/if_ether.h" 130 #endif 131 132 #ifdef NS 133 #include "../netns/ns.h" 134 #include "../netns/ns_if.h" 135 #endif 136 137 #include "../vax/cpu.h" 138 #include "../vax/mtpr.h" 139 #include "if_qereg.h" 140 #include "if_uba.h" 141 #include "../vaxuba/ubareg.h" 142 #include "../vaxuba/ubavar.h" 143 144 #if NQE > 1 145 #define NRCV 15 /* Receive descriptors */ 146 #else 147 #define NRCV 20 /* Receive descriptors */ 148 #endif 149 #define NXMT 5 /* Transmit descriptors */ 150 #define NTOT (NXMT + NRCV) 151 152 /* 153 * This constant should really be 60 because the qna adds 4 bytes of crc. 154 * However when set to 60 our packets are ignored by deuna's , 3coms are 155 * okay ?????????????????????????????????????????? 156 */ 157 #define MINDATA 64 158 159 /* 160 * Ethernet software status per interface. 161 * 162 * Each interface is referenced by a network interface structure, 163 * is_if, which the routing code uses to locate the interface. 164 * This structure contains the output queue for the interface, its address, ... 165 */ 166 struct qe_softc { 167 struct arpcom is_ac; /* Ethernet common part */ 168 #define is_if is_ac.ac_if /* network-visible interface */ 169 #define is_addr is_ac.ac_enaddr /* hardware Ethernet address */ 170 struct ifubinfo qe_uba; /* Q-bus resources */ 171 struct ifrw qe_ifr[NRCV]; /* for receive buffers; */ 172 struct ifxmt qe_ifw[NXMT]; /* for xmit buffers; */ 173 int qe_flags; /* software state */ 174 #define QEF_RUNNING 0x01 175 #define QEF_SETADDR 0x02 176 int setupaddr; /* mapping info for setup pkts */ 177 struct qe_ring *rringaddr; /* mapping info for rings */ 178 struct qe_ring *tringaddr; /* "" */ 179 struct qe_ring rring[NRCV+1]; /* Receive ring descriptors */ 180 struct qe_ring tring[NXMT+1]; /* Transmit ring descriptors */ 181 u_char setup_pkt[16][8]; /* Setup packet */ 182 int rindex; /* Receive index */ 183 int tindex; /* Transmit index */ 184 int otindex; /* Old transmit index */ 185 int qe_intvec; /* Interrupt vector */ 186 struct qedevice *addr; /* device addr */ 187 int setupqueued; /* setup packet queued */ 188 int nxmit; /* Transmits in progress */ 189 int timeout; /* watchdog */ 190 int qe_restarts; /* timeouts */ 191 } qe_softc[NQE]; 192 193 struct uba_device *qeinfo[NQE]; 194 195 extern struct timeval time; 196 extern timeout(); 197 198 int qeprobe(), qeattach(), qeintr(), qewatch(); 199 int qeinit(),qeoutput(),qeioctl(),qereset(),qewatch(); 200 201 u_short qestd[] = { 0 }; 202 struct uba_driver qedriver = 203 { qeprobe, 0, qeattach, 0, qestd, "qe", qeinfo }; 204 205 #define QE_TIMEO (15) 206 #define QEUNIT(x) minor(x) 207 static int mask = 0x3ffff; /* address mask */ 208 int qewatchrun = 0; /* watchdog running */ 209 /* 210 * The deqna shouldn't receive more than ETHERMTU + sizeof(struct ether_header) 211 * but will actually take in up to 2048 bytes. To guard against the receiver 212 * chaining buffers (which we aren't prepared to handle) we allocate 2kb 213 * size buffers. 214 */ 215 #define MAXPACKETSIZE 2048 /* Should really be ETHERMTU */ 216 /* 217 * Probe the QNA to see if it's there 218 */ 219 qeprobe(reg) 220 caddr_t reg; 221 { 222 register int br, cvec; /* r11, r10 value-result */ 223 register struct qedevice *addr = (struct qedevice *)reg; 224 register struct qe_ring *rp; 225 register struct qe_ring *prp; /* physical rp */ 226 register int i, j; 227 static int next=0; /* softc index */ 228 register struct qe_softc *sc = &qe_softc[next++]; 229 230 #ifdef lint 231 br = 0; cvec = br; br = cvec; 232 qeintr(0); 233 #endif 234 /* 235 * Set the address mask for the particular cpu 236 */ 237 mask = 0x3ffff; 238 239 /* 240 * The QNA interrupts on i/o operations. To do an I/O operation 241 * we have to setup the interface by transmitting a setup packet. 242 */ 243 addr->qe_csr = QE_RESET; 244 addr->qe_vector = (uba_hd[numuba].uh_lastiv -= 4); 245 246 /* 247 * Map the communications area and the setup packet. 248 */ 249 sc->setupaddr = 250 uballoc(0, (caddr_t)sc->setup_pkt, sizeof(sc->setup_pkt), 0); 251 sc->rringaddr = (struct qe_ring *) uballoc(0, (caddr_t)sc->rring, 252 sizeof(struct qe_ring) * (NTOT+2), 0); 253 prp = (struct qe_ring *)((int)sc->rringaddr & mask); 254 255 /* 256 * The QNA will loop the setup packet back to the receive ring 257 * for verification, therefore we initialize the first 258 * receive & transmit ring descriptors and link the setup packet 259 * to them. 260 */ 261 qeinitdesc(sc->tring, (caddr_t)(sc->setupaddr & mask), 262 sizeof(sc->setup_pkt)); 263 qeinitdesc(sc->rring, (caddr_t)(sc->setupaddr & mask), 264 sizeof(sc->setup_pkt)); 265 266 rp = (struct qe_ring *)sc->tring; 267 rp->qe_setup = 1; 268 rp->qe_eomsg = 1; 269 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 270 rp->qe_valid = 1; 271 272 rp = (struct qe_ring *)sc->rring; 273 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 274 rp->qe_valid = 1; 275 276 /* 277 * Get the addr off of the interface and place it into the setup 278 * packet. This code looks strange due to the fact that the address 279 * is placed in the setup packet in col. major order. 280 */ 281 for( i = 0 ; i < 6 ; i++ ) 282 sc->setup_pkt[i][1] = addr->qe_sta_addr[i]; 283 284 qesetup( sc ); 285 /* 286 * Start the interface and wait for the packet. 287 */ 288 j = cvec; 289 addr->qe_csr = QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT; 290 addr->qe_rcvlist_lo = (short)prp; 291 addr->qe_rcvlist_hi = (short)((int)prp >> 16); 292 prp += NRCV+1; 293 addr->qe_xmtlist_lo = (short)prp; 294 addr->qe_xmtlist_hi = (short)((int)prp >> 16); 295 DELAY(10000); 296 /* 297 * All done with the bus resources. 298 */ 299 ubarelse(0, &sc->setupaddr); 300 ubarelse(0, (int *)&sc->rringaddr); 301 if( cvec == j ) 302 return 0; /* didn't interrupt */ 303 304 return( sizeof(struct qedevice) ); 305 } 306 307 /* 308 * Interface exists: make available by filling in network interface 309 * record. System will initialize the interface when it is ready 310 * to accept packets. 311 */ 312 qeattach(ui) 313 struct uba_device *ui; 314 { 315 register struct qe_softc *sc = &qe_softc[ui->ui_unit]; 316 register struct ifnet *ifp = &sc->is_if; 317 register struct qedevice *addr = (struct qedevice *)ui->ui_addr; 318 register int i; 319 320 ifp->if_unit = ui->ui_unit; 321 ifp->if_name = "qe"; 322 ifp->if_mtu = ETHERMTU; 323 ifp->if_flags = IFF_BROADCAST; 324 325 /* 326 * Read the address from the prom and save it. 327 */ 328 for( i=0 ; i<6 ; i++ ) 329 sc->setup_pkt[i][1] = sc->is_addr[i] = addr->qe_sta_addr[i] & 0xff; 330 331 /* 332 * Save the vector for initialization at reset time. 333 */ 334 sc->qe_intvec = addr->qe_vector; 335 336 ifp->if_init = qeinit; 337 ifp->if_output = qeoutput; 338 ifp->if_ioctl = qeioctl; 339 ifp->if_reset = qereset; 340 sc->qe_uba.iff_flags = UBA_CANTWAIT; 341 if_attach(ifp); 342 } 343 344 /* 345 * Reset of interface after UNIBUS reset. 346 * If interface is on specified uba, reset its state. 347 */ 348 qereset(unit, uban) 349 int unit, uban; 350 { 351 register struct uba_device *ui; 352 353 if (unit >= NQE || (ui = qeinfo[unit]) == 0 || ui->ui_alive == 0 || 354 ui->ui_ubanum != uban) 355 return; 356 printf(" qe%d", unit); 357 qe_softc[unit].is_if.if_flags &= ~IFF_RUNNING; 358 qeinit(unit); 359 } 360 361 /* 362 * Initialization of interface. 363 */ 364 qeinit(unit) 365 int unit; 366 { 367 register struct qe_softc *sc = &qe_softc[unit]; 368 register struct uba_device *ui = qeinfo[unit]; 369 register struct qedevice *addr = (struct qedevice *)ui->ui_addr; 370 register struct ifnet *ifp = &sc->is_if; 371 register i; 372 int s; 373 374 /* address not known */ 375 if (ifp->if_addrlist == (struct ifaddr *)0) 376 return; 377 if (sc->qe_flags & QEF_RUNNING) 378 return; 379 380 if ((ifp->if_flags & IFF_RUNNING) == 0) { 381 /* 382 * map the communications area onto the device 383 */ 384 sc->rringaddr = (struct qe_ring *) 385 ((int) uballoc(0, (caddr_t)sc->rring, 386 sizeof(struct qe_ring) * (NTOT+2), 0) & mask); 387 sc->tringaddr = sc->rringaddr + NRCV + 1; 388 sc->setupaddr = uballoc(0, (caddr_t)sc->setup_pkt, 389 sizeof(sc->setup_pkt), 0) & mask; 390 /* 391 * init buffers and maps 392 */ 393 if (if_ubaminit(&sc->qe_uba, ui->ui_ubanum, 394 sizeof (struct ether_header), (int)btoc(MAXPACKETSIZE), 395 sc->qe_ifr, NRCV, sc->qe_ifw, NXMT) == 0) { 396 printf("qe%d: can't initialize\n", unit); 397 sc->is_if.if_flags &= ~IFF_UP; 398 return; 399 } 400 } 401 /* 402 * Init the buffer descriptors and indexes for each of the lists and 403 * loop them back to form a ring. 404 */ 405 for (i = 0; i < NRCV; i++) { 406 qeinitdesc( &sc->rring[i], 407 (caddr_t)(sc->qe_ifr[i].ifrw_info & mask), MAXPACKETSIZE); 408 sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET; 409 sc->rring[i].qe_valid = 1; 410 } 411 qeinitdesc(&sc->rring[i], (caddr_t)NULL, 0); 412 413 sc->rring[i].qe_addr_lo = (short)sc->rringaddr; 414 sc->rring[i].qe_addr_hi = (short)((int)sc->rringaddr >> 16); 415 sc->rring[i].qe_chain = 1; 416 sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET; 417 sc->rring[i].qe_valid = 1; 418 419 for( i = 0 ; i <= NXMT ; i++ ) 420 qeinitdesc(&sc->tring[i], (caddr_t)NULL, 0); 421 i--; 422 423 sc->tring[i].qe_addr_lo = (short)sc->tringaddr; 424 sc->tring[i].qe_addr_hi = (short)((int)sc->tringaddr >> 16); 425 sc->tring[i].qe_chain = 1; 426 sc->tring[i].qe_flag = sc->tring[i].qe_status1 = QE_NOTYET; 427 sc->tring[i].qe_valid = 1; 428 429 sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0; 430 431 /* 432 * Take the interface out of reset, program the vector, 433 * enable interrupts, and tell the world we are up. 434 */ 435 s = splimp(); 436 addr->qe_vector = sc->qe_intvec; 437 sc->addr = addr; 438 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | 439 QE_RCV_INT | QE_ILOOP; 440 addr->qe_rcvlist_lo = (short)sc->rringaddr; 441 addr->qe_rcvlist_hi = (short)((int)sc->rringaddr >> 16); 442 ifp->if_flags |= IFF_UP | IFF_RUNNING; 443 sc->qe_flags |= QEF_RUNNING; 444 qesetup( sc ); 445 qestart( unit ); 446 splx( s ); 447 448 } 449 450 /* 451 * Start output on interface. 452 * 453 */ 454 qestart(dev) 455 dev_t dev; 456 { 457 int unit = QEUNIT(dev); 458 struct uba_device *ui = qeinfo[unit]; 459 register struct qe_softc *sc = &qe_softc[unit]; 460 register struct qedevice *addr; 461 register struct qe_ring *rp; 462 register index; 463 struct mbuf *m; 464 int buf_addr, len, s; 465 466 467 s = splimp(); 468 addr = (struct qedevice *)ui->ui_addr; 469 /* 470 * The deqna doesn't look at anything but the valid bit 471 * to determine if it should transmit this packet. If you have 472 * a ring and fill it the device will loop indefinately on the 473 * packet and continue to flood the net with packets until you 474 * break the ring. For this reason we never queue more than n-1 475 * packets in the transmit ring. 476 * 477 * The microcoders should have obeyed their own defination of the 478 * flag and status words, but instead we have to compensate. 479 */ 480 for( index = sc->tindex; 481 sc->tring[index].qe_valid == 0 && sc->nxmit < (NXMT-1) ; 482 sc->tindex = index = ++index % NXMT){ 483 rp = &sc->tring[index]; 484 if( sc->setupqueued ) { 485 buf_addr = sc->setupaddr; 486 len = 128; 487 rp->qe_setup = 1; 488 sc->setupqueued = 0; 489 } else { 490 IF_DEQUEUE(&sc->is_if.if_snd, m); 491 if( m == 0 ){ 492 splx(s); 493 return; 494 } 495 buf_addr = sc->qe_ifw[index].ifw_info; 496 len = if_ubaput(&sc->qe_uba, &sc->qe_ifw[index], m); 497 } 498 /* 499 * Does buffer end on odd byte ? 500 */ 501 if( len & 1 ) { 502 len++; 503 rp->qe_odd_end = 1; 504 } 505 if( len < MINDATA ) 506 len = MINDATA; 507 rp->qe_buf_len = -(len/2); 508 buf_addr &= mask; 509 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 510 rp->qe_addr_lo = (short)buf_addr; 511 rp->qe_addr_hi = (short)(buf_addr >> 16); 512 rp->qe_eomsg = 1; 513 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 514 rp->qe_valid = 1; 515 sc->nxmit++; 516 /* 517 * If the watchdog time isn't running kick it. 518 */ 519 sc->timeout=1; 520 if (qewatchrun == 0) { 521 qewatchrun++; 522 timeout(qewatch, (caddr_t)0, QE_TIMEO); 523 } 524 525 /* 526 * See if the xmit list is invalid. 527 */ 528 if( addr->qe_csr & QE_XL_INVALID ) { 529 buf_addr = (int)(sc->tringaddr+index); 530 addr->qe_xmtlist_lo = (short)buf_addr; 531 addr->qe_xmtlist_hi = (short)(buf_addr >> 16); 532 } 533 } 534 splx( s ); 535 } 536 537 /* 538 * Ethernet interface interrupt processor 539 */ 540 qeintr(unit) 541 int unit; 542 { 543 register struct qe_softc *sc = &qe_softc[unit]; 544 struct qedevice *addr = (struct qedevice *)qeinfo[unit]->ui_addr; 545 int s, buf_addr, csr; 546 547 s = splimp(); 548 csr = addr->qe_csr; 549 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT | QE_ILOOP; 550 if( csr & QE_RCV_INT ) 551 qerint( unit ); 552 if( csr & QE_XMIT_INT ) 553 qetint( unit ); 554 if( csr & QE_NEX_MEM_INT ) 555 panic("qe: Non existant memory interrupt"); 556 557 if( addr->qe_csr & QE_RL_INVALID && sc->rring[sc->rindex].qe_status1 == QE_NOTYET ) { 558 buf_addr = (int)&sc->rringaddr[sc->rindex]; 559 addr->qe_rcvlist_lo = (short)buf_addr; 560 addr->qe_rcvlist_hi = (short)(buf_addr >> 16); 561 } 562 splx( s ); 563 } 564 565 /* 566 * Ethernet interface transmit interrupt. 567 */ 568 569 qetint(unit) 570 int unit; 571 { 572 register struct qe_softc *sc = &qe_softc[unit]; 573 register struct qe_ring *rp; 574 register struct ifxmt *ifxp; 575 int status1, setupflag; 576 short len; 577 578 579 while( sc->otindex != sc->tindex && sc->tring[sc->otindex].qe_status1 != QE_NOTYET && sc->nxmit > 0 ) { 580 /* 581 * Save the status words from the descriptor so that it can 582 * be released. 583 */ 584 rp = &sc->tring[sc->otindex]; 585 status1 = rp->qe_status1; 586 setupflag = rp->qe_setup; 587 len = (-rp->qe_buf_len) * 2; 588 if( rp->qe_odd_end ) 589 len++; 590 /* 591 * Init the buffer descriptor 592 */ 593 bzero((caddr_t)rp, sizeof(struct qe_ring)); 594 if( --sc->nxmit == 0 ) 595 sc->timeout = 0; 596 if( !setupflag ) { 597 /* 598 * Do some statistics. 599 */ 600 sc->is_if.if_opackets++; 601 sc->is_if.if_collisions += ( status1 & QE_CCNT ) >> 4; 602 if (status1 & QE_ERROR) 603 sc->is_if.if_oerrors++; 604 /* 605 * If this was a broadcast packet loop it 606 * back because the hardware can't hear its own 607 * transmits. 608 */ 609 ifxp = &sc->qe_ifw[sc->otindex]; 610 if (bcmp((caddr_t)ifxp->ifw_addr, 611 (caddr_t)etherbroadcastaddr, 612 sizeof(etherbroadcastaddr)) == 0) 613 qeread(sc, &ifxp->ifrw, len); 614 if (ifxp->ifw_xtofree) { 615 m_freem(ifxp->ifw_xtofree); 616 ifxp->ifw_xtofree = 0; 617 } 618 } 619 sc->otindex = ++sc->otindex % NXMT; 620 } 621 qestart( unit ); 622 } 623 624 /* 625 * Ethernet interface receiver interrupt. 626 * If can't determine length from type, then have to drop packet. 627 * Othewise decapsulate packet based on type and pass to type specific 628 * higher-level input routine. 629 */ 630 qerint(unit) 631 int unit; 632 { 633 register struct qe_softc *sc = &qe_softc[unit]; 634 register struct qe_ring *rp; 635 int len, status1, status2; 636 int bufaddr; 637 638 /* 639 * Traverse the receive ring looking for packets to pass back. 640 * The search is complete when we find a descriptor not in use. 641 * 642 * As in the transmit case the deqna doesn't honor it's own protocols 643 * so there exists the possibility that the device can beat us around 644 * the ring. The proper way to guard against this is to insure that 645 * there is always at least one invalid descriptor. We chose instead 646 * to make the ring large enough to minimize the problem. With a ring 647 * size of 4 we haven't been able to see the problem. To be safe we 648 * doubled that to 8. 649 * 650 */ 651 for( ; sc->rring[sc->rindex].qe_status1 != QE_NOTYET ; sc->rindex = ++sc->rindex % NRCV ){ 652 rp = &sc->rring[sc->rindex]; 653 status1 = rp->qe_status1; 654 status2 = rp->qe_status2; 655 bzero((caddr_t)rp, sizeof(struct qe_ring)); 656 if( (status1 & QE_MASK) == QE_MASK ) 657 panic("qe: chained packet"); 658 len = ((status1 & QE_RBL_HI) | (status2 & QE_RBL_LO)) + 60; 659 sc->is_if.if_ipackets++; 660 661 if (status1 & QE_ERROR) 662 sc->is_if.if_ierrors++; 663 else { 664 /* 665 * We don't process setup packets. 666 */ 667 if( !(status1 & QE_ESETUP) ) 668 qeread(sc, &sc->qe_ifr[sc->rindex], 669 len - sizeof(struct ether_header)); 670 } 671 /* 672 * Return the buffer to the ring 673 */ 674 bufaddr = (int)sc->qe_ifr[sc->rindex].ifrw_info & mask; 675 rp->qe_buf_len = -((MAXPACKETSIZE)/2); 676 rp->qe_addr_lo = (short)bufaddr; 677 rp->qe_addr_hi = (short)((int)bufaddr >> 16); 678 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 679 rp->qe_valid = 1; 680 } 681 } 682 /* 683 * Ethernet output routine. 684 * Encapsulate a packet of type family for the local net. 685 * Use trailer local net encapsulation if enough data in first 686 * packet leaves a multiple of 512 bytes of data in remainder. 687 */ 688 qeoutput(ifp, m0, dst) 689 struct ifnet *ifp; 690 struct mbuf *m0; 691 struct sockaddr *dst; 692 { 693 int type, s, error; 694 u_char edst[6]; 695 struct in_addr idst; 696 register struct qe_softc *is = &qe_softc[ifp->if_unit]; 697 register struct mbuf *m = m0; 698 register struct ether_header *eh; 699 register int off; 700 int usetrailers; 701 702 if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) != (IFF_UP|IFF_RUNNING)) { 703 error = ENETDOWN; 704 goto bad; 705 } 706 707 switch (dst->sa_family) { 708 709 #ifdef INET 710 case AF_INET: 711 idst = ((struct sockaddr_in *)dst)->sin_addr; 712 if (!arpresolve(&is->is_ac, m, &idst, edst, &usetrailers)) 713 return (0); /* if not yet resolved */ 714 off = ntohs((u_short)mtod(m, struct ip *)->ip_len) - m->m_len; 715 if (usetrailers && off > 0 && (off & 0x1ff) == 0 && 716 m->m_off >= MMINOFF + 2 * sizeof (u_short)) { 717 type = ETHERTYPE_TRAIL + (off>>9); 718 m->m_off -= 2 * sizeof (u_short); 719 m->m_len += 2 * sizeof (u_short); 720 *mtod(m, u_short *) = htons((u_short)ETHERTYPE_IP); 721 *(mtod(m, u_short *) + 1) = htons((u_short)m->m_len); 722 goto gottrailertype; 723 } 724 type = ETHERTYPE_IP; 725 off = 0; 726 goto gottype; 727 #endif 728 #ifdef NS 729 case AF_NS: 730 type = ETHERTYPE_NS; 731 bcopy((caddr_t)&(((struct sockaddr_ns *)dst)->sns_addr.x_host), 732 (caddr_t)edst, sizeof (edst)); 733 off = 0; 734 goto gottype; 735 #endif 736 737 738 case AF_UNSPEC: 739 eh = (struct ether_header *)dst->sa_data; 740 bcopy((caddr_t)eh->ether_dhost, (caddr_t)edst, sizeof (edst)); 741 type = eh->ether_type; 742 goto gottype; 743 744 default: 745 printf("qe%d: can't handle af%d\n", ifp->if_unit, 746 dst->sa_family); 747 error = EAFNOSUPPORT; 748 goto bad; 749 } 750 751 gottrailertype: 752 /* 753 * Packet to be sent as trailer: move first packet 754 * (control information) to end of chain. 755 */ 756 while (m->m_next) 757 m = m->m_next; 758 m->m_next = m0; 759 m = m0->m_next; 760 m0->m_next = 0; 761 m0 = m; 762 763 gottype: 764 /* 765 * Add local net header. If no space in first mbuf, 766 * allocate another. 767 */ 768 if (m->m_off > MMAXOFF || 769 MMINOFF + sizeof (struct ether_header) > m->m_off) { 770 m = m_get(M_DONTWAIT, MT_HEADER); 771 if (m == 0) { 772 error = ENOBUFS; 773 goto bad; 774 } 775 m->m_next = m0; 776 m->m_off = MMINOFF; 777 m->m_len = sizeof (struct ether_header); 778 } else { 779 m->m_off -= sizeof (struct ether_header); 780 m->m_len += sizeof (struct ether_header); 781 } 782 eh = mtod(m, struct ether_header *); 783 eh->ether_type = htons((u_short)type); 784 bcopy((caddr_t)edst, (caddr_t)eh->ether_dhost, sizeof (edst)); 785 bcopy((caddr_t)is->is_addr, (caddr_t)eh->ether_shost, sizeof (is->is_addr)); 786 787 /* 788 * Queue message on interface, and start output if interface 789 * not yet active. 790 */ 791 s = splimp(); 792 if (IF_QFULL(&ifp->if_snd)) { 793 IF_DROP(&ifp->if_snd); 794 splx(s); 795 m_freem(m); 796 return (ENOBUFS); 797 } 798 IF_ENQUEUE(&ifp->if_snd, m); 799 qestart(ifp->if_unit); 800 splx(s); 801 return (0); 802 803 bad: 804 m_freem(m0); 805 return (error); 806 } 807 808 809 /* 810 * Process an ioctl request. 811 */ 812 qeioctl(ifp, cmd, data) 813 register struct ifnet *ifp; 814 int cmd; 815 caddr_t data; 816 { 817 struct qe_softc *sc = &qe_softc[ifp->if_unit]; 818 struct ifaddr *ifa = (struct ifaddr *)data; 819 int s = splimp(), error = 0; 820 821 switch (cmd) { 822 823 case SIOCSIFADDR: 824 ifp->if_flags |= IFF_UP; 825 qeinit(ifp->if_unit); 826 switch(ifa->ifa_addr.sa_family) { 827 #ifdef INET 828 case AF_INET: 829 ((struct arpcom *)ifp)->ac_ipaddr = 830 IA_SIN(ifa)->sin_addr; 831 arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr); 832 break; 833 #endif 834 #ifdef NS 835 case AF_NS: 836 { 837 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); 838 839 if (ns_nullhost(*ina)) 840 ina->x_host = *(union ns_host *)(sc->is_addr); 841 else 842 qe_setaddr(ina->x_host.c_host, ifp->if_unit); 843 break; 844 } 845 #endif 846 } 847 break; 848 849 case SIOCSIFFLAGS: 850 if ((ifp->if_flags & IFF_UP) == 0 && 851 sc->qe_flags & QEF_RUNNING) { 852 ((struct qedevice *) 853 (qeinfo[ifp->if_unit]->ui_addr))->qe_csr = QE_RESET; 854 sc->qe_flags &= ~QEF_RUNNING; 855 } else if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) == 856 IFF_RUNNING && (sc->qe_flags & QEF_RUNNING) == 0) 857 qerestart(sc); 858 break; 859 860 default: 861 error = EINVAL; 862 863 } 864 splx(s); 865 return (error); 866 } 867 868 /* 869 * set ethernet address for unit 870 */ 871 qe_setaddr(physaddr, unit) 872 u_char *physaddr; 873 int unit; 874 { 875 register struct qe_softc *sc = &qe_softc[unit]; 876 register int i; 877 878 for (i = 0; i < 6; i++) 879 sc->setup_pkt[i][1] = sc->is_addr[i] = physaddr[i]; 880 sc->qe_flags |= QEF_SETADDR; 881 if (sc->is_if.if_flags & IFF_RUNNING) 882 qesetup(sc); 883 qeinit(unit); 884 } 885 886 887 /* 888 * Initialize a ring descriptor with mbuf allocation side effects 889 */ 890 qeinitdesc(rp, addr, len) 891 register struct qe_ring *rp; 892 caddr_t addr; /* mapped address */ 893 int len; 894 { 895 /* 896 * clear the entire descriptor 897 */ 898 bzero((caddr_t)rp, sizeof(struct qe_ring)); 899 900 if( len ) { 901 rp->qe_buf_len = -(len/2); 902 rp->qe_addr_lo = (short)addr; 903 rp->qe_addr_hi = (short)((int)addr >> 16); 904 } 905 } 906 /* 907 * Build a setup packet - the physical address will already be present 908 * in first column. 909 */ 910 qesetup( sc ) 911 struct qe_softc *sc; 912 { 913 register i, j; 914 915 /* 916 * Copy the target address to the rest of the entries in this row. 917 */ 918 for ( j = 0; j < 6 ; j++ ) 919 for ( i = 2 ; i < 8 ; i++ ) 920 sc->setup_pkt[j][i] = sc->setup_pkt[j][1]; 921 /* 922 * Duplicate the first half. 923 */ 924 bcopy((caddr_t)sc->setup_pkt[0], (caddr_t)sc->setup_pkt[8], 64); 925 /* 926 * Fill in the broadcast address. 927 */ 928 for ( i = 0; i < 6 ; i++ ) 929 sc->setup_pkt[i][2] = 0xff; 930 sc->setupqueued++; 931 } 932 933 /* 934 * Pass a packet to the higher levels. 935 * We deal with the trailer protocol here. 936 */ 937 qeread(sc, ifrw, len) 938 register struct qe_softc *sc; 939 struct ifrw *ifrw; 940 int len; 941 { 942 struct ether_header *eh; 943 struct mbuf *m; 944 int off, resid; 945 struct ifqueue *inq; 946 947 /* 948 * Deal with trailer protocol: if type is INET trailer 949 * get true type from first 16-bit word past data. 950 * Remember that type was trailer by setting off. 951 */ 952 953 eh = (struct ether_header *)ifrw->ifrw_addr; 954 eh->ether_type = ntohs((u_short)eh->ether_type); 955 #define qedataaddr(eh, off, type) ((type)(((caddr_t)((eh)+1)+(off)))) 956 if (eh->ether_type >= ETHERTYPE_TRAIL && 957 eh->ether_type < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { 958 off = (eh->ether_type - ETHERTYPE_TRAIL) * 512; 959 if (off >= ETHERMTU) 960 return; /* sanity */ 961 eh->ether_type = ntohs(*qedataaddr(eh,off, u_short *)); 962 resid = ntohs(*(qedataaddr(eh, off+2, u_short *))); 963 if (off + resid > len) 964 return; /* sanity */ 965 len = off + resid; 966 } else 967 off = 0; 968 if (len == 0) 969 return; 970 971 /* 972 * Pull packet off interface. Off is nonzero if packet 973 * has trailing header; qeget will then force this header 974 * information to be at the front, but we still have to drop 975 * the type and length which are at the front of any trailer data. 976 */ 977 m = if_ubaget(&sc->qe_uba, ifrw, len, off, &sc->is_if); 978 979 if (m == 0) 980 return; 981 982 if (off) { 983 struct ifnet *ifp; 984 985 ifp = *(mtod(m, struct ifnet **)); 986 m->m_off += 2 * sizeof (u_short); 987 m->m_len -= 2 * sizeof (u_short); 988 *(mtod(m, struct ifnet **)) = ifp; 989 } 990 switch (eh->ether_type) { 991 992 #ifdef INET 993 case ETHERTYPE_IP: 994 schednetisr(NETISR_IP); 995 inq = &ipintrq; 996 break; 997 998 case ETHERTYPE_ARP: 999 arpinput(&sc->is_ac, m); 1000 return; 1001 #endif 1002 #ifdef NS 1003 case ETHERTYPE_NS: 1004 schednetisr(NETISR_NS); 1005 inq = &nsintrq; 1006 break; 1007 1008 #endif 1009 1010 default: 1011 m_freem(m); 1012 return; 1013 } 1014 1015 if (IF_QFULL(inq)) { 1016 IF_DROP(inq); 1017 m_freem(m); 1018 return; 1019 } 1020 IF_ENQUEUE(inq, m); 1021 } 1022 1023 /* 1024 * Watchdog timer routine. There is a condition in the hardware that 1025 * causes the board to lock up under heavy load. This routine detects 1026 * the hang up and restarts the device. 1027 */ 1028 qewatch() 1029 { 1030 register struct qe_softc *sc; 1031 register int i; 1032 int inprogress=0; 1033 1034 for (i = 0; i < NQE; i++) { 1035 sc = &qe_softc[i]; 1036 if (sc->timeout) 1037 if (++sc->timeout > 3 ) { 1038 log(LOG_ERR, 1039 "qerestart: restarted qe%d %d\n", 1040 i, ++sc->qe_restarts); 1041 qerestart(sc); 1042 } else 1043 inprogress++; 1044 } 1045 if (inprogress) { 1046 timeout(qewatch, (caddr_t)0, QE_TIMEO); 1047 qewatchrun++; 1048 } else 1049 qewatchrun=0; 1050 } 1051 /* 1052 * Restart for board lockup problem. 1053 */ 1054 qerestart(sc) 1055 register struct qe_softc *sc; 1056 { 1057 register struct ifnet *ifp = &sc->is_if; 1058 register struct qedevice *addr = sc->addr; 1059 register struct qe_ring *rp; 1060 register i; 1061 1062 addr->qe_csr = QE_RESET; 1063 sc->timeout = 0; 1064 qesetup( sc ); 1065 for (i = 0, rp = sc->tring; i < NXMT; rp++, i++) { 1066 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 1067 rp->qe_valid = 0; 1068 } 1069 sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0; 1070 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | 1071 QE_RCV_INT | QE_ILOOP; 1072 addr->qe_rcvlist_lo = (short)sc->rringaddr; 1073 addr->qe_rcvlist_hi = (short)((int)sc->rringaddr >> 16); 1074 sc->qe_flags |= QEF_RUNNING; 1075 qestart(ifp->if_unit); 1076 } 1077 #endif 1078