1 /* @(#)if_qe.c 6.2 (Berkeley) 05/31/86 */ 2 3 /* from @(#)if_qe.c 1.15 (ULTRIX) 4/16/86 */ 4 5 6 /**************************************************************** 7 * * 8 * Licensed from Digital Equipment Corporation * 9 * Copyright (c) * 10 * Digital Equipment Corporation * 11 * Maynard, Massachusetts * 12 * 1985, 1986 * 13 * All rights reserved. * 14 * * 15 * The Information in this software is subject to change * 16 * without notice and should not be construed as a commitment * 17 * by Digital Equipment Corporation. Digital makes no * 18 * representations about the suitability of this software for * 19 * any purpose. It is supplied "As Is" without expressed or * 20 * implied warranty. * 21 * * 22 * If the Regents of the University of California or its * 23 * licensees modify the software in a manner creating * 24 * derivative copyright rights, appropriate copyright * 25 * legends may be placed on the derivative work in addition * 26 * to that set forth above. * 27 * * 28 ****************************************************************/ 29 /* --------------------------------------------------------------------- 30 * Modification History 31 * 32 * 15-Apr-86 -- afd 33 * Rename "unused_multi" to "qunused_multi" for extending Generic 34 * kernel to MicroVAXen. 35 * 36 * 18-mar-86 -- jaw br/cvec changed to NOT use registers. 37 * 38 * 12 March 86 -- Jeff Chase 39 * Modified to handle the new MCLGET macro 40 * Changed if_qe_data.c to use more receive buffers 41 * Added a flag to poke with adb to log qe_restarts on console 42 * 43 * 19 Oct 85 -- rjl 44 * Changed the watch dog timer from 30 seconds to 3. VMS is using 45 * less than 1 second in their's. Also turned the printf into an 46 * mprintf. 47 * 48 * 09/16/85 -- Larry Cohen 49 * Add 43bsd alpha tape changes for subnet routing 50 * 51 * 1 Aug 85 -- rjl 52 * Panic on a non-existent memory interrupt and the case where a packet 53 * was chained. The first should never happen because non-existant 54 * memory interrupts cause a bus reset. The second should never happen 55 * because we hang 2k input buffers on the device. 56 * 57 * 1 Aug 85 -- rich 58 * Fixed the broadcast loopback code to handle Clusters without 59 * wedging the system. 60 * 61 * 27 Feb. 85 -- ejf 62 * Return default hardware address on ioctl request. 63 * 64 * 12 Feb. 85 -- ejf 65 * Added internal extended loopback capability. 66 * 67 * 27 Dec. 84 -- rjl 68 * Fixed bug that caused every other transmit descriptor to be used 69 * instead of every descriptor. 70 * 71 * 21 Dec. 84 -- rjl 72 * Added watchdog timer to mask hardware bug that causes device lockup. 73 * 74 * 18 Dec. 84 -- rjl 75 * Reworked driver to use q-bus mapping routines. MicroVAX-I now does 76 * copying instead of m-buf shuffleing. 77 * A number of deficencies in the hardware/firmware were compensated 78 * for. See comments in qestart and qerint. 79 * 80 * 14 Nov. 84 -- jf 81 * Added usage counts for multicast addresses. 82 * Updated general protocol support to allow access to the Ethernet 83 * header. 84 * 85 * 04 Oct. 84 -- jf 86 * Added support for new ioctls to add and delete multicast addresses 87 * and set the physical address. 88 * Add support for general protocols. 89 * 90 * 14 Aug. 84 -- rjl 91 * Integrated Shannon changes. (allow arp above 1024 and ? ) 92 * 93 * 13 Feb. 84 -- rjl 94 * 95 * Initial version of driver. derived from IL driver. 96 * 97 * --------------------------------------------------------------------- 98 */ 99 100 #include "qe.h" 101 #if NQE > 0 102 /* 103 * Digital Q-BUS to NI Adapter 104 */ 105 #include "../machine/pte.h" 106 107 #include "param.h" 108 #include "systm.h" 109 #include "mbuf.h" 110 #include "buf.h" 111 #include "protosw.h" 112 #include "socket.h" 113 #include "vmmac.h" 114 #include "ioctl.h" 115 #include "errno.h" 116 #include "syslog.h" 117 #include "time.h" 118 #include "kernel.h" 119 120 #include "../net/if.h" 121 #include "../net/netisr.h" 122 #include "../net/route.h" 123 124 #ifdef INET 125 #include "../netinet/in.h" 126 #include "../netinet/in_systm.h" 127 #include "../netinet/in_var.h" 128 #include "../netinet/ip.h" 129 #include "../netinet/if_ether.h" 130 #endif 131 132 #ifdef NS 133 #include "../netns/ns.h" 134 #include "../netns/ns_if.h" 135 #endif 136 137 #include "../vax/cpu.h" 138 #include "../vax/mtpr.h" 139 #include "if_qereg.h" 140 #include "if_uba.h" 141 #include "../vaxuba/ubareg.h" 142 #include "../vaxuba/ubavar.h" 143 144 #define NRCV 25 /* Receive descriptors */ 145 #define NXMT 5 /* Transmit descriptors */ 146 #define NTOT (NXMT + NRCV) 147 148 /* 149 * This constant should really be 60 because the qna adds 4 bytes of crc. 150 * However when set to 60 our packets are ignored by deuna's , 3coms are 151 * okay ?????????????????????????????????????????? 152 */ 153 #define MINDATA 64 154 155 /* 156 * Ethernet software status per interface. 157 * 158 * Each interface is referenced by a network interface structure, 159 * is_if, which the routing code uses to locate the interface. 160 * This structure contains the output queue for the interface, its address, ... 161 */ 162 struct qe_softc { 163 struct arpcom is_ac; /* Ethernet common part */ 164 #define is_if is_ac.ac_if /* network-visible interface */ 165 #define is_addr is_ac.ac_enaddr /* hardware Ethernet address */ 166 struct ifubinfo qe_uba; /* Q-bus resources */ 167 struct ifrw qe_ifr[NRCV]; /* for receive buffers; */ 168 struct ifxmt qe_ifw[NXMT]; /* for xmit buffers; */ 169 int qe_flags; /* software state */ 170 #define QEF_RUNNING 0x01 171 #define QEF_SETADDR 0x02 172 int setupaddr; /* mapping info for setup pkts */ 173 struct qe_ring *rringaddr; /* mapping info for rings */ 174 struct qe_ring *tringaddr; /* "" */ 175 struct qe_ring rring[NRCV+1]; /* Receive ring descriptors */ 176 struct qe_ring tring[NXMT+1]; /* Transmit ring descriptors */ 177 u_char setup_pkt[16][8]; /* Setup packet */ 178 int rindex; /* Receive index */ 179 int tindex; /* Transmit index */ 180 int otindex; /* Old transmit index */ 181 int qe_intvec; /* Interrupt vector */ 182 struct qedevice *addr; /* device addr */ 183 int setupqueued; /* setup packet queued */ 184 int nxmit; /* Transmits in progress */ 185 int timeout; /* watchdog */ 186 int qe_restarts; /* timeouts */ 187 } qe_softc[NQE]; 188 189 struct uba_device *qeinfo[NQE]; 190 191 extern struct timeval time; 192 extern timeout(); 193 194 int qeprobe(), qeattach(), qeint(), qewatch(); 195 int qeinit(),qeoutput(),qeioctl(),qereset(),qewatch(); 196 197 u_short qestd[] = { 0 }; 198 struct uba_driver qedriver = 199 { qeprobe, 0, qeattach, 0, qestd, "qe", qeinfo }; 200 201 #define QE_TIMEO (15) 202 #define QEUNIT(x) minor(x) 203 static int mask = 0x3ffff; /* address mask */ 204 int qewatchrun = 0; /* watchdog running */ 205 /* 206 * The deqna shouldn't receive more than ETHERMTU + sizeof(struct ether_header) 207 * but will actually take in up to 2048 bytes. To guard against the receiver 208 * chaining buffers (which we aren't prepared to handle) we allocate 2kb 209 * size buffers. 210 */ 211 #define MAXPACKETSIZE 2048 /* Should really be ETHERMTU */ 212 /* 213 * Probe the QNA to see if it's there 214 */ 215 qeprobe(reg) 216 caddr_t reg; 217 { 218 register int br, cvec; /* r11, r10 value-result */ 219 register struct qedevice *addr = (struct qedevice *)reg; 220 register struct qe_ring *rp; 221 register struct qe_ring *prp; /* physical rp */ 222 register int i, j; 223 static int next=0; /* softc index */ 224 register struct qe_softc *sc = &qe_softc[next++]; 225 226 #ifdef lint 227 br = 0; cvec = br; br = cvec; 228 qeintr(i); 229 #endif 230 /* 231 * Set the address mask for the particular cpu 232 */ 233 mask = 0x3ffff; 234 235 /* 236 * The QNA interrupts on i/o operations. To do an I/O operation 237 * we have to setup the interface by transmitting a setup packet. 238 */ 239 addr->qe_csr = QE_RESET; 240 addr->qe_vector = (uba_hd[numuba].uh_lastiv -= 4); 241 242 /* 243 * Map the communications area and the setup packet. 244 */ 245 sc->setupaddr = 246 uballoc(0, sc->setup_pkt, sizeof(sc->setup_pkt), 0); 247 sc->rringaddr = (struct qe_ring *) 248 uballoc(0, sc->rring, sizeof(struct qe_ring) * (NTOT+2), 0); 249 prp = (struct qe_ring *)((int)sc->rringaddr & mask); 250 251 /* 252 * The QNA will loop the setup packet back to the receive ring 253 * for verification, therefore we initialize the first 254 * receive & transmit ring descriptors and link the setup packet 255 * to them. 256 */ 257 qeinitdesc( sc->tring, sc->setupaddr & mask, sizeof(sc->setup_pkt)); 258 qeinitdesc( sc->rring, sc->setupaddr & mask, sizeof(sc->setup_pkt)); 259 260 rp = (struct qe_ring *)sc->tring; 261 rp->qe_setup = 1; 262 rp->qe_eomsg = 1; 263 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 264 rp->qe_valid = 1; 265 266 rp = (struct qe_ring *)sc->rring; 267 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 268 rp->qe_valid = 1; 269 270 /* 271 * Get the addr off of the interface and place it into the setup 272 * packet. This code looks strange due to the fact that the address 273 * is placed in the setup packet in col. major order. 274 */ 275 for( i = 0 ; i < 6 ; i++ ) 276 sc->setup_pkt[i][1] = addr->qe_sta_addr[i]; 277 278 qesetup( sc ); 279 /* 280 * Start the interface and wait for the packet. 281 */ 282 j = cvec; 283 addr->qe_csr = QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT; 284 addr->qe_rcvlist_lo = (short)prp; 285 addr->qe_rcvlist_hi = (short)((int)prp >> 16); 286 prp += NRCV+1; 287 addr->qe_xmtlist_lo = (short)prp; 288 addr->qe_xmtlist_hi = (short)((int)prp >> 16); 289 DELAY(10000); 290 /* 291 * All done with the bus resources. 292 */ 293 ubarelse(0, &sc->setupaddr); 294 ubarelse(0, &sc->rringaddr); 295 if( cvec == j ) 296 return 0; /* didn't interrupt */ 297 298 return( sizeof(struct qedevice) ); 299 } 300 301 /* 302 * Interface exists: make available by filling in network interface 303 * record. System will initialize the interface when it is ready 304 * to accept packets. 305 */ 306 qeattach(ui) 307 struct uba_device *ui; 308 { 309 register struct qe_softc *sc = &qe_softc[ui->ui_unit]; 310 register struct ifnet *ifp = &sc->is_if; 311 register struct qedevice *addr = (struct qedevice *)ui->ui_addr; 312 register int i; 313 314 ifp->if_unit = ui->ui_unit; 315 ifp->if_name = "qe"; 316 ifp->if_mtu = ETHERMTU; 317 ifp->if_flags = IFF_BROADCAST; 318 319 /* 320 * Read the address from the prom and save it. 321 */ 322 for( i=0 ; i<6 ; i++ ) 323 sc->setup_pkt[i][1] = sc->is_addr[i] = addr->qe_sta_addr[i] & 0xff; 324 325 /* 326 * Save the vector for initialization at reset time. 327 */ 328 sc->qe_intvec = addr->qe_vector; 329 330 ifp->if_init = qeinit; 331 ifp->if_output = qeoutput; 332 ifp->if_ioctl = qeioctl; 333 ifp->if_reset = qereset; 334 sc->qe_uba.iff_flags = UBA_CANTWAIT; 335 if_attach(ifp); 336 } 337 338 /* 339 * Reset of interface after UNIBUS reset. 340 * If interface is on specified uba, reset its state. 341 */ 342 qereset(unit, uban) 343 int unit, uban; 344 { 345 register struct uba_device *ui; 346 347 if (unit >= NQE || (ui = qeinfo[unit]) == 0 || ui->ui_alive == 0 || 348 ui->ui_ubanum != uban) 349 return; 350 printf(" qe%d", unit); 351 qe_softc[unit].is_if.if_flags &= ~IFF_RUNNING; 352 qeinit(unit); 353 } 354 355 /* 356 * Initialization of interface. 357 */ 358 qeinit(unit) 359 int unit; 360 { 361 register struct qe_softc *sc = &qe_softc[unit]; 362 register struct uba_device *ui = qeinfo[unit]; 363 register struct qedevice *addr = (struct qedevice *)ui->ui_addr; 364 register struct ifnet *ifp = &sc->is_if; 365 register i; 366 int s; 367 368 /* address not known */ 369 if (ifp->if_addrlist == (struct ifaddr *)0) 370 return; 371 if (sc->qe_flags & QEF_RUNNING) 372 return; 373 374 if ((ifp->if_flags & IFF_RUNNING) == 0) { 375 /* 376 * map the communications area onto the device 377 */ 378 sc->rringaddr = (struct qe_ring *)((int)uballoc(0, sc->rring, 379 sizeof(struct qe_ring) * (NTOT+2), 0) & mask); 380 sc->tringaddr = sc->rringaddr + NRCV + 1; 381 sc->setupaddr = uballoc(0, sc->setup_pkt, 382 sizeof(sc->setup_pkt), 0) & mask; 383 /* 384 * init buffers and maps 385 */ 386 if (if_ubaminit(&sc->qe_uba, ui->ui_ubanum, 387 sizeof (struct ether_header), (int)btoc(MAXPACKETSIZE), 388 sc->qe_ifr, NRCV, sc->qe_ifw, NXMT) == 0) { 389 printf("qe%d: can't initialize\n", unit); 390 sc->is_if.if_flags &= ~IFF_UP; 391 return; 392 } 393 } 394 /* 395 * Init the buffer descriptors and indexes for each of the lists and 396 * loop them back to form a ring. 397 */ 398 for (i = 0; i < NRCV; i++) { 399 qeinitdesc( &sc->rring[i], 400 sc->qe_ifr[i].ifrw_info & mask, MAXPACKETSIZE); 401 sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET; 402 sc->rring[i].qe_valid = 1; 403 } 404 qeinitdesc( &sc->rring[i], NULL, 0 ); 405 406 sc->rring[i].qe_addr_lo = (short)sc->rringaddr; 407 sc->rring[i].qe_addr_hi = (short)((int)sc->rringaddr >> 16); 408 sc->rring[i].qe_chain = 1; 409 sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET; 410 sc->rring[i].qe_valid = 1; 411 412 for( i = 0 ; i <= NXMT ; i++ ) 413 qeinitdesc( &sc->tring[i], NULL, 0 ); 414 i--; 415 416 sc->tring[i].qe_addr_lo = (short)sc->tringaddr; 417 sc->tring[i].qe_addr_hi = (short)((int)sc->tringaddr >> 16); 418 sc->tring[i].qe_chain = 1; 419 sc->tring[i].qe_flag = sc->tring[i].qe_status1 = QE_NOTYET; 420 sc->tring[i].qe_valid = 1; 421 422 sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0; 423 424 /* 425 * Take the interface out of reset, program the vector, 426 * enable interrupts, and tell the world we are up. 427 */ 428 s = splimp(); 429 addr->qe_vector = sc->qe_intvec; 430 sc->addr = addr; 431 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | 432 QE_RCV_INT | QE_ILOOP; 433 addr->qe_rcvlist_lo = (short)sc->rringaddr; 434 addr->qe_rcvlist_hi = (short)((int)sc->rringaddr >> 16); 435 ifp->if_flags |= IFF_UP | IFF_RUNNING; 436 sc->qe_flags |= QEF_RUNNING; 437 qesetup( sc ); 438 qestart( unit ); 439 splx( s ); 440 441 } 442 443 /* 444 * Start output on interface. 445 * 446 */ 447 qestart(dev) 448 dev_t dev; 449 { 450 int unit = QEUNIT(dev); 451 struct uba_device *ui = qeinfo[unit]; 452 register struct qe_softc *sc = &qe_softc[unit]; 453 register struct qedevice *addr; 454 register struct qe_ring *rp; 455 register index; 456 struct mbuf *m; 457 int buf_addr, len, s; 458 459 460 s = splimp(); 461 addr = (struct qedevice *)ui->ui_addr; 462 /* 463 * The deqna doesn't look at anything but the valid bit 464 * to determine if it should transmit this packet. If you have 465 * a ring and fill it the device will loop indefinately on the 466 * packet and continue to flood the net with packets until you 467 * break the ring. For this reason we never queue more than n-1 468 * packets in the transmit ring. 469 * 470 * The microcoders should have obeyed their own defination of the 471 * flag and status words, but instead we have to compensate. 472 */ 473 for( index = sc->tindex; 474 sc->tring[index].qe_valid == 0 && sc->nxmit < (NXMT-1) ; 475 sc->tindex = index = ++index % NXMT){ 476 rp = &sc->tring[index]; 477 if( sc->setupqueued ) { 478 buf_addr = sc->setupaddr; 479 len = 128; 480 rp->qe_setup = 1; 481 sc->setupqueued = 0; 482 } else { 483 IF_DEQUEUE(&sc->is_if.if_snd, m); 484 if( m == 0 ){ 485 splx(s); 486 return; 487 } 488 buf_addr = sc->qe_ifw[index].ifw_info; 489 len = if_ubaput(&sc->qe_uba, &sc->qe_ifw[index], m); 490 } 491 /* 492 * Does buffer end on odd byte ? 493 */ 494 if( len & 1 ) { 495 len++; 496 rp->qe_odd_end = 1; 497 } 498 if( len < MINDATA ) 499 len = MINDATA; 500 rp->qe_buf_len = -(len/2); 501 buf_addr &= mask; 502 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 503 rp->qe_addr_lo = (short)buf_addr; 504 rp->qe_addr_hi = (short)(buf_addr >> 16); 505 rp->qe_eomsg = 1; 506 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 507 rp->qe_valid = 1; 508 sc->nxmit++; 509 /* 510 * If the watchdog time isn't running kick it. 511 */ 512 sc->timeout=1; 513 if( !qewatchrun++ ) 514 timeout(qewatch,0,QE_TIMEO); 515 516 /* 517 * See if the xmit list is invalid. 518 */ 519 if( addr->qe_csr & QE_XL_INVALID ) { 520 buf_addr = (int)(sc->tringaddr+index); 521 addr->qe_xmtlist_lo = (short)buf_addr; 522 addr->qe_xmtlist_hi = (short)(buf_addr >> 16); 523 } 524 } 525 splx( s ); 526 } 527 528 /* 529 * Ethernet interface interrupt processor 530 */ 531 qeintr(unit) 532 int unit; 533 { 534 register struct qe_softc *sc = &qe_softc[unit]; 535 struct qedevice *addr = (struct qedevice *)qeinfo[unit]->ui_addr; 536 int s, buf_addr, csr; 537 538 s = splimp(); 539 csr = addr->qe_csr; 540 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT | QE_ILOOP; 541 if( csr & QE_RCV_INT ) 542 qerint( unit ); 543 if( csr & QE_XMIT_INT ) 544 qetint( unit ); 545 if( csr & QE_NEX_MEM_INT ) 546 panic("qe: Non existant memory interrupt"); 547 548 if( addr->qe_csr & QE_RL_INVALID && sc->rring[sc->rindex].qe_status1 == QE_NOTYET ) { 549 buf_addr = (int)&sc->rringaddr[sc->rindex]; 550 addr->qe_rcvlist_lo = (short)buf_addr; 551 addr->qe_rcvlist_hi = (short)(buf_addr >> 16); 552 } 553 splx( s ); 554 } 555 556 /* 557 * Ethernet interface transmit interrupt. 558 */ 559 560 qetint(unit) 561 int unit; 562 { 563 register struct qe_softc *sc = &qe_softc[unit]; 564 register struct qe_ring *rp; 565 register struct ifxmt *ifxp; 566 int status1, setupflag; 567 short len; 568 569 570 while( sc->otindex != sc->tindex && sc->tring[sc->otindex].qe_status1 != QE_NOTYET && sc->nxmit > 0 ) { 571 /* 572 * Save the status words from the descriptor so that it can 573 * be released. 574 */ 575 rp = &sc->tring[sc->otindex]; 576 status1 = rp->qe_status1; 577 status2 = rp->qe_status2; 578 setupflag = rp->qe_setup; 579 len = (-rp->qe_buf_len) * 2; 580 if( rp->qe_odd_end ) 581 len++; 582 /* 583 * Init the buffer descriptor 584 */ 585 bzero( rp, sizeof(struct qe_ring)); 586 if( --sc->nxmit == 0 ) 587 sc->timeout = 0; 588 if( !setupflag ) { 589 /* 590 * Do some statistics. 591 */ 592 sc->is_if.if_opackets++; 593 sc->is_if.if_collisions += ( status1 & QE_CCNT ) >> 4; 594 if (status1 & QE_ERROR) 595 sc->is_if.if_oerrors++; 596 /* 597 * If this was a broadcast packet loop it 598 * back because the hardware can't hear its own 599 * transmits. 600 */ 601 ifxp = &sc->qe_ifw[sc->otindex]; 602 if (bcmp((caddr_t)ifxp->ifw_addr, 603 (caddr_t)etherbroadcastaddr, 604 sizeof(etherbroadcastaddr)) == 0) 605 qeread(sc, &ifxp->ifrw, len); 606 if (ifxp->ifw_xtofree) { 607 m_freem(ifxp->ifw_xtofree); 608 ifxp->ifw_xtofree = 0; 609 } 610 } 611 sc->otindex = ++sc->otindex % NXMT; 612 } 613 qestart( unit ); 614 } 615 616 /* 617 * Ethernet interface receiver interrupt. 618 * If can't determine length from type, then have to drop packet. 619 * Othewise decapsulate packet based on type and pass to type specific 620 * higher-level input routine. 621 */ 622 qerint(unit) 623 int unit; 624 { 625 register struct qe_softc *sc = &qe_softc[unit]; 626 register struct qe_ring *rp; 627 int len, status1, status2; 628 int bufaddr; 629 630 /* 631 * Traverse the receive ring looking for packets to pass back. 632 * The search is complete when we find a descriptor not in use. 633 * 634 * As in the transmit case the deqna doesn't honor it's own protocols 635 * so there exists the possibility that the device can beat us around 636 * the ring. The proper way to guard against this is to insure that 637 * there is always at least one invalid descriptor. We chose instead 638 * to make the ring large enough to minimize the problem. With a ring 639 * size of 4 we haven't been able to see the problem. To be safe we 640 * doubled that to 8. 641 * 642 */ 643 for( ; sc->rring[sc->rindex].qe_status1 != QE_NOTYET ; sc->rindex = ++sc->rindex % NRCV ){ 644 rp = &sc->rring[sc->rindex]; 645 status1 = rp->qe_status1; 646 status2 = rp->qe_status2; 647 bzero( rp, sizeof(struct qe_ring)); 648 if( (status1 & QE_MASK) == QE_MASK ) 649 panic("qe: chained packet"); 650 len = ((status1 & QE_RBL_HI) | (status2 & QE_RBL_LO)) + 60; 651 sc->is_if.if_ipackets++; 652 653 if (status1 & QE_ERROR) 654 sc->is_if.if_ierrors++; 655 else { 656 /* 657 * We don't process setup packets. 658 */ 659 if( !(status1 & QE_ESETUP) ) 660 qeread(sc, &sc->qe_ifr[sc->rindex], 661 len - sizeof(struct ether_header)); 662 } 663 /* 664 * Return the buffer to the ring 665 */ 666 bufaddr = (int)sc->qe_ifr[sc->rindex].ifrw_info & mask; 667 rp->qe_buf_len = -((MAXPACKETSIZE)/2); 668 rp->qe_addr_lo = (short)bufaddr; 669 rp->qe_addr_hi = (short)((int)bufaddr >> 16); 670 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 671 rp->qe_valid = 1; 672 } 673 } 674 /* 675 * Ethernet output routine. 676 * Encapsulate a packet of type family for the local net. 677 * Use trailer local net encapsulation if enough data in first 678 * packet leaves a multiple of 512 bytes of data in remainder. 679 */ 680 qeoutput(ifp, m0, dst) 681 struct ifnet *ifp; 682 struct mbuf *m0; 683 struct sockaddr *dst; 684 { 685 int type, s, error; 686 u_char edst[6]; 687 struct in_addr idst; 688 register struct qe_softc *is = &qe_softc[ifp->if_unit]; 689 register struct mbuf *m = m0; 690 register struct ether_header *eh; 691 register int off; 692 int usetrailers; 693 694 if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) != (IFF_UP|IFF_RUNNING)) { 695 error = ENETDOWN; 696 goto bad; 697 } 698 699 switch (dst->sa_family) { 700 701 #ifdef INET 702 case AF_INET: 703 idst = ((struct sockaddr_in *)dst)->sin_addr; 704 if (!arpresolve(&is->is_ac, m, &idst, edst, &usetrailers)) 705 return (0); /* if not yet resolved */ 706 off = ntohs((u_short)mtod(m, struct ip *)->ip_len) - m->m_len; 707 if (usetrailers && off > 0 && (off & 0x1ff) == 0 && 708 m->m_off >= MMINOFF + 2 * sizeof (u_short)) { 709 type = ETHERTYPE_TRAIL + (off>>9); 710 m->m_off -= 2 * sizeof (u_short); 711 m->m_len += 2 * sizeof (u_short); 712 *mtod(m, u_short *) = htons((u_short)ETHERTYPE_IP); 713 *(mtod(m, u_short *) + 1) = htons((u_short)m->m_len); 714 goto gottrailertype; 715 } 716 type = ETHERTYPE_IP; 717 off = 0; 718 goto gottype; 719 #endif 720 #ifdef NS 721 case AF_NS: 722 type = ETHERTYPE_NS; 723 bcopy((caddr_t)&(((struct sockaddr_ns *)dst)->sns_addr.x_host), 724 (caddr_t)edst, sizeof (edst)); 725 off = 0; 726 goto gottype; 727 #endif 728 729 730 case AF_UNSPEC: 731 eh = (struct ether_header *)dst->sa_data; 732 bcopy((caddr_t)eh->ether_dhost, (caddr_t)edst, sizeof (edst)); 733 type = eh->ether_type; 734 goto gottype; 735 736 default: 737 printf("qe%d: can't handle af%d\n", ifp->if_unit, 738 dst->sa_family); 739 error = EAFNOSUPPORT; 740 goto bad; 741 } 742 743 gottrailertype: 744 /* 745 * Packet to be sent as trailer: move first packet 746 * (control information) to end of chain. 747 */ 748 while (m->m_next) 749 m = m->m_next; 750 m->m_next = m0; 751 m = m0->m_next; 752 m0->m_next = 0; 753 m0 = m; 754 755 gottype: 756 /* 757 * Add local net header. If no space in first mbuf, 758 * allocate another. 759 */ 760 if (m->m_off > MMAXOFF || 761 MMINOFF + sizeof (struct ether_header) > m->m_off) { 762 m = m_get(M_DONTWAIT, MT_HEADER); 763 if (m == 0) { 764 error = ENOBUFS; 765 goto bad; 766 } 767 m->m_next = m0; 768 m->m_off = MMINOFF; 769 m->m_len = sizeof (struct ether_header); 770 } else { 771 m->m_off -= sizeof (struct ether_header); 772 m->m_len += sizeof (struct ether_header); 773 } 774 eh = mtod(m, struct ether_header *); 775 eh->ether_type = htons((u_short)type); 776 bcopy((caddr_t)edst, (caddr_t)eh->ether_dhost, sizeof (edst)); 777 bcopy((caddr_t)is->is_addr, (caddr_t)eh->ether_shost, sizeof (is->is_addr)); 778 779 /* 780 * Queue message on interface, and start output if interface 781 * not yet active. 782 */ 783 s = splimp(); 784 if (IF_QFULL(&ifp->if_snd)) { 785 IF_DROP(&ifp->if_snd); 786 splx(s); 787 m_freem(m); 788 return (ENOBUFS); 789 } 790 IF_ENQUEUE(&ifp->if_snd, m); 791 qestart(ifp->if_unit); 792 splx(s); 793 return (0); 794 795 bad: 796 m_freem(m0); 797 return (error); 798 } 799 800 801 /* 802 * Process an ioctl request. 803 */ 804 qeioctl(ifp, cmd, data) 805 register struct ifnet *ifp; 806 int cmd; 807 caddr_t data; 808 { 809 struct qe_softc *sc = &qe_softc[ifp->if_unit]; 810 struct ifaddr *ifa = (struct ifaddr *)data; 811 int s = splimp(), error = 0; 812 813 switch (cmd) { 814 815 case SIOCSIFADDR: 816 ifp->if_flags |= IFF_UP; 817 qeinit(ifp->if_unit); 818 switch(ifa->ifa_addr.sa_family) { 819 #ifdef INET 820 case AF_INET: 821 ((struct arpcom *)ifp)->ac_ipaddr = 822 IA_SIN(ifa)->sin_addr; 823 arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr); 824 break; 825 #endif 826 #ifdef NS 827 case AF_NS: 828 { 829 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); 830 831 if (ns_nullhost(*ina)) 832 ina->x_host = *(union ns_host *)(sc->is_addr); 833 else 834 qe_setaddr(ina->x_host.c_host, ifp->if_unit); 835 break; 836 } 837 #endif 838 } 839 break; 840 841 case SIOCSIFFLAGS: 842 if ((ifp->if_flags & IFF_UP) == 0 && 843 sc->qe_flags & QEF_RUNNING) { 844 ((struct qedevice *) 845 (qeinfo[ifp->if_unit]->ui_addr))->qe_csr = QE_RESET; 846 sc->qe_flags &= ~QEF_RUNNING; 847 } else if (ifp->if_flags & IFF_UP && 848 (sc->qe_flags & QEF_RUNNING) == 0) 849 qerestart(ifp->if_unit); 850 break; 851 852 default: 853 error = EINVAL; 854 855 } 856 splx(s); 857 return (error); 858 } 859 860 /* 861 * set ethernet address for unit 862 */ 863 qe_setaddr(physaddr, unit) 864 u_char *physaddr; 865 int unit; 866 { 867 register struct qe_softc *sc = &qe_softc[unit]; 868 struct uba_device *ui = qeinfo[unit]; 869 struct qedevice *addr = (struct qedevice *)ui->ui_addr; 870 register int i; 871 872 for (i = 0; i < 6; i++) 873 sc->setup_pkt[i][1] = sc->is_addr[i] = physaddr[i]; 874 sc->qe_flags |= QEF_SETADDR; 875 if (sc->is_if.if_flags & IFF_RUNNING) 876 qesetup(sc); 877 qeinit(unit); 878 } 879 880 881 /* 882 * Initialize a ring descriptor with mbuf allocation side effects 883 */ 884 qeinitdesc( rp, buf, len ) 885 register struct qe_ring *rp; 886 char *addr; /* mapped address */ 887 int len; 888 { 889 /* 890 * clear the entire descriptor 891 */ 892 bzero( rp, sizeof(struct qe_ring)); 893 894 if( len ) { 895 rp->qe_buf_len = -(len/2); 896 rp->qe_addr_lo = (short)addr; 897 rp->qe_addr_hi = (short)((int)addr >> 16); 898 } 899 } 900 /* 901 * Build a setup packet - the physical address will already be present 902 * in first column. 903 */ 904 qesetup( sc ) 905 struct qe_softc *sc; 906 { 907 register i, j; 908 909 /* 910 * Copy the target address to the rest of the entries in this row. 911 */ 912 for ( j = 0; j < 6 ; j++ ) 913 for ( i = 2 ; i < 8 ; i++ ) 914 sc->setup_pkt[j][i] = sc->setup_pkt[j][1]; 915 /* 916 * Duplicate the first half. 917 */ 918 bcopy(sc->setup_pkt, sc->setup_pkt[8], 64); 919 /* 920 * Fill in the broadcast address. 921 */ 922 for ( i = 0; i < 6 ; i++ ) 923 sc->setup_pkt[i][2] = 0xff; 924 sc->setupqueued++; 925 } 926 927 /* 928 * Pass a packet to the higher levels. 929 * We deal with the trailer protocol here. 930 */ 931 qeread(sc, ifrw, len) 932 register struct qe_softc *sc; 933 struct ifrw *ifrw; 934 int len; 935 { 936 struct ether_header *eh; 937 struct mbuf *m; 938 int off, resid; 939 struct ifqueue *inq; 940 941 /* 942 * Deal with trailer protocol: if type is INET trailer 943 * get true type from first 16-bit word past data. 944 * Remember that type was trailer by setting off. 945 */ 946 947 eh = (struct ether_header *)ifrw->ifrw_addr; 948 eh->ether_type = ntohs((u_short)eh->ether_type); 949 #define qedataaddr(eh, off, type) ((type)(((caddr_t)((eh)+1)+(off)))) 950 if (eh->ether_type >= ETHERTYPE_TRAIL && 951 eh->ether_type < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { 952 off = (eh->ether_type - ETHERTYPE_TRAIL) * 512; 953 if (off >= ETHERMTU) 954 return; /* sanity */ 955 eh->ether_type = ntohs(*qedataaddr(eh,off, u_short *)); 956 resid = ntohs(*(qedataaddr(eh, off+2, u_short *))); 957 if (off + resid > len) 958 return; /* sanity */ 959 len = off + resid; 960 } else 961 off = 0; 962 if (len == 0) 963 return; 964 965 /* 966 * Pull packet off interface. Off is nonzero if packet 967 * has trailing header; qeget will then force this header 968 * information to be at the front, but we still have to drop 969 * the type and length which are at the front of any trailer data. 970 */ 971 m = if_ubaget(&sc->qe_uba, ifrw, len, off, &sc->is_if); 972 973 if (m == 0) 974 return; 975 976 if (off) { 977 struct ifnet *ifp; 978 979 ifp = *(mtod(m, struct ifnet **)); 980 m->m_off += 2 * sizeof (u_short); 981 m->m_len -= 2 * sizeof (u_short); 982 *(mtod(m, struct ifnet **)) = ifp; 983 } 984 switch (eh->ether_type) { 985 986 #ifdef INET 987 case ETHERTYPE_IP: 988 schednetisr(NETISR_IP); 989 inq = &ipintrq; 990 break; 991 992 case ETHERTYPE_ARP: 993 arpinput(&sc->is_ac, m); 994 return; 995 #endif 996 #ifdef NS 997 case ETHERTYPE_NS: 998 schednetisr(NETISR_NS); 999 inq = &nsintrq; 1000 break; 1001 1002 #endif 1003 1004 default: 1005 m_freem(m); 1006 return; 1007 } 1008 1009 if (IF_QFULL(inq)) { 1010 IF_DROP(inq); 1011 m_freem(m); 1012 return; 1013 } 1014 IF_ENQUEUE(inq, m); 1015 } 1016 1017 /* 1018 * Watchdog timer routine. There is a condition in the hardware that 1019 * causes the board to lock up under heavy load. This routine detects 1020 * the hang up and restarts the device. 1021 */ 1022 qewatch() 1023 { 1024 register struct qe_softc *sc; 1025 register int i; 1026 int inprogress=0; 1027 1028 for (i = 0; i < NQE; i++) { 1029 sc = &qe_softc[i]; 1030 if (sc->timeout) 1031 if (++sc->timeout > 3 ) { 1032 log(LOG_ERR, 1033 "qerestart: restarted qe%d %d\n", 1034 i, ++sc->qe_restarts); 1035 qerestart(sc); 1036 } else 1037 inprogress++; 1038 } 1039 if( inprogress ){ 1040 timeout(qewatch, 0, QE_TIMEO); 1041 qewatchrun++; 1042 } else 1043 qewatchrun=0; 1044 } 1045 /* 1046 * Restart for board lockup problem. 1047 */ 1048 qerestart(sc) 1049 register struct qe_softc *sc; 1050 { 1051 register struct ifnet *ifp = &sc->is_if; 1052 register struct qedevice *addr = sc->addr; 1053 register struct qe_ring *rp; 1054 register i; 1055 1056 addr->qe_csr = QE_RESET; 1057 sc->timeout = 0; 1058 qesetup( sc ); 1059 for (i = 0, rp = sc->tring; i < NXMT; rp++, i++) { 1060 rp->qe_flag = rp->qe_status1 = QE_NOTYET; 1061 rp->qe_valid = 0; 1062 } 1063 sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0; 1064 addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT | 1065 QE_RCV_INT | QE_ILOOP; 1066 addr->qe_rcvlist_lo = (short)sc->rringaddr; 1067 addr->qe_rcvlist_hi = (short)((int)sc->rringaddr >> 16); 1068 sc->qe_flags |= QEF_RUNNING; 1069 qestart(ifp->if_unit); 1070 } 1071 #endif 1072