1 /* 2 * Copyright (c) 1982, 1986 Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms are permitted 6 * provided that the above copyright notice and this paragraph are 7 * duplicated in all such forms and that any documentation, 8 * advertising materials, and other materials related to such 9 * distribution and use acknowledge that the software was developed 10 * by the University of California, Berkeley. The name of the 11 * University may not be used to endorse or promote products derived 12 * from this software without specific prior written permission. 13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 15 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 16 * 17 * @(#)if_pclreg.h 7.2 (Berkeley) 08/04/88 18 */ 19 20 /* 21 * DEC CSS PCL-11B Parallel Communications Interface 22 */ 23 24 struct pcldevice { 25 u_short pcl_tcr; /* Transmitter Command Register */ 26 u_short pcl_tsr; /* Transmitter Status Register */ 27 u_short pcl_tsdb; /* Transmitter Source Data Buffer */ 28 short pcl_tsbc; /* Transmitter Source Byte Count */ 29 u_short pcl_tsba; /* Transmitter Source Bus Address */ 30 u_short pcl_tmmr; /* Transmitter Master/Maint Regs */ 31 u_short pcl_tscrc; /* Transmitter Source CRC */ 32 u_short pcl_spare; 33 u_short pcl_rcr; /* Receiver Command Register */ 34 u_short pcl_rsr; /* Receiver Status Register */ 35 u_short pcl_rddb; /* Receiver Destination Data Buffer */ 36 short pcl_rdbc; /* Receiver Destination Byte Count */ 37 u_short pcl_rdba; /* Receiver Destination Bus Address */ 38 u_short pcl_rdcrc; /* Receiver Destination CRC */ 39 }; 40 41 /* Transmitter Command and Status Bits */ 42 #define PCL_STTXM (1<<0) /* Start transmission */ 43 #define PCL_TXINIT (1<<1) /* Transmitter Initialize */ 44 #define PCL_IE (1<<6) /* Interrupt Enable */ 45 #define PCL_SNDWD (1<<13) /* Send word */ 46 #define PCL_TXNPR (1<<14) /* Transmitter NPR */ 47 #define PCL_RIB (1<<15) /* Retry if busy */ 48 49 #define PCL_RESPA (3<<0) /* Response A bits (tsr & rsr) */ 50 #define PCL_RESPB (3<<2) /* Response B bits (tsr & rsr) */ 51 #define PCL_MSTDWN (1<<11) /* Master down */ 52 #define PCL_ERR (1<<15) /* Error summary */ 53 54 #define PCL_MASTER (1<<8) /* Set MASTER status */ 55 #define PCL_AUTOADDR (1<<12) /* Auto time slicing */ 56 57 /* Receiver Command and Status Bits */ 58 #define PCL_RCVDAT (1<<0) /* Receive data */ 59 #define PCL_RCINIT (1<<1) /* Receiver Initialize */ 60 #define PCL_RCVWD (1<<13) /* Receive word */ 61 #define PCL_RCNPR (1<<14) /* Receive NRP */ 62 #define PCL_REJ (1<<15) /* Reject transmission */ 63 64 #define PCL_BCOFL (1<<9) /* Byte Counter Overflow */ 65 66 #define PCL_TERRBITS "\20\20ERR\17NXL\16MEM_OFL\15TXM_ERR\14MST_DWN\13TIM_OUT\12OVERRUN\11DTI_RDY\10SUC_TXF\07BUSY\06SOREJ\05TBS_BUSY" 67 #define PCL_TCSRBITS "\20\20RIB\17TX_NPR\16SND_WD\10RD_SILO\07IE\04DTO_RDY\03INH_ADI\02TX_INIT\01START_TXM" 68 69 #define PCL_RERRBITS "\20\20ERR\17NXL\16MEM_OFL\15TXM_ERR\14PARITY\13TIM_OUT\12BC_OFL\11DTO_RDY\10SUC_TXF\07BUSY\06REJ_COMP\05CHN_OPN" 70 #define PCL_RCSRBITS "\20\20REJ\17RC_NPR\16RCV_WD\10LD_SILO\07IE\04DTI_RDY\03INH_ADI\02RC_INIT\01RCV_DAT" 71