xref: /csrg-svn/sys/vax/if/if_hyreg.h (revision 35322)
123297Smckusick /*
2*35322Sbostic  * Copyright (c) 1988 Regents of the University of California.
3*35322Sbostic  * All rights reserved.
423297Smckusick  *
5*35322Sbostic  * This code is derived from software contributed to Berkeley by
6*35322Sbostic  * Tektronix Inc.
724462Skarels  *
8*35322Sbostic  * Redistribution and use in source and binary forms are permitted
9*35322Sbostic  * provided that the above copyright notice and this paragraph are
10*35322Sbostic  * duplicated in all such forms and that any documentation,
11*35322Sbostic  * advertising materials, and other materials related to such
12*35322Sbostic  * distribution and use acknowledge that the software was developed
13*35322Sbostic  * by the University of California, Berkeley.  The name of the
14*35322Sbostic  * University may not be used to endorse or promote products derived
15*35322Sbostic  * from this software without specific prior written permission.
16*35322Sbostic  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
17*35322Sbostic  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
18*35322Sbostic  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
19*35322Sbostic  *
20*35322Sbostic  *	@(#)if_hyreg.h	7.2 (Berkeley) 08/04/88
21*35322Sbostic  */
22*35322Sbostic 
23*35322Sbostic /*
2424462Skarels  * Modifications from Berkeley 4.2 BSD
2524462Skarels  * Copyright (c) 1983, Tektronix Inc.
2624462Skarels  * All Rights Reserved
2723297Smckusick  */
2811194Ssam 
2911194Ssam /*
3011194Ssam  * Network Systems Corporation Hyperchannel interface
3111194Ssam  *
3211194Ssam  * supports A410 adapter interfaced via a DEC DR-11B, NSC PI-13 or PI-14
3311194Ssam  *	(PI-14 is a PI-13 with different line drivers, software is
3411194Ssam  *	identical to a PI-13)
3511194Ssam  *
3611194Ssam  * Written by Steve Glaser, Tektronix Inc., July 1982
3711194Ssam  *
3811194Ssam  * NOTE:
3911194Ssam  *
4011194Ssam  * DR11B code has not been fully checked out with 4.1a.
4111194Ssam  * The first adapters at Tek came with DR11Bs, and the code once worked,
4211194Ssam  * but those have been upgraded to PI-13s.
4311194Ssam  */
4411194Ssam 
4511194Ssam /*
4611194Ssam  * The HYPERchannel driver sends and receives messages formatted:
4711194Ssam  *
4811194Ssam  *	+---------------------------------------+	---
4911194Ssam  *	|					|	/|\
5011194Ssam  *	|  HYPERchannel adapter header (hy_hdr)	|	 |
5111194Ssam  *	|					|	 |
5211194Ssam  *	+---------------------------------------+	 |
5311194Ssam  *	|					|	 |
5411194Ssam  *	|     Internet Protocol header (ip)	|    message proper
5511194Ssam  *	|					|    (64 bytes max)
5611194Ssam  *	+---------------------------------------+	 |
5711194Ssam  *	|					|	 |
5811194Ssam  *	|	TCP header + user data		|	 |
5911194Ssam  *	|	(if it all fits here)		|	 |
6011194Ssam  *	|					|	\|/
6111194Ssam  *	+---------------------------------------+	---
6211194Ssam  *
6311194Ssam  *	+---------------------------------------+	---
6411194Ssam  *	|					|	/|\
6511194Ssam  *	|					|	 |
6611194Ssam  *	|	TCP header + user data		|  associated data
6711194Ssam  *	|					|	 |
6811194Ssam  *	|					|	\|/
6911194Ssam  *	+---------------------------------------+	---
7011194Ssam  *
7111194Ssam  * If all of the datagram will fit in the message proper (including
7211194Ssam  * the TCP header and user data) the entire datagram is passed in
7311194Ssam  * the message proper and the associated data feature of the HYPERchannel
7411194Ssam  * is not used.
7511194Ssam  *
7611194Ssam  * The mapping from internet addresses to HYPERchannel addresses is:
7711194Ssam  *
7811194Ssam  *	 0       7 8      15 16                   31
7911194Ssam  *	+---------+---------+-----------------------+
8011194Ssam  *	| network | special | HYPERchannel address  |
8111194Ssam  *	+---------+---------+-----------------------+
8211194Ssam  *
8311194Ssam  *	|<------------ internet address ----------->|
8411194Ssam  *
8511194Ssam  * The hyperchannel address is decoded as follows:
8611194Ssam  *
8711194Ssam  *       0                 7 8             13 14  15
8811194Ssam  *	+-------------------+----------------+------+
8911194Ssam  *	|   adapter number  |      zero      | port |
9011194Ssam  *	+-------------------+----------------+------+
9111194Ssam  *
9211194Ssam  * The low 2 bits are port number (interpreted by hyperchannel hardware).
9311194Ssam  *
9411194Ssam  * The encoding of special bits is:
9511194Ssam  *
9611194Ssam  *	00	normal packet
9711194Ssam  *
9811194Ssam  *	01	loop this packet back to the sender at the
9911194Ssam  *		specified adapter (ip header source/destination addresses
10011194Ssam  *		swapped before sending, command bits added to tell the
10111194Ssam  *		remote HYPERchannel adapter debug & performance studies]
10211194Ssam  *		this code acts like 02 (below) if the ip destination (before
10311194Ssam  *		any swapping) and the destination address don't match (e.g.
10411194Ssam  *		this packet is being routed through a gateway)
10511194Ssam  *
10611194Ssam  *	02	loop this packet back to the sender at the
10711194Ssam  *		specified adapter, but go through the specified adapter's
10811194Ssam  *		IP.  This is for testing IP's store and forward mechanism.
10911194Ssam  *
11011194Ssam  *	other	undefined, currently treated as normal packet
11111194Ssam  *
11211194Ssam  */
11311194Ssam #define MPSIZE		64	/* "Message Proper" size */
11411194Ssam #define MAXRETRY	4
11511194Ssam 
11611194Ssam /*
11711208Ssam  * Device registers
11811194Ssam  */
11911194Ssam struct	hydevice {
12011208Ssam 	short	hyd_wcr;	/* word count (negated) */
12111208Ssam 	u_short	hyd_bar;	/* bus address bits 15-0 */
12211208Ssam 	u_short	hyd_csr;	/* control and status */
12311208Ssam 	u_short	hyd_dbuf;	/* data buffer */
12411194Ssam };
12511194Ssam 
12611194Ssam /*
12711208Ssam  * CSR bit layout
12811194Ssam  */
12911194Ssam #define	S_ERROR	   0100000	/* error */
13011194Ssam #define	S_NEX	   0040000	/* non-existent memory error */
13111194Ssam #define	S_ATTN	   0020000	/* attn (always zero) */
13211194Ssam #ifdef PI13
13311194Ssam #define S_STKINTR  0010000	/* stacked interrupt */
13411194Ssam #else
13511194Ssam #define	S_MAINT	   0010000	/* maintenance (not used) */
13611194Ssam #endif
13711194Ssam #define	S_A	   0004000	/* device status A (recieve data available) */
13811194Ssam #define	S_B	   0002000	/* device status B (normal termination) */
13911194Ssam #define	S_C	   0001000	/* device status C (abnormal termination) */
14011194Ssam #ifdef PI13
14111194Ssam #define S_POWEROFF 0000400	/* power off indicator */
14211194Ssam #else
14311194Ssam #define	S_CYCLE	   0000400	/* cycle (not used) */
14411194Ssam #endif
14511194Ssam #define	S_READY	   0000200	/* ready */
14611194Ssam #define	S_IE	   0000100	/* interrupt enable */
14711194Ssam #define	S_XBA	   0000060	/* bus address bit bits 17 and 16 */
14811194Ssam #define S_CLRINT   0000014	/* clear stacked interrupt */
14911194Ssam #define	S_IATTN    0000010	/* interrupt on attention only */
15011194Ssam #define S_WC       0000004	/* interrupt on word count == 0 only */
15111194Ssam #define S_IATTNWC  0000000	/* interrupt on word count == 0 and attention */
15211194Ssam #define	S_BURST	   0000002	/* burst mode DMA (not used) */
15311194Ssam #define	S_GO	   0000001	/* go */
15411194Ssam 
15511208Ssam #define XBASHIFT	12
15611194Ssam 
15724462Skarels #define HY_CSR_BITS "\20\
15824462Skarels \20ERROR\17NEX\16ATTN\15STKINTR\14RECV_DATA\13NORMAL\12ABNORMAL\11POWER\
15924462Skarels \10READY\07IENABLE\06XBA17\05XBA16\04IATTN\03IWC\02BURST\01GO"
16011194Ssam 
16111194Ssam /*
16211194Ssam  * PI13 status conditions
16311194Ssam  */
16411208Ssam #define	HYS_RECVDATA(x)	(((x)->hyd_csr & S_A) != 0)	/* get adapter data */
16511208Ssam #define	HYS_NORMAL(x)	(((x)->hyd_csr & S_B) != 0)	/* done normally */
16611208Ssam #define	HYS_ABNORMAL(x)	(((x)->hyd_csr & S_C) != 0)	/* done abnormally */
16711208Ssam #define	HYS_ERROR(x)	(((x)->hyd_csr & S_ERROR) != 0)	/* error condition */
16811208Ssam #define	HYS_DONE(x)	(((x)->hyd_csr & (S_ERROR|S_B|S_C)) != 0)
16911194Ssam 
17011194Ssam /*
17111194Ssam  * Function Codes for the Hyperchannel Adapter
17211194Ssam  * The codes are offset so they can be "or"ed into
17311194Ssam  * the reg data buffer
17411194Ssam  */
17511194Ssam #define	HYF_XMITMSG	0x04	/* transmit message */
17611194Ssam #define	HYF_XMITDATA	0x08	/* transmit associated data */
17711194Ssam #define	HYF_XMITLSTDATA	0x0C	/* transmit last associated data */
17811194Ssam #define	HYF_XMITLOCMSG	0x10	/* transmit local message */
17911194Ssam #define	HYF_INPUTMSG	0x24	/* input message proper */
18011194Ssam #define	HYF_INPUTDATA	0x28	/* input assiciated data */
18111194Ssam #define	HYF_STATUS	0x40	/* request status */
18211194Ssam #define	HYF_DUMPREGS	0x50	/* dump extention registers */
18311194Ssam #define	HYF_MARKP0	0x60	/* mark down port 0 */
18411194Ssam #define	HYF_MARKP1	0x64	/* mark down port 1 */
18511194Ssam #define	HYF_MARKP2	0x68	/* mark down port 2 */
18611194Ssam #define	HYF_MARKP3	0x6C	/* mark down port 3 */
18711194Ssam #define	HYF_MP0RR	0x70	/* mark down port 0 and reroute messages */
18811194Ssam #define	HYF_MP1RR	0x74	/* mark down port 1 and reroute messages */
18911194Ssam #define	HYF_MP2RR	0x78	/* mark down port 2 and reroute messages */
19011194Ssam #define	HYF_MP3RR	0x7C	/* mark down port 3 and reroute messages */
19111194Ssam #define	HYF_RSTATS	0xA0	/* read statistics */
19211194Ssam #define	HYF_RCSTATS	0xA4	/* read and clear statistics */
19311194Ssam #define	HYF_SETTEST	0xC0	/* enable test operations *set test mode) */
19411194Ssam #define	HYF_SADDR_LEN	0xC4	/* test mode: set address and length */
19511194Ssam #define	HYF_WBUFF	0xC8	/* test mode: write buffer */
19611194Ssam #define	HYF_RBUFF	0xCC	/* test mode: read buffer */
19711194Ssam #define HYF_CLRADAPTER	0xE0	/* clear adapter */
19811194Ssam #define	HYF_END_OP	0xE4	/* end operation */
19911194Ssam #define	HYF_CLRWFMSG	0xE6	/* clear wait for mwssage */
20011194Ssam #define	HYF_WAITFORMSG	0xE8	/* wait for message */
201