xref: /csrg-svn/sys/vax/if/if_hyreg.h (revision 23297)
1*23297Smckusick /*
2*23297Smckusick  * Copyright (c) 1982 Regents of the University of California.
3*23297Smckusick  * All rights reserved.  The Berkeley software License Agreement
4*23297Smckusick  * specifies the terms and conditions for redistribution.
5*23297Smckusick  *
6*23297Smckusick  *	@(#)if_hyreg.h	6.3 (Berkeley) 06/08/85
7*23297Smckusick  */
811194Ssam 
911194Ssam /*
1011194Ssam  * Network Systems Corporation Hyperchannel interface
1111194Ssam  *
1211194Ssam  * supports A410 adapter interfaced via a DEC DR-11B, NSC PI-13 or PI-14
1311194Ssam  *	(PI-14 is a PI-13 with different line drivers, software is
1411194Ssam  *	identical to a PI-13)
1511194Ssam  *
1611194Ssam  * Written by Steve Glaser, Tektronix Inc., July 1982
1711194Ssam  *
1811194Ssam  * NOTE:
1911194Ssam  *
2011194Ssam  * DR11B code has not been fully checked out with 4.1a.
2111194Ssam  * The first adapters at Tek came with DR11Bs, and the code once worked,
2211194Ssam  * but those have been upgraded to PI-13s.
2311194Ssam  */
2411208Ssam #define	PI13	1	/* PI13 vs. DR11B device depandant code */
2511194Ssam #ifndef HYLOG
2611208Ssam #define HYLOG	1	/* enable logging of errors */
2711194Ssam #endif
2811194Ssam 
2911194Ssam /*
3011194Ssam  * Structure of a HYPERchannel adapter header
3111194Ssam  */
3211194Ssam struct	hy_hdr {
3311194Ssam 	short	hyh_ctl;	/* control */
3411194Ssam 	short	hyh_access;	/* access code */
3511194Ssam 	union {			/* to/from addresses */
3611208Ssam 		short	hyh_addr;	/* full address */
3711208Ssam 		char	hyh_baddr[2];	/* adapter/port number from address */
3811194Ssam 	} hyhu_to, hyhu_from;
3911194Ssam #define	hyh_to		hyhu_to.hyh_addr
4011194Ssam #define	hyh_from	hyhu_from.hyh_addr
4111194Ssam #define	hyh_to_adapter	hyhu_to.hyh_baddr[0]
4211194Ssam #define	hyh_to_port	hyhu_to.hyh_baddr[1]
4311194Ssam #define	hyh_from_adapter hyhu_from.hyh_baddr[0]
4411194Ssam #define	hyh_from_port	hyhu_from.hyh_baddr[1]
4511194Ssam 	short	hyh_param;	/* parameter (for loopback) */
4611194Ssam 	char	hyh_type;	/* record type */
4711194Ssam 	char	hyh_off;	/* offset from end of hy_hdr to ip data */
4811194Ssam };
4911194Ssam 
5011194Ssam /*
5111194Ssam  * Structure of a HYPERchannel message header (from software)
5211194Ssam  */
5311208Ssam struct	hym_data {
5411208Ssam 	short	hymd_mplen;	/* message proper length, if associated data */
5511194Ssam };
5611194Ssam 
5711208Ssam struct	hym_hdr {
5811208Ssam 	struct	hym_data hym_d;
5911194Ssam #define hym_mplen hym_d.hymd_mplen
6011208Ssam 	struct	hy_hdr hym_hdr;	/* hardware header, MUST BE LAST */
6111194Ssam };
6211194Ssam 
6311194Ssam /*
6411194Ssam  * HYPERchannel header word control bits
6511194Ssam  */
6611194Ssam #define	H_XTRUNKS	0x00F0	/* transmit trunks */
6711194Ssam #define H_RTRUNKS	0x000F	/* remote trunks to transmit on for loopback */
6811194Ssam #define H_ASSOC		0x0100	/* has associated data */
6911194Ssam #define H_LOOPBK	0x00FF	/* loopback command */
7011194Ssam 
7111194Ssam /*
7211194Ssam  * Structure of Statistics Record (counters)
7311194Ssam  */
7411194Ssam struct	hy_stat {
7511194Ssam 	u_long	hyc_msgcnt;		/* # messages transmitted */
7611194Ssam 	u_long	hyc_dbcnt;		/* # data buffers transmitted */
7711194Ssam 	u_long	hyc_tbusy;		/* # available trunks busy */
7811194Ssam 	u_long	hyc_hwret;		/* # hardware retransmits */
7911194Ssam 	u_long	hyc_crcbad;		/* # crc errors on trunk */
8011194Ssam 	u_long	hyc_mcret;		/* # microcode retransmits */
8111194Ssam 	u_long	hyc_tdabort;		/* # trunk driver aborts */
8211194Ssam 	u_char	hyc_atype[3];		/* adapter type and revision level */
8311194Ssam 	u_char	hyc_uaddr;		/* adapter unit number */
8411194Ssam };
8511194Ssam 
8611194Ssam /*
8711194Ssam  * Structure of the Status Record
8811194Ssam  */
8911194Ssam struct hy_status {
9011194Ssam 	u_char	hys_gen_status;		/* general status byte */
9111194Ssam 	u_char	hys_last_fcn;		/* last function code issued */
9211194Ssam 	u_char	hys_resp_trunk;		/* trunk response byte */
9311194Ssam 	u_char	hys_status_trunk;	/* trunk status byte */
9411194Ssam 	u_char	hys_recd_resp;		/* recieved response byte */
9511194Ssam 	u_char	hys_error;		/* error code */
9611194Ssam 	u_char	hys_caddr;		/* compressed addr of 1st msg on chain */
9711194Ssam 	u_char	hys_pad;		/* not used */
9811194Ssam };
9911194Ssam 
10011194Ssam /*
10111208Ssam  * Get port number from status record
10211194Ssam  */
10311208Ssam #define PORTNUM(p)	(((p)->hys_gen_status >> 6) & 0x03)
10411194Ssam 
10511194Ssam /*
10611194Ssam  * The HYPERchannel driver sends and receives messages formatted:
10711194Ssam  *
10811194Ssam  *	+---------------------------------------+	---
10911194Ssam  *	|					|	/|\
11011194Ssam  *	|  HYPERchannel adapter header (hy_hdr)	|	 |
11111194Ssam  *	|					|	 |
11211194Ssam  *	+---------------------------------------+	 |
11311194Ssam  *	|					|	 |
11411194Ssam  *	|     Internet Protocol header (ip)	|    message proper
11511194Ssam  *	|					|    (64 bytes max)
11611194Ssam  *	+---------------------------------------+	 |
11711194Ssam  *	|					|	 |
11811194Ssam  *	|	TCP header + user data		|	 |
11911194Ssam  *	|	(if it all fits here)		|	 |
12011194Ssam  *	|					|	\|/
12111194Ssam  *	+---------------------------------------+	---
12211194Ssam  *
12311194Ssam  *	+---------------------------------------+	---
12411194Ssam  *	|					|	/|\
12511194Ssam  *	|					|	 |
12611194Ssam  *	|	TCP header + user data		|  associated data
12711194Ssam  *	|					|	 |
12811194Ssam  *	|					|	\|/
12911194Ssam  *	+---------------------------------------+	---
13011194Ssam  *
13111194Ssam  * If all of the datagram will fit in the message proper (including
13211194Ssam  * the TCP header and user data) the entire datagram is passed in
13311194Ssam  * the message proper and the associated data feature of the HYPERchannel
13411194Ssam  * is not used.
13511194Ssam  *
13611194Ssam  * The mapping from internet addresses to HYPERchannel addresses is:
13711194Ssam  *
13811194Ssam  *	 0       7 8      15 16                   31
13911194Ssam  *	+---------+---------+-----------------------+
14011194Ssam  *	| network | special | HYPERchannel address  |
14111194Ssam  *	+---------+---------+-----------------------+
14211194Ssam  *
14311194Ssam  *	|<------------ internet address ----------->|
14411194Ssam  *
14511194Ssam  * The hyperchannel address is decoded as follows:
14611194Ssam  *
14711194Ssam  *       0                 7 8             13 14  15
14811194Ssam  *	+-------------------+----------------+------+
14911194Ssam  *	|   adapter number  |      zero      | port |
15011194Ssam  *	+-------------------+----------------+------+
15111194Ssam  *
15211194Ssam  * The low 2 bits are port number (interpreted by hyperchannel hardware).
15311194Ssam  *
15411194Ssam  * The encoding of special bits is:
15511194Ssam  *
15611194Ssam  *	00	normal packet
15711194Ssam  *
15811194Ssam  *	01	loop this packet back to the sender at the
15911194Ssam  *		specified adapter (ip header source/destination addresses
16011194Ssam  *		swapped before sending, command bits added to tell the
16111194Ssam  *		remote HYPERchannel adapter debug & performance studies]
16211194Ssam  *		this code acts like 02 (below) if the ip destination (before
16311194Ssam  *		any swapping) and the destination address don't match (e.g.
16411194Ssam  *		this packet is being routed through a gateway)
16511194Ssam  *
16611194Ssam  *	02	loop this packet back to the sender at the
16711194Ssam  *		specified adapter, but go through the specified adapter's
16811194Ssam  *		IP.  This is for testing IP's store and forward mechanism.
16911194Ssam  *
17011194Ssam  *	other	undefined, currently treated as normal packet
17111194Ssam  *
17211194Ssam  */
17311194Ssam #define MPSIZE		64	/* "Message Proper" size */
17411194Ssam #define MAXRETRY	4
17511194Ssam 
17611194Ssam /*
17711208Ssam  * Device registers
17811194Ssam  */
17911194Ssam struct	hydevice {
18011208Ssam 	short	hyd_wcr;	/* word count (negated) */
18111208Ssam 	u_short	hyd_bar;	/* bus address bits 15-0 */
18211208Ssam 	u_short	hyd_csr;	/* control and status */
18311208Ssam 	u_short	hyd_dbuf;	/* data buffer */
18411194Ssam };
18511194Ssam 
18611194Ssam /*
18711208Ssam  * CSR bit layout
18811194Ssam  */
18911194Ssam #define	S_ERROR	   0100000	/* error */
19011194Ssam #define	S_NEX	   0040000	/* non-existent memory error */
19111194Ssam #define	S_ATTN	   0020000	/* attn (always zero) */
19211194Ssam #ifdef PI13
19311194Ssam #define S_STKINTR  0010000	/* stacked interrupt */
19411194Ssam #else
19511194Ssam #define	S_MAINT	   0010000	/* maintenance (not used) */
19611194Ssam #endif
19711194Ssam #define	S_A	   0004000	/* device status A (recieve data available) */
19811194Ssam #define	S_B	   0002000	/* device status B (normal termination) */
19911194Ssam #define	S_C	   0001000	/* device status C (abnormal termination) */
20011194Ssam #ifdef PI13
20111194Ssam #define S_POWEROFF 0000400	/* power off indicator */
20211194Ssam #else
20311194Ssam #define	S_CYCLE	   0000400	/* cycle (not used) */
20411194Ssam #endif
20511194Ssam #define	S_READY	   0000200	/* ready */
20611194Ssam #define	S_IE	   0000100	/* interrupt enable */
20711194Ssam #define	S_XBA	   0000060	/* bus address bit bits 17 and 16 */
20811194Ssam #define S_CLRINT   0000014	/* clear stacked interrupt */
20911194Ssam #define	S_IATTN    0000010	/* interrupt on attention only */
21011194Ssam #define S_WC       0000004	/* interrupt on word count == 0 only */
21111194Ssam #define S_IATTNWC  0000000	/* interrupt on word count == 0 and attention */
21211194Ssam #define	S_BURST	   0000002	/* burst mode DMA (not used) */
21311194Ssam #define	S_GO	   0000001	/* go */
21411194Ssam 
21511208Ssam #define XBASHIFT	12
21611194Ssam 
21711194Ssam #define HY_CSR_BITS "\20\20ERROR\17NEX\16ATTN\15STKINTR\14RECV_DATA\13NORMAL\12ABNORMAL\11POWER\10READY\07IENABLE\06XBA17\05XBA16\04IATTN\03IWC\02BURST\01GO"
21811194Ssam 
21911194Ssam /*
22011194Ssam  * PI13 status conditions
22111194Ssam  */
22211208Ssam #define	HYS_RECVDATA(x)	(((x)->hyd_csr & S_A) != 0)	/* get adapter data */
22311208Ssam #define	HYS_NORMAL(x)	(((x)->hyd_csr & S_B) != 0)	/* done normally */
22411208Ssam #define	HYS_ABNORMAL(x)	(((x)->hyd_csr & S_C) != 0)	/* done abnormally */
22511208Ssam #define	HYS_ERROR(x)	(((x)->hyd_csr & S_ERROR) != 0)	/* error condition */
22611208Ssam #define	HYS_DONE(x)	(((x)->hyd_csr & (S_ERROR|S_B|S_C)) != 0)
22711194Ssam 
22811194Ssam /*
22911194Ssam  * Function Codes for the Hyperchannel Adapter
23011194Ssam  * The codes are offset so they can be "or"ed into
23111194Ssam  * the reg data buffer
23211194Ssam  */
23311194Ssam #define	HYF_XMITMSG	0x04	/* transmit message */
23411194Ssam #define	HYF_XMITDATA	0x08	/* transmit associated data */
23511194Ssam #define	HYF_XMITLSTDATA	0x0C	/* transmit last associated data */
23611194Ssam #define	HYF_XMITLOCMSG	0x10	/* transmit local message */
23711194Ssam #define	HYF_INPUTMSG	0x24	/* input message proper */
23811194Ssam #define	HYF_INPUTDATA	0x28	/* input assiciated data */
23911194Ssam #define	HYF_STATUS	0x40	/* request status */
24011194Ssam #define	HYF_DUMPREGS	0x50	/* dump extention registers */
24111194Ssam #define	HYF_MARKP0	0x60	/* mark down port 0 */
24211194Ssam #define	HYF_MARKP1	0x64	/* mark down port 1 */
24311194Ssam #define	HYF_MARKP2	0x68	/* mark down port 2 */
24411194Ssam #define	HYF_MARKP3	0x6C	/* mark down port 3 */
24511194Ssam #define	HYF_MP0RR	0x70	/* mark down port 0 and reroute messages */
24611194Ssam #define	HYF_MP1RR	0x74	/* mark down port 1 and reroute messages */
24711194Ssam #define	HYF_MP2RR	0x78	/* mark down port 2 and reroute messages */
24811194Ssam #define	HYF_MP3RR	0x7C	/* mark down port 3 and reroute messages */
24911194Ssam #define	HYF_RSTATS	0xA0	/* read statistics */
25011194Ssam #define	HYF_RCSTATS	0xA4	/* read and clear statistics */
25111194Ssam #define	HYF_SETTEST	0xC0	/* enable test operations *set test mode) */
25211194Ssam #define	HYF_SADDR_LEN	0xC4	/* test mode: set address and length */
25311194Ssam #define	HYF_WBUFF	0xC8	/* test mode: write buffer */
25411194Ssam #define	HYF_RBUFF	0xCC	/* test mode: read buffer */
25511194Ssam #define HYF_CLRADAPTER	0xE0	/* clear adapter */
25611194Ssam #define	HYF_END_OP	0xE4	/* end operation */
25711194Ssam #define	HYF_CLRWFMSG	0xE6	/* clear wait for mwssage */
25811194Ssam #define	HYF_WAITFORMSG	0xE8	/* wait for message */
25911194Ssam 
26011194Ssam /*
26111194Ssam  * Hyperchannel record types
26211194Ssam  */
26311194Ssam #define	HYLINK_IP	0	/* Internet Protocol Packet */
26411194Ssam 
26511194Ssam #ifdef HYLOG
26611194Ssam #define HYL_SIZE 16*1024
26711194Ssam struct hy_log {
26811208Ssam 	struct	hy_log *hyl_self;
26911208Ssam 	u_char	hyl_enable;		/* logging enabled? */
27011208Ssam 	u_char	hyl_onerr;		/* state to enter on error */
27111208Ssam 	u_char	*hyl_eptr;		/* &hy_log.hyl_buf[HYL_SIZE] */
27211208Ssam 	u_char	*hyl_ptr;		/* pointer into hyl_buf */
27311208Ssam 	u_char	hyl_buf[HYL_SIZE];	/* log buffer space */
27411194Ssam };
27511194Ssam 
27611194Ssam #define HYL_NOP		0
27711194Ssam #define HYL_UP		1	/* markup */
27811194Ssam #define HYL_STATUS	2	/* status results (struct hy_status) */
27911194Ssam #define HYL_STATISTICS	3	/* statistics (struct hy_stat) */
28011194Ssam #define HYL_XMIT	4	/* packed being send (struct hym_hdr) */
28111194Ssam #define HYL_RECV	5	/* recieved packet (short len; struct hy_hdr) */
28211194Ssam #define HYL_CMD		6	/* cmd issued (uchar cmd, state; short count) */
28311194Ssam #define HYL_INT		7	/* interrupt (short csr, wcr) */
28411194Ssam 
28511194Ssam #define HYL_DISABLED	0	/* logging disabled */
28611194Ssam #define HYL_CONTINUOUS	1	/* continuous logging */
28711194Ssam #define HYL_CAUGHT1	2	/* one buffer full captured */
28811194Ssam #define HYL_CATCH1	3	/* one buffer full being captured */
28911194Ssam #define HYL_CAUGHTSTATUS  4	/* one buffer of status captured */
29011194Ssam #define HYL_CATCHSTATUS	5	/* one buffer fill of status being captured */
29111194Ssam 
29211208Ssam #ifdef  KERNEL
29311208Ssam struct hy_log hy_log;
29411194Ssam #endif
29511208Ssam #endif
296