123288Smckusick /* 229277Smckusick * Copyright (c) 1982, 1986 Regents of the University of California. 335317Sbostic * All rights reserved. 423288Smckusick * 5*44558Sbostic * %sccs.include.redist.c% 635317Sbostic * 7*44558Sbostic * @(#)if_dmc.h 7.5 (Berkeley) 06/28/90 823288Smckusick */ 95854Sroot 105854Sroot /* 115854Sroot * DMC-11 Interface 125854Sroot */ 135854Sroot 145854Sroot struct dmcdevice { 1517564Skarels char bsel0; 1617564Skarels char bsel1; 1717564Skarels char bsel2; 1817564Skarels char bsel3; 1917564Skarels short sel4; 2017564Skarels short sel6; 215854Sroot }; 225854Sroot 2317564Skarels /* 2417564Skarels * dmc software packet encapsulation. This allows the dmc 2517564Skarels * link to be multiplexed among several protocols. 2617564Skarels * The first eight bytes of the dmc header are garbage, 2717564Skarels * since on a vax the uba has been known to mung these 2817564Skarels * bytes. The next two bytes encapsulate packet type. 2917564Skarels */ 3017564Skarels struct dmc_header { 3117564Skarels char dmc_buf[8]; /* space for uba on vax */ 3217564Skarels short dmc_type; /* encapsulate packet type */ 3317564Skarels }; 345854Sroot 3517564Skarels /* packet types */ 3617564Skarels #define DMC_IPTYPE 1 3717564Skarels #define DMC_TRAILER 2 3817564Skarels #define DMC_NTRAILER 16 395854Sroot 4017564Skarels /* 4117564Skarels * DMCMTU includes space for data (1024) + 4217564Skarels * protocol header (256) + trailer descriptor (4). 4317564Skarels * The software link encapsulation header (dmc_header) 4417564Skarels * is handled separately. 4533036Skarels #define DMCMTU 1284 4617564Skarels */ 4733036Skarels #define DMCMTU 1500 4817564Skarels 495921Ssam #define RDYSCAN 16 /* loop delay for RDYI after RQI */ 505854Sroot 515854Sroot /* defines for bsel0 */ 525854Sroot #define DMC_BACCI 0 535854Sroot #define DMC_CNTLI 1 545854Sroot #define DMC_PERR 2 555854Sroot #define DMC_BASEI 3 565854Sroot #define DMC_WRITE 0 /* transmit block */ 575854Sroot #define DMC_READ 4 /* read block */ 585854Sroot #define DMC_RQI 0040 /* port request bit */ 595854Sroot #define DMC_IEI 0100 /* enable input interrupts */ 605854Sroot #define DMC_RDYI 0200 /* port ready */ 6134504Skarels #define DMC0BITS "\10\10RDI\7IEI\6RQI" 625854Sroot 635854Sroot /* defines for bsel1 */ 645854Sroot #define DMC_MCLR 0100 /* DMC11 Master Clear */ 655854Sroot #define DMC_RUN 0200 /* clock running */ 6634504Skarels #define DMC1BITS "\10\10RUN\7MCLR" 675854Sroot 685854Sroot /* defines for bsel2 */ 695854Sroot #define DMC_BACCO 0 705854Sroot #define DMC_CNTLO 1 715854Sroot #define DMC_OUX 0 /* transmit block */ 725854Sroot #define DMC_OUR 4 /* read block */ 735854Sroot #define DMC_IEO 0100 /* enable output interrupts */ 745854Sroot #define DMC_RDYO 0200 /* port available */ 7534504Skarels #define DMC2BITS "\10\10RDO\7IEO" 765854Sroot 775854Sroot /* defines for CNTLI mode */ 785854Sroot #define DMC_HDPLX 02000 /* half duplex DDCMP operation */ 795854Sroot #define DMC_SEC 04000 /* half duplex secondary station */ 805854Sroot #define DMC_MAINT 00400 /* enter maintenance mode */ 815854Sroot 825854Sroot /* defines for BACCI/O and BASEI mode */ 835854Sroot #define DMC_XMEM 0140000 /* xmem bit position */ 845854Sroot #define DMC_CCOUNT 0037777 /* character count mask */ 855854Sroot #define DMC_RESUME 0002000 /* resume (BASEI only) */ 865854Sroot 875854Sroot /* defines for CNTLO */ 885854Sroot #define DMC_CNTMASK 01777 8917219Stef 9017219Stef #define DMC_DATACK 01 9117219Stef #define DMC_TIMEOUT 02 9217219Stef #define DMC_NOBUFS 04 9317219Stef #define DMC_MAINTREC 010 9417219Stef #define DMC_LOSTDATA 020 9517219Stef #define DMC_DISCONN 0100 9617219Stef #define DMC_START 0200 9717219Stef #define DMC_NEXMEM 0400 9817219Stef #define DMC_ERROR 01000 9917219Stef 10017219Stef #define DMC_FATAL (DMC_ERROR|DMC_NEXMEM|DMC_START|DMC_LOSTDATA|DMC_MAINTREC) 10117219Stef #define CNTLO_BITS \ 10217219Stef "\10\12ERROR\11NEXMEM\10START\7DISC\5LSTDATA\4MAINT\3NOBUF\2TIMEO\1DATACK" 103