1 /* if_dmc.c 4.18 82/10/09 */ 2 3 #include "dmc.h" 4 #if NDMC > 0 5 #define printd if(dmcdebug)printf 6 int dmcdebug = 1; 7 /* 8 * DMC11 device driver, internet version 9 * 10 * TODO 11 * allow more than one outstanding read or write. 12 */ 13 14 #include "../h/param.h" 15 #include "../h/systm.h" 16 #include "../h/mbuf.h" 17 #include "../h/pte.h" 18 #include "../h/buf.h" 19 #include "../h/tty.h" 20 #include "../h/protosw.h" 21 #include "../h/socket.h" 22 #include "../h/ubareg.h" 23 #include "../h/ubavar.h" 24 #include "../h/cpu.h" 25 #include "../h/mtpr.h" 26 #include "../h/vmmac.h" 27 #include "../netinet/in.h" 28 #include "../netinet/in_systm.h" 29 #include "../net/if.h" 30 #include "../vaxif/if_uba.h" 31 #include "../vaxif/if_dmc.h" 32 #include "../net/route.h" 33 #include <errno.h> 34 35 /* 36 * Driver information for auto-configuration stuff. 37 */ 38 int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 39 struct uba_device *dmcinfo[NDMC]; 40 u_short dmcstd[] = { 0 }; 41 struct uba_driver dmcdriver = 42 { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 43 44 #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 45 #define DMC_NET 0xffffff00 /* 24 bits of net number in ui_flags */ 46 47 /* 48 * DMC software status per interface. 49 * 50 * Each interface is referenced by a network interface structure, 51 * sc_if, which the routing code uses to locate the interface. 52 * This structure contains the output queue for the interface, its address, ... 53 * We also have, for each interface, a UBA interface structure, which 54 * contains information about the UNIBUS resources held by the interface: 55 * map registers, buffered data paths, etc. Information is cached in this 56 * structure for use by the if_uba.c routines in running the interface 57 * efficiently. 58 */ 59 struct dmc_softc { 60 struct ifnet sc_if; /* network-visible interface */ 61 struct ifuba sc_ifuba; /* UNIBUS resources */ 62 short sc_flag; /* flags */ 63 short sc_oactive; /* output active */ 64 int sc_ubinfo; /* UBA mapping info for base table */ 65 struct clist sc_que; /* command queue */ 66 } dmc_softc[NDMC]; 67 68 /* flags */ 69 #define DMCRUN 01 70 #define DMCBMAPPED 02 /* base table mapped */ 71 72 struct dmc_base { 73 short d_base[128]; /* DMC base table */ 74 } dmc_base[NDMC]; 75 76 #define loword(x) ((short *)&x)[0] 77 #define hiword(x) ((short *)&x)[1] 78 79 dmcprobe(reg) 80 caddr_t reg; 81 { 82 register int br, cvec; 83 register struct dmcdevice *addr = (struct dmcdevice *)reg; 84 register int i; 85 86 #ifdef lint 87 br = 0; cvec = br; br = cvec; 88 dmcrint(0); dmcxint(0); 89 #endif 90 addr->bsel1 = DMC_MCLR; 91 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 92 ; 93 if ((addr->bsel1 & DMC_RUN) == 0) 94 return (0); 95 addr->bsel1 &= ~DMC_MCLR; 96 addr->bsel0 = DMC_RQI|DMC_IEI; 97 DELAY(100000); 98 addr->bsel1 = DMC_MCLR; 99 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 100 ; 101 #ifdef ECHACK 102 br = 0x16; 103 #endif 104 return (1); 105 } 106 107 /* 108 * Interface exists: make available by filling in network interface 109 * record. System will initialize the interface when it is ready 110 * to accept packets. 111 */ 112 dmcattach(ui) 113 register struct uba_device *ui; 114 { 115 register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 116 register struct sockaddr_in *sin; 117 118 sc->sc_if.if_unit = ui->ui_unit; 119 sc->sc_if.if_name = "dmc"; 120 sc->sc_if.if_mtu = DMCMTU; 121 sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 122 sc->sc_if.if_host[0] = 17; /* random number */ 123 sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 124 sin->sin_family = AF_INET; 125 sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 126 sc->sc_if.if_init = dmcinit; 127 sc->sc_if.if_output = dmcoutput; 128 sc->sc_if.if_ubareset = dmcreset; 129 /* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */ 130 sc->sc_ifuba.ifu_flags = UBA_NEEDBDP | UBA_CANTWAIT; 131 if_attach(&sc->sc_if); 132 } 133 134 /* 135 * Reset of interface after UNIBUS reset. 136 * If interface is on specified UBA, reset it's state. 137 */ 138 dmcreset(unit, uban) 139 int unit, uban; 140 { 141 register struct uba_device *ui; 142 143 if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 144 ui->ui_ubanum != uban) 145 return; 146 printf(" dmc%d", unit); 147 dmcinit(unit); 148 } 149 150 /* 151 * Initialization of interface; reinitialize UNIBUS usage. 152 */ 153 dmcinit(unit) 154 int unit; 155 { 156 register struct dmc_softc *sc = &dmc_softc[unit]; 157 register struct uba_device *ui = dmcinfo[unit]; 158 register struct dmcdevice *addr; 159 int base; 160 161 printd("dmcinit\n"); 162 if ((sc->sc_flag&DMCBMAPPED) == 0) { 163 sc->sc_ubinfo = uballoc(ui->ui_ubanum, 164 (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 165 sc->sc_flag |= DMCBMAPPED; 166 } 167 if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 168 (int)btoc(DMCMTU)) == 0) { 169 printf("dmc%d: can't initialize\n", unit); 170 sc->sc_if.if_flags &= ~IFF_UP; 171 return; 172 } 173 addr = (struct dmcdevice *)ui->ui_addr; 174 addr->bsel2 |= DMC_IEO; 175 base = sc->sc_ubinfo & 0x3ffff; 176 printd(" base 0x%x\n", base); 177 dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 178 dmcload(sc, DMC_CNTLI, 0, 0); 179 base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 180 dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 181 printd(" first read queued, addr 0x%x\n", base); 182 sc->sc_if.if_flags |= IFF_UP; 183 /* set up routing table entry */ 184 if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) { 185 rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr, RTF_HOST|RTF_UP); 186 sc->sc_if.if_flags |= IFF_ROUTE; 187 } 188 } 189 190 /* 191 * Start output on interface. Get another datagram 192 * to send from the interface queue and map it to 193 * the interface before starting output. 194 */ 195 dmcstart(dev) 196 dev_t dev; 197 { 198 int unit = minor(dev); 199 struct uba_device *ui = dmcinfo[unit]; 200 register struct dmc_softc *sc = &dmc_softc[unit]; 201 int addr, len; 202 struct mbuf *m; 203 204 printd("dmcstart\n"); 205 /* 206 * Dequeue a request and map it to the UNIBUS. 207 * If no more requests, just return. 208 */ 209 IF_DEQUEUE(&sc->sc_if.if_snd, m); 210 if (m == 0) 211 return; 212 len = if_wubaput(&sc->sc_ifuba, m); 213 214 /* 215 * Have request mapped to UNIBUS for transmission. 216 * Purge any stale data from this BDP and start the output. 217 */ 218 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 219 UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 220 addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 221 printd(" len %d, addr 0x%x, ", len, addr); 222 printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 223 dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 224 sc->sc_oactive = 1; 225 } 226 227 /* 228 * Utility routine to load the DMC device registers. 229 */ 230 dmcload(sc, type, w0, w1) 231 register struct dmc_softc *sc; 232 int type, w0, w1; 233 { 234 register struct dmcdevice *addr; 235 register int unit, sps, n; 236 237 printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 238 unit = sc - dmc_softc; 239 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 240 sps = spl5(); 241 if ((n = sc->sc_que.c_cc) == 0) 242 addr->bsel0 = type | DMC_RQI; 243 else 244 (void) putc(type | DMC_RQI, &sc->sc_que); 245 (void) putw(w0, &sc->sc_que); 246 (void) putw(w1, &sc->sc_que); 247 if (n == 0) 248 dmcrint(unit); 249 splx(sps); 250 } 251 252 /* 253 * DMC interface receiver interrupt. 254 * Ready to accept another command, 255 * pull one off the command queue. 256 */ 257 dmcrint(unit) 258 int unit; 259 { 260 register struct dmc_softc *sc; 261 register struct dmcdevice *addr; 262 register int n; 263 264 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 265 sc = &dmc_softc[unit]; 266 while (addr->bsel0&DMC_RDYI) { 267 addr->sel4 = getw(&sc->sc_que); 268 addr->sel6 = getw(&sc->sc_que); 269 addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 270 while (addr->bsel0&DMC_RDYI) 271 ; 272 if (sc->sc_que.c_cc == 0) 273 return; 274 addr->bsel0 = getc(&sc->sc_que); 275 n = RDYSCAN; 276 while (n-- && (addr->bsel0&DMC_RDYI) == 0) 277 ; 278 } 279 if (sc->sc_que.c_cc) 280 addr->bsel0 |= DMC_IEI; 281 } 282 283 /* 284 * DMC interface transmitter interrupt. 285 * A transfer has completed, check for errors. 286 * If it was a read, notify appropriate protocol. 287 * If it was a write, pull the next one off the queue. 288 */ 289 dmcxint(unit) 290 int unit; 291 { 292 register struct dmc_softc *sc; 293 struct uba_device *ui = dmcinfo[unit]; 294 struct dmcdevice *addr; 295 struct mbuf *m; 296 register struct ifqueue *inq; 297 int arg, cmd, len; 298 299 addr = (struct dmcdevice *)ui->ui_addr; 300 arg = addr->sel6; 301 cmd = addr->bsel2&7; 302 addr->bsel2 &= ~DMC_RDYO; 303 sc = &dmc_softc[unit]; 304 printd("dmcxint\n"); 305 switch (cmd) { 306 307 case DMC_OUR: 308 /* 309 * A read has completed. Purge input buffered 310 * data path. Pass packet to type specific 311 * higher-level input routine. 312 */ 313 sc->sc_if.if_ipackets++; 314 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 315 UBAPURGE(sc->sc_ifuba.ifu_uba, 316 sc->sc_ifuba.ifu_r.ifrw_bdp); 317 len = arg & DMC_CCOUNT; 318 printd(" read done, len %d\n", len); 319 switch (ui->ui_flags & DMC_AF) { 320 #ifdef INET 321 case AF_INET: 322 schednetisr(NETISR_IP); 323 inq = &ipintrq; 324 break; 325 #endif 326 327 default: 328 printf("dmc%d: unknown address type %d\n", unit, 329 ui->ui_flags & DMC_AF); 330 goto setup; 331 } 332 m = if_rubaget(&sc->sc_ifuba, len, 0); 333 if (m == 0) 334 goto setup; 335 if (IF_QFULL(inq)) { 336 IF_DROP(inq); 337 (void) m_freem(m); 338 } else 339 IF_ENQUEUE(inq, m); 340 341 setup: 342 arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 343 dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 344 return; 345 346 case DMC_OUX: 347 /* 348 * A write has completed, start another 349 * transfer if there is more data to send. 350 */ 351 if (sc->sc_oactive == 0) 352 return; /* SHOULD IT BE A FATAL ERROR? */ 353 printd(" write done\n"); 354 sc->sc_if.if_opackets++; 355 sc->sc_oactive = 0; 356 if (sc->sc_ifuba.ifu_xtofree) { 357 (void) m_freem(sc->sc_ifuba.ifu_xtofree); 358 sc->sc_ifuba.ifu_xtofree = 0; 359 } 360 if (sc->sc_if.if_snd.ifq_head == 0) 361 return; 362 dmcstart(unit); 363 return; 364 365 case DMC_CNTLO: 366 arg &= DMC_CNTMASK; 367 if (arg&DMC_FATAL) { 368 addr->bsel1 = DMC_MCLR; 369 sc->sc_flag &= ~DMCRUN; 370 /*** DO SOMETHING TO RESTART DEVICE ***/ 371 printf("DMC FATAL ERROR 0%o\n", arg); 372 } else { 373 /* ACCUMULATE STATISTICS */ 374 printf("DMC SOFT ERROR 0%o\n", arg); 375 } 376 return; 377 378 default: 379 printf("dmc%d: bad control %o\n", unit, cmd); 380 } 381 } 382 383 /* 384 * DMC output routine. 385 * Just send the data, header was supplied by 386 * upper level protocol routines. 387 */ 388 dmcoutput(ifp, m, dst) 389 register struct ifnet *ifp; 390 register struct mbuf *m; 391 struct sockaddr *dst; 392 { 393 struct uba_device *ui = dmcinfo[ifp->if_unit]; 394 int s; 395 396 printd("dmcoutput\n"); 397 if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 398 printf("dmc%d: af%d not supported\n", ifp->if_unit, pf); 399 m_freem(m); 400 return (EAFNOSUPPORT); 401 } 402 s = splimp(); 403 if (IF_QFULL(&ifp->if_snd)) { 404 IF_DROP(&ifp->if_snd); 405 m_freem(m); 406 splx(s); 407 return (ENOBUFS); 408 } 409 IF_ENQUEUE(&ifp->if_snd, m); 410 if (dmc_softc[ifp->if_unit].sc_oactive == 0) 411 dmcstart(ifp->if_unit); 412 splx(s); 413 return (0); 414 } 415