1 /* if_dmc.c 4.15 82/06/12 */ 2 3 #include "dmc.h" 4 #if NDMC > 0 5 #define printd if(dmcdebug)printf 6 int dmcdebug = 1; 7 /* 8 * DMC11 device driver, internet version 9 * 10 * TODO 11 * allow more than one outstanding read or write. 12 */ 13 14 #include "../h/param.h" 15 #include "../h/systm.h" 16 #include "../h/mbuf.h" 17 #include "../h/pte.h" 18 #include "../h/buf.h" 19 #include "../h/tty.h" 20 #include "../h/protosw.h" 21 #include "../h/socket.h" 22 #include "../h/ubareg.h" 23 #include "../h/ubavar.h" 24 #include "../h/cpu.h" 25 #include "../h/mtpr.h" 26 #include "../h/vmmac.h" 27 #include "../net/in.h" 28 #include "../net/in_systm.h" 29 #include "../net/if.h" 30 #include "../net/if_uba.h" 31 #include "../net/if_dmc.h" 32 #include "../net/ip.h" 33 #include "../net/ip_var.h" 34 #include "../net/route.h" 35 #include <errno.h> 36 37 /* 38 * Driver information for auto-configuration stuff. 39 */ 40 int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 41 struct uba_device *dmcinfo[NDMC]; 42 u_short dmcstd[] = { 0 }; 43 struct uba_driver dmcdriver = 44 { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 45 46 #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 47 #define DMC_NET 0xff00 /* 8 bits of net number in ui_flags */ 48 49 /* 50 * DMC software status per interface. 51 * 52 * Each interface is referenced by a network interface structure, 53 * sc_if, which the routing code uses to locate the interface. 54 * This structure contains the output queue for the interface, its address, ... 55 * We also have, for each interface, a UBA interface structure, which 56 * contains information about the UNIBUS resources held by the interface: 57 * map registers, buffered data paths, etc. Information is cached in this 58 * structure for use by the if_uba.c routines in running the interface 59 * efficiently. 60 */ 61 struct dmc_softc { 62 struct ifnet sc_if; /* network-visible interface */ 63 struct ifuba sc_ifuba; /* UNIBUS resources */ 64 short sc_flag; /* flags */ 65 short sc_oactive; /* output active */ 66 int sc_ubinfo; /* UBA mapping info for base table */ 67 struct clist sc_que; /* command queue */ 68 } dmc_softc[NDMC]; 69 70 /* flags */ 71 #define DMCRUN 01 72 #define DMCBMAPPED 02 /* base table mapped */ 73 74 struct dmc_base { 75 short d_base[128]; /* DMC base table */ 76 } dmc_base[NDMC]; 77 78 #define loword(x) ((short *)&x)[0] 79 #define hiword(x) ((short *)&x)[1] 80 81 dmcprobe(reg) 82 caddr_t reg; 83 { 84 register int br, cvec; 85 register struct dmcdevice *addr = (struct dmcdevice *)reg; 86 register int i; 87 88 COUNT(DMCPROBE); 89 #ifdef lint 90 br = 0; cvec = br; br = cvec; 91 dmcrint(0); dmcxint(0); 92 #endif 93 addr->bsel1 = DMC_MCLR; 94 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 95 ; 96 if ((addr->bsel1 & DMC_RUN) == 0) 97 return (0); 98 addr->bsel1 &= ~DMC_MCLR; 99 addr->bsel0 = DMC_RQI|DMC_IEI; 100 DELAY(100000); 101 addr->bsel1 = DMC_MCLR; 102 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 103 ; 104 #ifdef ECHACK 105 br = 0x16; 106 #endif 107 return (1); 108 } 109 110 /* 111 * Interface exists: make available by filling in network interface 112 * record. System will initialize the interface when it is ready 113 * to accept packets. 114 */ 115 dmcattach(ui) 116 register struct uba_device *ui; 117 { 118 register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 119 register struct sockaddr_in *sin; 120 121 COUNT(DMCATTACH); 122 sc->sc_if.if_unit = ui->ui_unit; 123 sc->sc_if.if_name = "dmc"; 124 sc->sc_if.if_mtu = DMCMTU; 125 sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 126 sc->sc_if.if_host[0] = 17; /* random number */ 127 sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 128 sin->sin_family = AF_INET; 129 sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 130 sc->sc_if.if_init = dmcinit; 131 sc->sc_if.if_output = dmcoutput; 132 sc->sc_if.if_ubareset = dmcreset; 133 /* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */ 134 sc->sc_ifuba.ifu_flags = UBA_NEEDBDP | UBA_CANTWAIT; 135 if_attach(&sc->sc_if); 136 } 137 138 /* 139 * Reset of interface after UNIBUS reset. 140 * If interface is on specified UBA, reset it's state. 141 */ 142 dmcreset(unit, uban) 143 int unit, uban; 144 { 145 register struct uba_device *ui; 146 147 COUNT(DMCRESET); 148 if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 149 ui->ui_ubanum != uban) 150 return; 151 printf(" dmc%d", unit); 152 dmcinit(unit); 153 } 154 155 /* 156 * Initialization of interface; reinitialize UNIBUS usage. 157 */ 158 dmcinit(unit) 159 int unit; 160 { 161 register struct dmc_softc *sc = &dmc_softc[unit]; 162 register struct uba_device *ui = dmcinfo[unit]; 163 register struct dmcdevice *addr; 164 int base; 165 166 COUNT(DMCINIT); 167 printd("dmcinit\n"); 168 if ((sc->sc_flag&DMCBMAPPED) == 0) { 169 sc->sc_ubinfo = uballoc(ui->ui_ubanum, 170 (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 171 sc->sc_flag |= DMCBMAPPED; 172 } 173 if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 174 (int)btoc(DMCMTU)) == 0) { 175 printf("dmc%d: can't initialize\n", unit); 176 sc->sc_if.if_flags &= ~IFF_UP; 177 return; 178 } 179 addr = (struct dmcdevice *)ui->ui_addr; 180 addr->bsel2 |= DMC_IEO; 181 base = sc->sc_ubinfo & 0x3ffff; 182 printd(" base 0x%x\n", base); 183 dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 184 dmcload(sc, DMC_CNTLI, 0, 0); 185 base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 186 dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 187 printd(" first read queued, addr 0x%x\n", base); 188 sc->sc_if.if_flags |= IFF_UP; 189 /* set up routing table entry */ 190 if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) { 191 rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr, RTF_HOST|RTF_UP); 192 sc->sc_if.if_flags |= IFF_ROUTE; 193 } 194 } 195 196 /* 197 * Start output on interface. Get another datagram 198 * to send from the interface queue and map it to 199 * the interface before starting output. 200 */ 201 dmcstart(dev) 202 dev_t dev; 203 { 204 int unit = minor(dev); 205 struct uba_device *ui = dmcinfo[unit]; 206 register struct dmc_softc *sc = &dmc_softc[unit]; 207 int addr, len; 208 struct mbuf *m; 209 210 COUNT(DMCSTART); 211 printd("dmcstart\n"); 212 /* 213 * Dequeue a request and map it to the UNIBUS. 214 * If no more requests, just return. 215 */ 216 IF_DEQUEUE(&sc->sc_if.if_snd, m); 217 if (m == 0) 218 return; 219 len = if_wubaput(&sc->sc_ifuba, m); 220 221 /* 222 * Have request mapped to UNIBUS for transmission. 223 * Purge any stale data from this BDP and start the output. 224 */ 225 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 226 UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 227 addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 228 printd(" len %d, addr 0x%x, ", len, addr); 229 printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 230 dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 231 sc->sc_oactive = 1; 232 } 233 234 /* 235 * Utility routine to load the DMC device registers. 236 */ 237 dmcload(sc, type, w0, w1) 238 register struct dmc_softc *sc; 239 int type, w0, w1; 240 { 241 register struct dmcdevice *addr; 242 register int unit, sps, n; 243 244 COUNT(DMCLOAD); 245 printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 246 unit = sc - dmc_softc; 247 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 248 sps = spl5(); 249 if ((n = sc->sc_que.c_cc) == 0) 250 addr->bsel0 = type | DMC_RQI; 251 else 252 (void) putc(type | DMC_RQI, &sc->sc_que); 253 (void) putw(w0, &sc->sc_que); 254 (void) putw(w1, &sc->sc_que); 255 if (n == 0) 256 dmcrint(unit); 257 splx(sps); 258 } 259 260 /* 261 * DMC interface receiver interrupt. 262 * Ready to accept another command, 263 * pull one off the command queue. 264 */ 265 dmcrint(unit) 266 int unit; 267 { 268 register struct dmc_softc *sc; 269 register struct dmcdevice *addr; 270 register int n; 271 272 COUNT(DMCRINT); 273 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 274 sc = &dmc_softc[unit]; 275 while (addr->bsel0&DMC_RDYI) { 276 addr->sel4 = getw(&sc->sc_que); 277 addr->sel6 = getw(&sc->sc_que); 278 addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 279 while (addr->bsel0&DMC_RDYI) 280 ; 281 if (sc->sc_que.c_cc == 0) 282 return; 283 addr->bsel0 = getc(&sc->sc_que); 284 n = RDYSCAN; 285 while (n-- && (addr->bsel0&DMC_RDYI) == 0) 286 ; 287 } 288 if (sc->sc_que.c_cc) 289 addr->bsel0 |= DMC_IEI; 290 } 291 292 /* 293 * DMC interface transmitter interrupt. 294 * A transfer has completed, check for errors. 295 * If it was a read, notify appropriate protocol. 296 * If it was a write, pull the next one off the queue. 297 */ 298 dmcxint(unit) 299 int unit; 300 { 301 register struct dmc_softc *sc; 302 struct uba_device *ui = dmcinfo[unit]; 303 struct dmcdevice *addr; 304 struct mbuf *m; 305 register struct ifqueue *inq; 306 int arg, cmd, len; 307 308 COUNT(DMCXINT); 309 addr = (struct dmcdevice *)ui->ui_addr; 310 arg = addr->sel6; 311 cmd = addr->bsel2&7; 312 addr->bsel2 &= ~DMC_RDYO; 313 sc = &dmc_softc[unit]; 314 printd("dmcxint\n"); 315 switch (cmd) { 316 317 case DMC_OUR: 318 /* 319 * A read has completed. Purge input buffered 320 * data path. Pass packet to type specific 321 * higher-level input routine. 322 */ 323 sc->sc_if.if_ipackets++; 324 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 325 UBAPURGE(sc->sc_ifuba.ifu_uba, 326 sc->sc_ifuba.ifu_r.ifrw_bdp); 327 len = arg & DMC_CCOUNT; 328 printd(" read done, len %d\n", len); 329 switch (ui->ui_flags & DMC_AF) { 330 #ifdef INET 331 case AF_INET: 332 schednetisr(NETISR_IP); 333 inq = &ipintrq; 334 break; 335 #endif 336 337 default: 338 printf("dmc%d: unknown address type %d\n", unit, 339 ui->ui_flags & DMC_AF); 340 goto setup; 341 } 342 m = if_rubaget(&sc->sc_ifuba, len, 0); 343 if (m == 0) 344 goto setup; 345 if (IF_QFULL(inq)) { 346 IF_DROP(inq); 347 (void) m_freem(m); 348 } else 349 IF_ENQUEUE(inq, m); 350 351 setup: 352 arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 353 dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 354 return; 355 356 case DMC_OUX: 357 /* 358 * A write has completed, start another 359 * transfer if there is more data to send. 360 */ 361 if (sc->sc_oactive == 0) 362 return; /* SHOULD IT BE A FATAL ERROR? */ 363 printd(" write done\n"); 364 sc->sc_if.if_opackets++; 365 sc->sc_oactive = 0; 366 if (sc->sc_ifuba.ifu_xtofree) { 367 (void) m_freem(sc->sc_ifuba.ifu_xtofree); 368 sc->sc_ifuba.ifu_xtofree = 0; 369 } 370 if (sc->sc_if.if_snd.ifq_head == 0) 371 return; 372 dmcstart(unit); 373 return; 374 375 case DMC_CNTLO: 376 arg &= DMC_CNTMASK; 377 if (arg&DMC_FATAL) { 378 addr->bsel1 = DMC_MCLR; 379 sc->sc_flag &= ~DMCRUN; 380 /*** DO SOMETHING TO RESTART DEVICE ***/ 381 printf("DMC FATAL ERROR 0%o\n", arg); 382 } else { 383 /* ACCUMULATE STATISTICS */ 384 printf("DMC SOFT ERROR 0%o\n", arg); 385 } 386 return; 387 388 default: 389 printf("dmc%d: bad control %o\n", unit, cmd); 390 } 391 } 392 393 /* 394 * DMC output routine. 395 * Just send the data, header was supplied by 396 * upper level protocol routines. 397 */ 398 dmcoutput(ifp, m, dst) 399 register struct ifnet *ifp; 400 register struct mbuf *m; 401 struct sockaddr *dst; 402 { 403 struct uba_device *ui = dmcinfo[ifp->if_unit]; 404 int s; 405 406 COUNT(DMCOUTPUT); 407 printd("dmcoutput\n"); 408 if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 409 printf("dmc%d: af%d not supported\n", ifp->if_unit, pf); 410 m_freem(m); 411 return (EAFNOSUPPORT); 412 } 413 s = splimp(); 414 if (IF_QFULL(&ifp->if_snd)) { 415 IF_DROP(&ifp->if_snd); 416 m_freem(m); 417 splx(s); 418 return (ENOBUFS); 419 } 420 IF_ENQUEUE(&ifp->if_snd, m); 421 if (dmc_softc[ifp->if_unit].sc_oactive == 0) 422 dmcstart(ifp->if_unit); 423 splx(s); 424 return (0); 425 } 426