xref: /csrg-svn/sys/vax/if/if_dmc.c (revision 6575)
1 /*	if_dmc.c	4.13	82/04/20	*/
2 
3 #include "dmc.h"
4 #if NDMC > 0
5 #define printd if(dmcdebug)printf
6 int dmcdebug = 1;
7 /*
8  * DMC11 device driver, internet version
9  *
10  * TODO
11  *	allow more than one outstanding read or write.
12  */
13 
14 #include "../h/param.h"
15 #include "../h/systm.h"
16 #include "../h/mbuf.h"
17 #include "../h/pte.h"
18 #include "../h/buf.h"
19 #include "../h/tty.h"
20 #include "../h/protosw.h"
21 #include "../h/socket.h"
22 #include "../h/ubareg.h"
23 #include "../h/ubavar.h"
24 #include "../h/cpu.h"
25 #include "../h/mtpr.h"
26 #include "../h/vmmac.h"
27 #include "../net/in.h"
28 #include "../net/in_systm.h"
29 #include "../net/if.h"
30 #include "../net/if_uba.h"
31 #include "../net/if_dmc.h"
32 #include "../net/ip.h"
33 #include "../net/ip_var.h"
34 #include "../net/route.h"
35 #include <errno.h>
36 
37 /*
38  * Driver information for auto-configuration stuff.
39  */
40 int	dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset();
41 struct	uba_device *dmcinfo[NDMC];
42 u_short	dmcstd[] = { 0 };
43 struct	uba_driver dmcdriver =
44 	{ dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo };
45 
46 #define	DMC_AF	0xff		/* 8 bits of address type in ui_flags */
47 #define	DMC_NET	0xff00		/* 8 bits of net number in ui_flags */
48 
49 /*
50  * DMC software status per interface.
51  *
52  * Each interface is referenced by a network interface structure,
53  * sc_if, which the routing code uses to locate the interface.
54  * This structure contains the output queue for the interface, its address, ...
55  * We also have, for each interface, a UBA interface structure, which
56  * contains information about the UNIBUS resources held by the interface:
57  * map registers, buffered data paths, etc.  Information is cached in this
58  * structure for use by the if_uba.c routines in running the interface
59  * efficiently.
60  */
61 struct dmc_softc {
62 	struct	ifnet sc_if;		/* network-visible interface */
63 	struct	ifuba sc_ifuba;		/* UNIBUS resources */
64 	short	sc_flag;		/* flags */
65 	short	sc_oactive;		/* output active */
66 	int	sc_ubinfo;		/* UBA mapping info for base table */
67 	struct clist sc_que;		/* command queue */
68 } dmc_softc[NDMC];
69 
70 /* flags */
71 #define	DMCRUN		01
72 #define	DMCBMAPPED	02		/* base table mapped */
73 
74 struct dmc_base {
75 	short	d_base[128];		/* DMC base table */
76 } dmc_base[NDMC];
77 
78 #define	loword(x)	((short *)&x)[0]
79 #define	hiword(x)	((short *)&x)[1]
80 
81 dmcprobe(reg)
82 	caddr_t reg;
83 {
84 	register int br, cvec;
85 	register struct dmcdevice *addr = (struct dmcdevice *)reg;
86 	register int i;
87 
88 COUNT(DMCPROBE);
89 #ifdef lint
90 	br = 0; cvec = br; br = cvec;
91 	dmcrint(0); dmcxint(0);
92 #endif
93 	addr->bsel1 = DMC_MCLR;
94 	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
95 		;
96 	if ((addr->bsel1 & DMC_RUN) == 0)
97 		return (0);
98 	addr->bsel1 &= ~DMC_MCLR;
99 	addr->bsel0 = DMC_RQI|DMC_IEI;
100 	DELAY(100000);
101 	addr->bsel1 = DMC_MCLR;
102 	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
103 		;
104 #ifdef ECHACK
105 	br = 0x16;
106 #endif
107 	return (1);
108 }
109 
110 /*
111  * Interface exists: make available by filling in network interface
112  * record.  System will initialize the interface when it is ready
113  * to accept packets.
114  */
115 dmcattach(ui)
116 	register struct uba_device *ui;
117 {
118 	register struct dmc_softc *sc = &dmc_softc[ui->ui_unit];
119 	register struct sockaddr_in *sin;
120 
121 COUNT(DMCATTACH);
122 	sc->sc_if.if_unit = ui->ui_unit;
123 	sc->sc_if.if_name = "dmc";
124 	sc->sc_if.if_mtu = DMCMTU;
125 	sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8;
126 	sc->sc_if.if_host[0] = 17;	/* random number */
127 	sin = (struct sockaddr_in *)&sc->sc_if.if_addr;
128 	sin->sa_family = AF_INET;
129 	sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]);
130 	sc->sc_if.if_init = dmcinit;
131 	sc->sc_if.if_output = dmcoutput;
132 	sc->sc_if.if_ubareset = dmcreset;
133 	sc->sc_ifuba.ifuba_flags = UBA_NEEDBDP | UBA_CANTWAIT;
134 	if_attach(&sc->sc_if);
135 }
136 
137 /*
138  * Reset of interface after UNIBUS reset.
139  * If interface is on specified UBA, reset it's state.
140  */
141 dmcreset(unit, uban)
142 	int unit, uban;
143 {
144 	register struct uba_device *ui;
145 
146 COUNT(DMCRESET);
147 	if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 ||
148 	    ui->ui_ubanum != uban)
149 		return;
150 	printf(" dmc%d", unit);
151 	dmcinit(unit);
152 }
153 
154 /*
155  * Initialization of interface; reinitialize UNIBUS usage.
156  */
157 dmcinit(unit)
158 	int unit;
159 {
160 	register struct dmc_softc *sc = &dmc_softc[unit];
161 	register struct uba_device *ui = dmcinfo[unit];
162 	register struct dmcdevice *addr;
163 	int base;
164 
165 COUNT(DMCINIT);
166 	printd("dmcinit\n");
167 	if ((sc->sc_flag&DMCBMAPPED) == 0) {
168 		sc->sc_ubinfo = uballoc(ui->ui_ubanum,
169 		    (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0);
170 		sc->sc_flag |= DMCBMAPPED;
171 	}
172 	if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0,
173 	    (int)btoc(DMCMTU)) == 0) {
174 		printf("dmc%d: can't initialize\n", unit);
175 		sc->sc_if.if_flags &= ~IFF_UP;
176 		return;
177 	}
178 	addr = (struct dmcdevice *)ui->ui_addr;
179 	addr->bsel2 |= DMC_IEO;
180 	base = sc->sc_ubinfo & 0x3ffff;
181 	printd("  base 0x%x\n", base);
182 	dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM);
183 	dmcload(sc, DMC_CNTLI, 0, 0);
184 	base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
185 	dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU);
186 	printd("  first read queued, addr 0x%x\n", base);
187 	sc->sc_if.if_flags |= IFF_UP;
188 	/* set up routing table entry */
189 	if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) {
190 		rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr,
191 			RTF_DIRECT|RTF_HOST|RTF_UP);
192 		sc->sc_if.if_flags |= IFF_ROUTE;
193 	}
194 }
195 
196 /*
197  * Start output on interface.  Get another datagram
198  * to send from the interface queue and map it to
199  * the interface before starting output.
200  */
201 dmcstart(dev)
202 	dev_t dev;
203 {
204 	int unit = minor(dev);
205 	struct uba_device *ui = dmcinfo[unit];
206 	register struct dmc_softc *sc = &dmc_softc[unit];
207 	int addr, len;
208 	struct mbuf *m;
209 
210 COUNT(DMCSTART);
211 	printd("dmcstart\n");
212 	/*
213 	 * Dequeue a request and map it to the UNIBUS.
214 	 * If no more requests, just return.
215 	 */
216 	IF_DEQUEUE(&sc->sc_if.if_snd, m);
217 	if (m == 0)
218 		return;
219 	len = if_wubaput(&sc->sc_ifuba, m);
220 
221 	/*
222 	 * Have request mapped to UNIBUS for transmission.
223 	 * Purge any stale data from this BDP and start the output.
224 	 */
225 	if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP)
226 		UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp);
227 	addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff;
228 	printd("  len %d, addr 0x%x, ", len, addr);
229 	printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]);
230 	dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM));
231 	sc->sc_oactive = 1;
232 }
233 
234 /*
235  * Utility routine to load the DMC device registers.
236  */
237 dmcload(sc, type, w0, w1)
238 	register struct dmc_softc *sc;
239 	int type, w0, w1;
240 {
241 	register struct dmcdevice *addr;
242 	register int unit, sps, n;
243 
244 COUNT(DMCLOAD);
245 	printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1);
246 	unit = sc - dmc_softc;
247 	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
248 	sps = spl5();
249 	if ((n = sc->sc_que.c_cc) == 0)
250 		addr->bsel0 = type | DMC_RQI;
251 	else
252 		(void) putc(type | DMC_RQI, &sc->sc_que);
253 	(void) putw(w0, &sc->sc_que);
254 	(void) putw(w1, &sc->sc_que);
255 	if (n == 0)
256 		dmcrint(unit);
257 	splx(sps);
258 }
259 
260 /*
261  * DMC interface receiver interrupt.
262  * Ready to accept another command,
263  * pull one off the command queue.
264  */
265 dmcrint(unit)
266 	int unit;
267 {
268 	register struct dmc_softc *sc;
269 	register struct dmcdevice *addr;
270 	register int n;
271 	int w0, w1; /* DEBUG */
272 
273 COUNT(DMCRINT);
274 	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
275 	sc = &dmc_softc[unit];
276 	while (addr->bsel0&DMC_RDYI) {
277 		w0 = getw(&sc->sc_que); /* DEBUG */
278 		addr->sel4 = w0; /* DEBUG */
279 		w1 = getw(&sc->sc_que); /* DEBUG */
280 		addr->sel6 = w1; /* DEBUG */
281 		/* DEBUG
282 		addr->sel4 = getw(&sc->sc_que);
283 		addr->sel6 = getw(&sc->sc_que);
284 		DEBUG */
285 		addr->bsel0 &= ~(DMC_IEI|DMC_RQI);
286 		printd("  w0 0x%x, w1 0x%x\n", w0, w1);
287 		while (addr->bsel0&DMC_RDYI)
288 			;
289 		if (sc->sc_que.c_cc == 0)
290 			return;
291 		addr->bsel0 = getc(&sc->sc_que);
292 		n = RDYSCAN;
293 		while (n-- && (addr->bsel0&DMC_RDYI) == 0)
294 			;
295 	}
296 	if (sc->sc_que.c_cc)
297 		addr->bsel0 |= DMC_IEI;
298 }
299 
300 /*
301  * DMC interface transmitter interrupt.
302  * A transfer has completed, check for errors.
303  * If it was a read, notify appropriate protocol.
304  * If it was a write, pull the next one off the queue.
305  */
306 dmcxint(unit)
307 	int unit;
308 {
309 	register struct dmc_softc *sc;
310 	struct uba_device *ui = dmcinfo[unit];
311 	struct dmcdevice *addr;
312 	struct mbuf *m;
313 	register struct ifqueue *inq;
314 	int arg, cmd, len;
315 
316 COUNT(DMCXINT);
317 	addr = (struct dmcdevice *)ui->ui_addr;
318 	arg = addr->sel6;
319 	cmd = addr->bsel2&7;
320 	addr->bsel2 &= ~DMC_RDYO;
321 	sc = &dmc_softc[unit];
322 	printd("dmcxint\n");
323 	switch (cmd) {
324 
325 	case DMC_OUR:
326 		/*
327 		 * A read has completed.  Purge input buffered
328 		 * data path.  Pass packet to type specific
329 		 * higher-level input routine.
330 		 */
331 		sc->sc_if.if_ipackets++;
332 		if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP)
333 			UBAPURGE(sc->sc_ifuba.ifu_uba,
334 				sc->sc_ifuba.ifu_r.ifrw_bdp);
335 		len = arg & DMC_CCOUNT;
336 		printd("  read done, len %d\n", len);
337 		switch (ui->ui_flags & DMC_AF) {
338 #ifdef INET
339 		case AF_INET:
340 			schednetisr(NETISR_IP);
341 			inq = &ipintrq;
342 			break;
343 #endif
344 
345 		default:
346 			printf("dmc%d: unknown address type %d\n", unit,
347 			    ui->ui_flags & DMC_AF);
348 			goto setup;
349 		}
350 		m = if_rubaget(&sc->sc_ifuba, len, 0);
351 		if (m == 0)
352 			goto setup;
353 		if (IF_QFULL(inq)) {
354 			IF_DROP(inq);
355 			(void) m_freem(m);
356 		} else
357 			IF_ENQUEUE(inq, m);
358 
359 setup:
360 		arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
361 		dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU);
362 		return;
363 
364 	case DMC_OUX:
365 		/*
366 		 * A write has completed, start another
367 		 * transfer if there is more data to send.
368 		 */
369 		if (sc->sc_oactive == 0)
370 			return;		/* SHOULD IT BE A FATAL ERROR? */
371 		printd("  write done\n");
372 		sc->sc_if.if_opackets++;
373 		sc->sc_oactive = 0;
374 		if (sc->sc_ifuba.ifu_xtofree) {
375 			(void) m_freem(sc->sc_ifuba.ifu_xtofree);
376 			sc->sc_ifuba.ifu_xtofree = 0;
377 		}
378 		if (sc->sc_if.if_snd.ifq_head == 0)
379 			return;
380 		dmcstart(unit);
381 		return;
382 
383 	case DMC_CNTLO:
384 		arg &= DMC_CNTMASK;
385 		if (arg&DMC_FATAL) {
386 			addr->bsel1 = DMC_MCLR;
387 			sc->sc_flag &= ~DMCRUN;
388 			/*** DO SOMETHING TO RESTART DEVICE ***/
389 			printf("DMC FATAL ERROR 0%o\n", arg);
390 		} else {
391 			/* ACCUMULATE STATISTICS */
392 			printf("DMC SOFT ERROR 0%o\n", arg);
393 		}
394 		return;
395 
396 	default:
397 		printf("dmc%d: bad control %o\n", unit, cmd);
398 	}
399 }
400 
401 /*
402  * DMC output routine.
403  * Just send the data, header was supplied by
404  * upper level protocol routines.
405  */
406 dmcoutput(ifp, m, dst)
407 	register struct ifnet *ifp;
408 	register struct mbuf *m;
409 	struct sockaddr *dst;
410 {
411 	struct uba_device *ui = dmcinfo[ifp->if_unit];
412 	int s;
413 
414 COUNT(DMCOUTPUT);
415 	printd("dmcoutput\n");
416 	if (dst->sa_family != (ui->ui_flags & DMC_AF)) {
417 		printf("dmc%d: af%d not supported\n", ifp->if_unit, pf);
418 		m_freem(m);
419 		return (EAFNOSUPPORT);
420 	}
421 	s = splimp();
422 	if (IF_QFULL(&ifp->if_snd)) {
423 		IF_DROP(&ifp->if_snd);
424 		m_freem(m);
425 		splx(s);
426 		return (ENOBUFS);
427 	}
428 	IF_ENQUEUE(&ifp->if_snd, m);
429 	if (dmc_softc[ifp->if_unit].sc_oactive == 0)
430 		dmcstart(ifp->if_unit);
431 	splx(s);
432 	return (0);
433 }
434