xref: /csrg-svn/sys/vax/if/if_dmc.c (revision 6554)
1 /*	if_dmc.c	4.12	82/04/16	*/
2 
3 #include "dmc.h"
4 #if NDMC > 0
5 #define printd if(dmcdebug)printf
6 int dmcdebug = 1;
7 /*
8  * DMC11 device driver, internet version
9  *
10  * TODO
11  *	allow more than one outstanding read or write.
12  */
13 
14 #include "../h/param.h"
15 #include "../h/systm.h"
16 #include "../h/mbuf.h"
17 #include "../h/pte.h"
18 #include "../h/buf.h"
19 #include "../h/tty.h"
20 #include "../h/protosw.h"
21 #include "../h/socket.h"
22 #include "../h/ubareg.h"
23 #include "../h/ubavar.h"
24 #include "../h/cpu.h"
25 #include "../h/mtpr.h"
26 #include "../h/vmmac.h"
27 #include "../net/in.h"
28 #include "../net/in_systm.h"
29 #include "../net/if.h"
30 #include "../net/if_uba.h"
31 #include "../net/if_dmc.h"
32 #include "../net/ip.h"
33 #include "../net/ip_var.h"
34 #include "../net/route.h"
35 #include <errno.h>
36 
37 /*
38  * Driver information for auto-configuration stuff.
39  */
40 int	dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset();
41 struct	uba_device *dmcinfo[NDMC];
42 u_short	dmcstd[] = { 0 };
43 struct	uba_driver dmcdriver =
44 	{ dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo };
45 
46 #define	DMC_AF	0xff		/* 8 bits of address type in ui_flags */
47 #define	DMC_NET	0xff00		/* 8 bits of net number in ui_flags */
48 
49 /*
50  * DMC software status per interface.
51  *
52  * Each interface is referenced by a network interface structure,
53  * sc_if, which the routing code uses to locate the interface.
54  * This structure contains the output queue for the interface, its address, ...
55  * We also have, for each interface, a UBA interface structure, which
56  * contains information about the UNIBUS resources held by the interface:
57  * map registers, buffered data paths, etc.  Information is cached in this
58  * structure for use by the if_uba.c routines in running the interface
59  * efficiently.
60  */
61 struct dmc_softc {
62 	struct	ifnet sc_if;		/* network-visible interface */
63 	struct	ifuba sc_ifuba;		/* UNIBUS resources */
64 	short	sc_flag;		/* flags */
65 	short	sc_oactive;		/* output active */
66 	int	sc_ubinfo;		/* UBA mapping info for base table */
67 	struct clist sc_que;		/* command queue */
68 } dmc_softc[NDMC];
69 
70 /* flags */
71 #define	DMCRUN		01
72 #define	DMCBMAPPED	02		/* base table mapped */
73 
74 struct dmc_base {
75 	short	d_base[128];		/* DMC base table */
76 } dmc_base[NDMC];
77 
78 #define	loword(x)	((short *)&x)[0]
79 #define	hiword(x)	((short *)&x)[1]
80 
81 dmcprobe(reg)
82 	caddr_t reg;
83 {
84 	register int br, cvec;
85 	register struct dmcdevice *addr = (struct dmcdevice *)reg;
86 	register int i;
87 
88 COUNT(DMCPROBE);
89 #ifdef lint
90 	br = 0; cvec = br; br = cvec;
91 	dmcrint(0); dmcxint(0);
92 #endif
93 	addr->bsel1 = DMC_MCLR;
94 	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
95 		;
96 	if ((addr->bsel1 & DMC_RUN) == 0)
97 		return (0);
98 	addr->bsel1 &= ~DMC_MCLR;
99 	addr->bsel0 = DMC_RQI|DMC_IEI;
100 	DELAY(100000);
101 	addr->bsel1 = DMC_MCLR;
102 	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
103 		;
104 	br = 0x16;		/* temporary ec hack */
105 	return (1);
106 }
107 
108 /*
109  * Interface exists: make available by filling in network interface
110  * record.  System will initialize the interface when it is ready
111  * to accept packets.
112  */
113 dmcattach(ui)
114 	register struct uba_device *ui;
115 {
116 	register struct dmc_softc *sc = &dmc_softc[ui->ui_unit];
117 	register struct sockaddr_in *sin;
118 
119 COUNT(DMCATTACH);
120 	sc->sc_if.if_unit = ui->ui_unit;
121 	sc->sc_if.if_name = "dmc";
122 	sc->sc_if.if_mtu = DMCMTU;
123 	sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8;
124 	sc->sc_if.if_host[0] = 17;	/* random number */
125 	sin = (struct sockaddr_in *)&sc->sc_if.if_addr;
126 	sin->sa_family = AF_INET;
127 	sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]);
128 	sc->sc_if.if_init = dmcinit;
129 	sc->sc_if.if_output = dmcoutput;
130 	sc->sc_if.if_ubareset = dmcreset;
131 	sc->sc_ifuba.ifuba_flags = UBA_NEEDBDP | UBA_CANTWAIT;
132 	if_attach(&sc->sc_if);
133 }
134 
135 /*
136  * Reset of interface after UNIBUS reset.
137  * If interface is on specified UBA, reset it's state.
138  */
139 dmcreset(unit, uban)
140 	int unit, uban;
141 {
142 	register struct uba_device *ui;
143 
144 COUNT(DMCRESET);
145 	if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 ||
146 	    ui->ui_ubanum != uban)
147 		return;
148 	printf(" dmc%d", unit);
149 	dmcinit(unit);
150 }
151 
152 /*
153  * Initialization of interface; reinitialize UNIBUS usage.
154  */
155 dmcinit(unit)
156 	int unit;
157 {
158 	register struct dmc_softc *sc = &dmc_softc[unit];
159 	register struct uba_device *ui = dmcinfo[unit];
160 	register struct dmcdevice *addr;
161 	int base;
162 
163 COUNT(DMCINIT);
164 	printd("dmcinit\n");
165 	if ((sc->sc_flag&DMCBMAPPED) == 0) {
166 		sc->sc_ubinfo = uballoc(ui->ui_ubanum,
167 		    (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0);
168 		sc->sc_flag |= DMCBMAPPED;
169 	}
170 	if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0,
171 	    (int)btoc(DMCMTU)) == 0) {
172 		printf("dmc%d: can't initialize\n", unit);
173 		sc->sc_if.if_flags &= ~IFF_UP;
174 		return;
175 	}
176 	addr = (struct dmcdevice *)ui->ui_addr;
177 	addr->bsel2 |= DMC_IEO;
178 	base = sc->sc_ubinfo & 0x3ffff;
179 	printd("  base 0x%x\n", base);
180 	dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM);
181 	dmcload(sc, DMC_CNTLI, 0, 0);
182 	base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
183 	dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU);
184 	printd("  first read queued, addr 0x%x\n", base);
185 	sc->sc_if.if_flags |= IFF_UP;
186 	/* set up routing table entry */
187 	if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) {
188 		rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr,
189 			RTF_DIRECT|RTF_HOST|RTF_UP);
190 		sc->sc_if.if_flags |= IFF_ROUTE;
191 	}
192 }
193 
194 /*
195  * Start output on interface.  Get another datagram
196  * to send from the interface queue and map it to
197  * the interface before starting output.
198  */
199 dmcstart(dev)
200 	dev_t dev;
201 {
202 	int unit = minor(dev);
203 	struct uba_device *ui = dmcinfo[unit];
204 	register struct dmc_softc *sc = &dmc_softc[unit];
205 	int addr, len;
206 	struct mbuf *m;
207 
208 COUNT(DMCSTART);
209 	printd("dmcstart\n");
210 	/*
211 	 * Dequeue a request and map it to the UNIBUS.
212 	 * If no more requests, just return.
213 	 */
214 	IF_DEQUEUE(&sc->sc_if.if_snd, m);
215 	if (m == 0)
216 		return;
217 	len = if_wubaput(&sc->sc_ifuba, m);
218 
219 	/*
220 	 * Have request mapped to UNIBUS for transmission.
221 	 * Purge any stale data from this BDP and start the output.
222 	 */
223 	if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP)
224 		UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp);
225 	addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff;
226 	printd("  len %d, addr 0x%x, ", len, addr);
227 	printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]);
228 	dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM));
229 	sc->sc_oactive = 1;
230 }
231 
232 /*
233  * Utility routine to load the DMC device registers.
234  */
235 dmcload(sc, type, w0, w1)
236 	register struct dmc_softc *sc;
237 	int type, w0, w1;
238 {
239 	register struct dmcdevice *addr;
240 	register int unit, sps, n;
241 
242 COUNT(DMCLOAD);
243 	printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1);
244 	unit = sc - dmc_softc;
245 	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
246 	sps = spl5();
247 	if ((n = sc->sc_que.c_cc) == 0)
248 		addr->bsel0 = type | DMC_RQI;
249 	else
250 		(void) putc(type | DMC_RQI, &sc->sc_que);
251 	(void) putw(w0, &sc->sc_que);
252 	(void) putw(w1, &sc->sc_que);
253 	if (n == 0)
254 		dmcrint(unit);
255 	splx(sps);
256 }
257 
258 /*
259  * DMC interface receiver interrupt.
260  * Ready to accept another command,
261  * pull one off the command queue.
262  */
263 dmcrint(unit)
264 	int unit;
265 {
266 	register struct dmc_softc *sc;
267 	register struct dmcdevice *addr;
268 	register int n;
269 	int w0, w1; /* DEBUG */
270 
271 COUNT(DMCRINT);
272 	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
273 	sc = &dmc_softc[unit];
274 	while (addr->bsel0&DMC_RDYI) {
275 		w0 = getw(&sc->sc_que); /* DEBUG */
276 		addr->sel4 = w0; /* DEBUG */
277 		w1 = getw(&sc->sc_que); /* DEBUG */
278 		addr->sel6 = w1; /* DEBUG */
279 		/* DEBUG
280 		addr->sel4 = getw(&sc->sc_que);
281 		addr->sel6 = getw(&sc->sc_que);
282 		DEBUG */
283 		addr->bsel0 &= ~(DMC_IEI|DMC_RQI);
284 		printd("  w0 0x%x, w1 0x%x\n", w0, w1);
285 		while (addr->bsel0&DMC_RDYI)
286 			;
287 		if (sc->sc_que.c_cc == 0)
288 			return;
289 		addr->bsel0 = getc(&sc->sc_que);
290 		n = RDYSCAN;
291 		while (n-- && (addr->bsel0&DMC_RDYI) == 0)
292 			;
293 	}
294 	if (sc->sc_que.c_cc)
295 		addr->bsel0 |= DMC_IEI;
296 }
297 
298 /*
299  * DMC interface transmitter interrupt.
300  * A transfer has completed, check for errors.
301  * If it was a read, notify appropriate protocol.
302  * If it was a write, pull the next one off the queue.
303  */
304 dmcxint(unit)
305 	int unit;
306 {
307 	register struct dmc_softc *sc;
308 	struct uba_device *ui = dmcinfo[unit];
309 	struct dmcdevice *addr;
310 	struct mbuf *m;
311 	register struct ifqueue *inq;
312 	int arg, cmd, len;
313 
314 COUNT(DMCXINT);
315 	addr = (struct dmcdevice *)ui->ui_addr;
316 	arg = addr->sel6;
317 	cmd = addr->bsel2&7;
318 	addr->bsel2 &= ~DMC_RDYO;
319 	sc = &dmc_softc[unit];
320 	printd("dmcxint\n");
321 	switch (cmd) {
322 
323 	case DMC_OUR:
324 		/*
325 		 * A read has completed.  Purge input buffered
326 		 * data path.  Pass packet to type specific
327 		 * higher-level input routine.
328 		 */
329 		sc->sc_if.if_ipackets++;
330 		if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP)
331 			UBAPURGE(sc->sc_ifuba.ifu_uba,
332 				sc->sc_ifuba.ifu_r.ifrw_bdp);
333 		len = arg & DMC_CCOUNT;
334 		printd("  read done, len %d\n", len);
335 		switch (ui->ui_flags & DMC_AF) {
336 #ifdef INET
337 		case AF_INET:
338 			schednetisr(NETISR_IP);
339 			inq = &ipintrq;
340 			break;
341 #endif
342 
343 		default:
344 			printf("dmc%d: unknown address type %d\n", unit,
345 			    ui->ui_flags & DMC_AF);
346 			goto setup;
347 		}
348 		m = if_rubaget(&sc->sc_ifuba, len, 0);
349 		if (m == 0)
350 			goto setup;
351 		if (IF_QFULL(inq)) {
352 			IF_DROP(inq);
353 			(void) m_freem(m);
354 		} else
355 			IF_ENQUEUE(inq, m);
356 
357 setup:
358 		arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
359 		dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU);
360 		return;
361 
362 	case DMC_OUX:
363 		/*
364 		 * A write has completed, start another
365 		 * transfer if there is more data to send.
366 		 */
367 		if (sc->sc_oactive == 0)
368 			return;		/* SHOULD IT BE A FATAL ERROR? */
369 		printd("  write done\n");
370 		sc->sc_if.if_opackets++;
371 		sc->sc_oactive = 0;
372 		if (sc->sc_ifuba.ifu_xtofree) {
373 			(void) m_freem(sc->sc_ifuba.ifu_xtofree);
374 			sc->sc_ifuba.ifu_xtofree = 0;
375 		}
376 		if (sc->sc_if.if_snd.ifq_head == 0)
377 			return;
378 		dmcstart(unit);
379 		return;
380 
381 	case DMC_CNTLO:
382 		arg &= DMC_CNTMASK;
383 		if (arg&DMC_FATAL) {
384 			addr->bsel1 = DMC_MCLR;
385 			sc->sc_flag &= ~DMCRUN;
386 			/*** DO SOMETHING TO RESTART DEVICE ***/
387 			printf("DMC FATAL ERROR 0%o\n", arg);
388 		} else {
389 			/* ACCUMULATE STATISTICS */
390 			printf("DMC SOFT ERROR 0%o\n", arg);
391 		}
392 		return;
393 
394 	default:
395 		printf("dmc%d: bad control %o\n", unit, cmd);
396 	}
397 }
398 
399 /*
400  * DMC output routine.
401  * Just send the data, header was supplied by
402  * upper level protocol routines.
403  */
404 dmcoutput(ifp, m, dst)
405 	register struct ifnet *ifp;
406 	register struct mbuf *m;
407 	struct sockaddr *dst;
408 {
409 	struct uba_device *ui = dmcinfo[ifp->if_unit];
410 	int s;
411 
412 COUNT(DMCOUTPUT);
413 	printd("dmcoutput\n");
414 	if (dst->sa_family != (ui->ui_flags & DMC_AF)) {
415 		printf("dmc%d: af%d not supported\n", ifp->if_unit, pf);
416 		m_freem(m);
417 		return (EAFNOSUPPORT);
418 	}
419 	s = splimp();
420 	if (IF_QFULL(&ifp->if_snd)) {
421 		IF_DROP(&ifp->if_snd);
422 		m_freem(m);
423 		splx(s);
424 		return (ENOBUFS);
425 	}
426 	IF_ENQUEUE(&ifp->if_snd, m);
427 	if (dmc_softc[ifp->if_unit].sc_oactive == 0)
428 		dmcstart(ifp->if_unit);
429 	splx(s);
430 	return (0);
431 }
432