1 /* if_dmc.c 4.27 83/06/12 */ 2 3 #include "dmc.h" 4 #if NDMC > 0 5 #define printd if(dmcdebug)printf 6 int dmcdebug = 0; 7 /* 8 * DMC11 device driver, internet version 9 * 10 * TODO 11 * allow more than one outstanding read or write. 12 * 13 * UNTESTED WITH 4.2 14 */ 15 #include "../machine/pte.h" 16 17 #include "../h/param.h" 18 #include "../h/systm.h" 19 #include "../h/mbuf.h" 20 #include "../h/buf.h" 21 #include "../h/tty.h" 22 #include "../h/protosw.h" 23 #include "../h/socket.h" 24 #include "../h/vmmac.h" 25 #include "../h/ioctl.h" 26 #include "../h/errno.h" 27 28 #include "../net/if.h" 29 #include "../net/netisr.h" 30 #include "../net/route.h" 31 #include "../netinet/in.h" 32 #include "../netinet/in_systm.h" 33 34 #include "../vax/cpu.h" 35 #include "../vax/mtpr.h" 36 #include "../vaxif/if_uba.h" 37 #include "../vaxif/if_dmc.h" 38 #include "../vaxuba/ubareg.h" 39 #include "../vaxuba/ubavar.h" 40 41 #ifndef DMC_USEMAINT 42 #define DMC_USEMAINT 1 /* use maintenance mode */ 43 #endif 44 45 /* 46 * Driver information for auto-configuration stuff. 47 */ 48 int dmcprobe(), dmcattach(), dmcinit(), dmcioctl(); 49 int dmcoutput(), dmcreset(); 50 struct uba_device *dmcinfo[NDMC]; 51 u_short dmcstd[] = { 0 }; 52 struct uba_driver dmcdriver = 53 { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 54 55 /* 56 * DMC software status per interface. 57 * 58 * Each interface is referenced by a network interface structure, 59 * sc_if, which the routing code uses to locate the interface. 60 * This structure contains the output queue for the interface, its address, ... 61 * We also have, for each interface, a UBA interface structure, which 62 * contains information about the UNIBUS resources held by the interface: 63 * map registers, buffered data paths, etc. Information is cached in this 64 * structure for use by the if_uba.c routines in running the interface 65 * efficiently. 66 */ 67 struct dmc_softc { 68 struct ifnet sc_if; /* network-visible interface */ 69 struct ifuba sc_ifuba; /* UNIBUS resources */ 70 short sc_flag; /* flags */ 71 short sc_oactive; /* output active */ 72 int sc_ubinfo; /* UBA mapping info for base table */ 73 struct clist sc_que; /* command queue */ 74 } dmc_softc[NDMC]; 75 76 /* flags */ 77 #define DMCRUN 01 78 #define DMCBMAPPED 02 /* base table mapped */ 79 80 struct dmc_base { 81 short d_base[128]; /* DMC base table */ 82 } dmc_base[NDMC]; 83 84 #define loword(x) ((short *)&x)[0] 85 #define hiword(x) ((short *)&x)[1] 86 87 dmcprobe(reg) 88 caddr_t reg; 89 { 90 register int br, cvec; 91 register struct dmcdevice *addr = (struct dmcdevice *)reg; 92 register int i; 93 94 #ifdef lint 95 br = 0; cvec = br; br = cvec; 96 dmcrint(0); dmcxint(0); 97 #endif 98 addr->bsel1 = DMC_MCLR; 99 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 100 ; 101 if ((addr->bsel1 & DMC_RUN) == 0) 102 return (0); 103 addr->bsel1 &= ~DMC_MCLR; 104 addr->bsel0 = DMC_RQI|DMC_IEI; 105 DELAY(100000); 106 addr->bsel1 = DMC_MCLR; 107 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 108 ; 109 #ifdef ECHACK 110 br = 0x16; 111 #endif 112 return (1); 113 } 114 115 /* 116 * Interface exists: make available by filling in network interface 117 * record. System will initialize the interface when it is ready 118 * to accept packets. 119 */ 120 dmcattach(ui) 121 register struct uba_device *ui; 122 { 123 register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 124 125 sc->sc_if.if_unit = ui->ui_unit; 126 sc->sc_if.if_name = "dmc"; 127 sc->sc_if.if_mtu = DMCMTU; 128 sc->sc_if.if_init = dmcinit; 129 sc->sc_if.if_output = dmcoutput; 130 sc->sc_if.if_ioctl = dmcioctl; 131 sc->sc_if.if_reset = dmcreset; 132 /* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */ 133 sc->sc_ifuba.ifu_flags = UBA_NEEDBDP | UBA_CANTWAIT; 134 if_attach(&sc->sc_if); 135 } 136 137 /* 138 * Reset of interface after UNIBUS reset. 139 * If interface is on specified UBA, reset it's state. 140 */ 141 dmcreset(unit, uban) 142 int unit, uban; 143 { 144 register struct uba_device *ui; 145 146 if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 147 ui->ui_ubanum != uban) 148 return; 149 printf(" dmc%d", unit); 150 dmcinit(unit); 151 } 152 153 /* 154 * Initialization of interface; reinitialize UNIBUS usage. 155 */ 156 dmcinit(unit) 157 int unit; 158 { 159 register struct dmc_softc *sc = &dmc_softc[unit]; 160 register struct uba_device *ui = dmcinfo[unit]; 161 register struct dmcdevice *addr; 162 register struct ifnet *ifp = &sc->sc_if; 163 struct sockaddr_in *sin; 164 int base; 165 166 printd("dmcinit\n"); 167 sin = (struct sockaddr_in *)&ifp->if_addr; 168 if (sin->sin_addr.s_addr == 0) 169 return; 170 if ((ifp->if_flags & IFF_RUNNING) == 0) { 171 if ((sc->sc_flag&DMCBMAPPED) == 0) { 172 sc->sc_ubinfo = uballoc(ui->ui_ubanum, 173 (caddr_t)&dmc_base[unit], 174 sizeof (struct dmc_base), 0); 175 sc->sc_flag |= DMCBMAPPED; 176 } 177 if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 178 (int)btoc(DMCMTU)) == 0) { 179 printf("dmc%d: can't initialize\n", unit); 180 ifp->if_flags &= ~IFF_UP; 181 return; 182 } 183 addr = (struct dmcdevice *)ui->ui_addr; 184 addr->bsel2 |= DMC_IEO; 185 base = sc->sc_ubinfo & 0x3ffff; 186 printd(" base 0x%x\n", base); 187 dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 188 dmcload(sc, DMC_CNTLI, 0, DMC_USEMAINT ? DMC_MAINT : 0); 189 base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 190 dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 191 printd(" first read queued, addr 0x%x\n", base); 192 ifp->if_flags |= IFF_UP|IFF_RUNNING; 193 } 194 /* set up routing table entry */ 195 if ((ifp->if_flags & IFF_ROUTE) == 0) { 196 rtinit(sin, sin, RTF_HOST|RTF_UP); 197 ifp->if_flags |= IFF_ROUTE; 198 } 199 } 200 201 /* 202 * Start output on interface. Get another datagram 203 * to send from the interface queue and map it to 204 * the interface before starting output. 205 */ 206 dmcstart(dev) 207 dev_t dev; 208 { 209 int unit = minor(dev); 210 register struct dmc_softc *sc = &dmc_softc[unit]; 211 int addr, len; 212 struct mbuf *m; 213 214 printd("dmcstart\n"); 215 /* 216 * Dequeue a request and map it to the UNIBUS. 217 * If no more requests, just return. 218 */ 219 IF_DEQUEUE(&sc->sc_if.if_snd, m); 220 if (m == 0) 221 return; 222 len = if_wubaput(&sc->sc_ifuba, m); 223 224 /* 225 * Have request mapped to UNIBUS for transmission. 226 * Purge any stale data from this BDP and start the output. 227 */ 228 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 229 UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 230 addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 231 printd(" len %d, addr 0x%x, ", len, addr); 232 printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 233 dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 234 sc->sc_oactive = 1; 235 } 236 237 /* 238 * Utility routine to load the DMC device registers. 239 */ 240 dmcload(sc, type, w0, w1) 241 register struct dmc_softc *sc; 242 int type, w0, w1; 243 { 244 register struct dmcdevice *addr; 245 register int unit, sps, n; 246 247 printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 248 unit = sc - dmc_softc; 249 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 250 sps = spl5(); 251 if ((n = sc->sc_que.c_cc) == 0) 252 addr->bsel0 = type | DMC_RQI; 253 else 254 (void) putc(type | DMC_RQI, &sc->sc_que); 255 (void) putw(w0, &sc->sc_que); 256 (void) putw(w1, &sc->sc_que); 257 if (n == 0) 258 dmcrint(unit); 259 splx(sps); 260 } 261 262 /* 263 * DMC interface receiver interrupt. 264 * Ready to accept another command, 265 * pull one off the command queue. 266 */ 267 dmcrint(unit) 268 int unit; 269 { 270 register struct dmc_softc *sc; 271 register struct dmcdevice *addr; 272 register int n; 273 274 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 275 sc = &dmc_softc[unit]; 276 while (addr->bsel0&DMC_RDYI) { 277 addr->sel4 = getw(&sc->sc_que); 278 addr->sel6 = getw(&sc->sc_que); 279 addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 280 while (addr->bsel0&DMC_RDYI) 281 ; 282 if (sc->sc_que.c_cc == 0) 283 goto out; 284 addr->bsel0 = getc(&sc->sc_que); 285 n = RDYSCAN; 286 while (n-- && (addr->bsel0&DMC_RDYI) == 0) 287 ; 288 } 289 if (sc->sc_que.c_cc) 290 addr->bsel0 |= DMC_IEI; 291 out: 292 dmcxint(unit); 293 } 294 295 /* 296 * DMC interface transmitter interrupt. 297 * A transfer has completed, check for errors. 298 * If it was a read, notify appropriate protocol. 299 * If it was a write, pull the next one off the queue. 300 */ 301 dmcxint(unit) 302 int unit; 303 { 304 register struct dmc_softc *sc; 305 struct uba_device *ui = dmcinfo[unit]; 306 struct dmcdevice *addr; 307 struct mbuf *m; 308 register struct ifqueue *inq; 309 int arg, arg2, cmd, len; 310 311 addr = (struct dmcdevice *)ui->ui_addr; 312 cmd = addr->bsel2 & 0xff; 313 if ((cmd & DMC_RDYO) == 0) 314 return; 315 arg2 = addr->sel4; 316 arg = addr->sel6; 317 addr->bsel2 &= ~DMC_RDYO; 318 sc = &dmc_softc[unit]; 319 printd("dmcxint\n"); 320 switch (cmd & 07) { 321 322 case DMC_OUR: 323 /* 324 * A read has completed. Purge input buffered 325 * data path. Pass packet to type specific 326 * higher-level input routine. 327 */ 328 sc->sc_if.if_ipackets++; 329 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 330 UBAPURGE(sc->sc_ifuba.ifu_uba, 331 sc->sc_ifuba.ifu_r.ifrw_bdp); 332 len = arg & DMC_CCOUNT; 333 printd(" read done, len %d\n", len); 334 switch (ui->ui_flags & DMC_AF) { 335 #ifdef INET 336 case AF_INET: 337 schednetisr(NETISR_IP); 338 inq = &ipintrq; 339 break; 340 #endif 341 342 default: 343 printf("dmc%d: unknown address type %d\n", unit, 344 ui->ui_flags & DMC_AF); 345 goto setup; 346 } 347 m = if_rubaget(&sc->sc_ifuba, len, 0); 348 if (m == 0) 349 goto setup; 350 if (IF_QFULL(inq)) { 351 IF_DROP(inq); 352 m_freem(m); 353 } else 354 IF_ENQUEUE(inq, m); 355 356 setup: 357 arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 358 dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 359 return; 360 361 case DMC_OUX: 362 /* 363 * A write has completed, start another 364 * transfer if there is more data to send. 365 */ 366 if (sc->sc_oactive == 0) 367 return; /* SHOULD IT BE A FATAL ERROR? */ 368 printd(" write done\n"); 369 sc->sc_if.if_opackets++; 370 sc->sc_oactive = 0; 371 if (sc->sc_ifuba.ifu_xtofree) { 372 m_freem(sc->sc_ifuba.ifu_xtofree); 373 sc->sc_ifuba.ifu_xtofree = 0; 374 } 375 if (sc->sc_if.if_snd.ifq_head == 0) 376 return; 377 dmcstart(unit); 378 return; 379 380 case DMC_CNTLO: 381 arg &= DMC_CNTMASK; 382 if (arg&DMC_FATAL) { 383 addr->bsel1 = DMC_MCLR; 384 sc->sc_flag &= ~DMCRUN; 385 /*** DO SOMETHING TO RESTART DEVICE ***/ 386 printf("DMC FATAL ERROR 0%o\n", arg); 387 } else { 388 /* ACCUMULATE STATISTICS */ 389 printf("DMC SOFT ERROR 0%o\n", arg); 390 } 391 return; 392 393 default: 394 printf("dmc%d: bad control %o\n", unit, cmd); 395 } 396 } 397 398 /* 399 * DMC output routine. 400 * Just send the data, header was supplied by 401 * upper level protocol routines. 402 */ 403 dmcoutput(ifp, m, dst) 404 register struct ifnet *ifp; 405 register struct mbuf *m; 406 struct sockaddr *dst; 407 { 408 struct uba_device *ui = dmcinfo[ifp->if_unit]; 409 int s; 410 411 printd("dmcoutput\n"); 412 if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 413 printf("dmc%d: af%d not supported\n", ifp->if_unit, 414 dst->sa_family); 415 m_freem(m); 416 return (EAFNOSUPPORT); 417 } 418 s = splimp(); 419 if (IF_QFULL(&ifp->if_snd)) { 420 IF_DROP(&ifp->if_snd); 421 m_freem(m); 422 splx(s); 423 return (ENOBUFS); 424 } 425 IF_ENQUEUE(&ifp->if_snd, m); 426 if (dmc_softc[ifp->if_unit].sc_oactive == 0) 427 dmcstart(ifp->if_unit); 428 splx(s); 429 return (0); 430 } 431 432 /* 433 * Process an ioctl request. 434 */ 435 dmcioctl(ifp, cmd, data) 436 register struct ifnet *ifp; 437 int cmd; 438 caddr_t data; 439 { 440 struct ifreq *ifr = (struct ifreq *)data; 441 struct sockaddr_in *sin; 442 int s = splimp(), error = 0; 443 444 switch (cmd) { 445 446 case SIOCSIFADDR: 447 if (ifp->if_flags & IFF_RUNNING) 448 if_rtinit(ifp, -1); /* delete previous route */ 449 sin = (struct sockaddr_in *)&ifr->ifr_addr; 450 ifp->if_addr = *sin; 451 ifp->if_net = in_netof(sin->sin_addr); 452 ifp->if_host[0] = in_lnaof(sin->sin_addr); 453 dmcinit(ifp->if_unit); 454 break; 455 456 case SIOCSIFDSTADDR: 457 ifp->if_dstaddr = ifr->ifr_dstaddr; 458 break; 459 460 default: 461 error = EINVAL; 462 } 463 splx(s); 464 return (error); 465 } 466