1 /* if_dmc.c 4.26 83/05/27 */ 2 3 #include "dmc.h" 4 #if NDMC > 0 5 #define printd if(dmcdebug)printf 6 int dmcdebug = 0; 7 /* 8 * DMC11 device driver, internet version 9 * 10 * TODO 11 * allow more than one outstanding read or write. 12 * 13 * UNTESTED WITH 4.1C 14 */ 15 #include "../machine/pte.h" 16 17 #include "../h/param.h" 18 #include "../h/systm.h" 19 #include "../h/mbuf.h" 20 #include "../h/buf.h" 21 #include "../h/tty.h" 22 #include "../h/protosw.h" 23 #include "../h/socket.h" 24 #include "../h/vmmac.h" 25 #include <errno.h> 26 27 #include "../net/if.h" 28 #include "../net/netisr.h" 29 #include "../net/route.h" 30 #include "../netinet/in.h" 31 #include "../netinet/in_systm.h" 32 33 #include "../vax/cpu.h" 34 #include "../vax/mtpr.h" 35 #include "../vaxif/if_uba.h" 36 #include "../vaxif/if_dmc.h" 37 #include "../vaxuba/ubareg.h" 38 #include "../vaxuba/ubavar.h" 39 40 #ifndef DMC_USEMAINT 41 #define DMC_USEMAINT 1 /* use maintenance mode */ 42 #endif 43 44 /* 45 * Driver information for auto-configuration stuff. 46 */ 47 int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 48 struct uba_device *dmcinfo[NDMC]; 49 u_short dmcstd[] = { 0 }; 50 struct uba_driver dmcdriver = 51 { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 52 53 #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 54 #define DMC_NET 0xffffff00 /* 24 bits of net number in ui_flags */ 55 56 /* 57 * DMC software status per interface. 58 * 59 * Each interface is referenced by a network interface structure, 60 * sc_if, which the routing code uses to locate the interface. 61 * This structure contains the output queue for the interface, its address, ... 62 * We also have, for each interface, a UBA interface structure, which 63 * contains information about the UNIBUS resources held by the interface: 64 * map registers, buffered data paths, etc. Information is cached in this 65 * structure for use by the if_uba.c routines in running the interface 66 * efficiently. 67 */ 68 struct dmc_softc { 69 struct ifnet sc_if; /* network-visible interface */ 70 struct ifuba sc_ifuba; /* UNIBUS resources */ 71 short sc_flag; /* flags */ 72 short sc_oactive; /* output active */ 73 int sc_ubinfo; /* UBA mapping info for base table */ 74 struct clist sc_que; /* command queue */ 75 } dmc_softc[NDMC]; 76 77 /* flags */ 78 #define DMCRUN 01 79 #define DMCBMAPPED 02 /* base table mapped */ 80 81 struct dmc_base { 82 short d_base[128]; /* DMC base table */ 83 } dmc_base[NDMC]; 84 85 #define loword(x) ((short *)&x)[0] 86 #define hiword(x) ((short *)&x)[1] 87 88 dmcprobe(reg) 89 caddr_t reg; 90 { 91 register int br, cvec; 92 register struct dmcdevice *addr = (struct dmcdevice *)reg; 93 register int i; 94 95 #ifdef lint 96 br = 0; cvec = br; br = cvec; 97 dmcrint(0); dmcxint(0); 98 #endif 99 addr->bsel1 = DMC_MCLR; 100 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 101 ; 102 if ((addr->bsel1 & DMC_RUN) == 0) 103 return (0); 104 addr->bsel1 &= ~DMC_MCLR; 105 addr->bsel0 = DMC_RQI|DMC_IEI; 106 DELAY(100000); 107 addr->bsel1 = DMC_MCLR; 108 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 109 ; 110 #ifdef ECHACK 111 br = 0x16; 112 #endif 113 return (1); 114 } 115 116 /* 117 * Interface exists: make available by filling in network interface 118 * record. System will initialize the interface when it is ready 119 * to accept packets. 120 */ 121 dmcattach(ui) 122 register struct uba_device *ui; 123 { 124 register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 125 register struct sockaddr_in *sin; 126 127 sc->sc_if.if_unit = ui->ui_unit; 128 sc->sc_if.if_name = "dmc"; 129 sc->sc_if.if_mtu = DMCMTU; 130 sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 131 sc->sc_if.if_host[0] = 17; /* random number */ 132 sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 133 sin->sin_family = AF_INET; 134 sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 135 sc->sc_if.if_init = dmcinit; 136 sc->sc_if.if_output = dmcoutput; 137 sc->sc_if.if_reset = dmcreset; 138 /* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */ 139 sc->sc_ifuba.ifu_flags = UBA_NEEDBDP | UBA_CANTWAIT; 140 if_attach(&sc->sc_if); 141 } 142 143 /* 144 * Reset of interface after UNIBUS reset. 145 * If interface is on specified UBA, reset it's state. 146 */ 147 dmcreset(unit, uban) 148 int unit, uban; 149 { 150 register struct uba_device *ui; 151 152 if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 153 ui->ui_ubanum != uban) 154 return; 155 printf(" dmc%d", unit); 156 dmcinit(unit); 157 } 158 159 /* 160 * Initialization of interface; reinitialize UNIBUS usage. 161 */ 162 dmcinit(unit) 163 int unit; 164 { 165 register struct dmc_softc *sc = &dmc_softc[unit]; 166 register struct uba_device *ui = dmcinfo[unit]; 167 register struct dmcdevice *addr; 168 int base; 169 170 printd("dmcinit\n"); 171 if ((sc->sc_flag&DMCBMAPPED) == 0) { 172 sc->sc_ubinfo = uballoc(ui->ui_ubanum, 173 (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 174 sc->sc_flag |= DMCBMAPPED; 175 } 176 if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 177 (int)btoc(DMCMTU)) == 0) { 178 printf("dmc%d: can't initialize\n", unit); 179 sc->sc_if.if_flags &= ~IFF_UP; 180 return; 181 } 182 addr = (struct dmcdevice *)ui->ui_addr; 183 addr->bsel2 |= DMC_IEO; 184 base = sc->sc_ubinfo & 0x3ffff; 185 printd(" base 0x%x\n", base); 186 dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 187 dmcload(sc, DMC_CNTLI, 0, DMC_USEMAINT ? DMC_MAINT : 0); 188 base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 189 dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 190 printd(" first read queued, addr 0x%x\n", base); 191 sc->sc_if.if_flags |= IFF_UP; 192 /* set up routing table entry */ 193 if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) { 194 rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr, RTF_HOST|RTF_UP); 195 sc->sc_if.if_flags |= IFF_ROUTE; 196 } 197 } 198 199 /* 200 * Start output on interface. Get another datagram 201 * to send from the interface queue and map it to 202 * the interface before starting output. 203 */ 204 dmcstart(dev) 205 dev_t dev; 206 { 207 int unit = minor(dev); 208 register struct dmc_softc *sc = &dmc_softc[unit]; 209 int addr, len; 210 struct mbuf *m; 211 212 printd("dmcstart\n"); 213 /* 214 * Dequeue a request and map it to the UNIBUS. 215 * If no more requests, just return. 216 */ 217 IF_DEQUEUE(&sc->sc_if.if_snd, m); 218 if (m == 0) 219 return; 220 len = if_wubaput(&sc->sc_ifuba, m); 221 222 /* 223 * Have request mapped to UNIBUS for transmission. 224 * Purge any stale data from this BDP and start the output. 225 */ 226 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 227 UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 228 addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 229 printd(" len %d, addr 0x%x, ", len, addr); 230 printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 231 dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 232 sc->sc_oactive = 1; 233 } 234 235 /* 236 * Utility routine to load the DMC device registers. 237 */ 238 dmcload(sc, type, w0, w1) 239 register struct dmc_softc *sc; 240 int type, w0, w1; 241 { 242 register struct dmcdevice *addr; 243 register int unit, sps, n; 244 245 printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 246 unit = sc - dmc_softc; 247 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 248 sps = spl5(); 249 if ((n = sc->sc_que.c_cc) == 0) 250 addr->bsel0 = type | DMC_RQI; 251 else 252 (void) putc(type | DMC_RQI, &sc->sc_que); 253 (void) putw(w0, &sc->sc_que); 254 (void) putw(w1, &sc->sc_que); 255 if (n == 0) 256 dmcrint(unit); 257 splx(sps); 258 } 259 260 /* 261 * DMC interface receiver interrupt. 262 * Ready to accept another command, 263 * pull one off the command queue. 264 */ 265 dmcrint(unit) 266 int unit; 267 { 268 register struct dmc_softc *sc; 269 register struct dmcdevice *addr; 270 register int n; 271 272 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 273 sc = &dmc_softc[unit]; 274 while (addr->bsel0&DMC_RDYI) { 275 addr->sel4 = getw(&sc->sc_que); 276 addr->sel6 = getw(&sc->sc_que); 277 addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 278 while (addr->bsel0&DMC_RDYI) 279 ; 280 if (sc->sc_que.c_cc == 0) 281 goto out; 282 addr->bsel0 = getc(&sc->sc_que); 283 n = RDYSCAN; 284 while (n-- && (addr->bsel0&DMC_RDYI) == 0) 285 ; 286 } 287 if (sc->sc_que.c_cc) 288 addr->bsel0 |= DMC_IEI; 289 out: 290 dmcxint(unit); 291 } 292 293 /* 294 * DMC interface transmitter interrupt. 295 * A transfer has completed, check for errors. 296 * If it was a read, notify appropriate protocol. 297 * If it was a write, pull the next one off the queue. 298 */ 299 dmcxint(unit) 300 int unit; 301 { 302 register struct dmc_softc *sc; 303 struct uba_device *ui = dmcinfo[unit]; 304 struct dmcdevice *addr; 305 struct mbuf *m; 306 register struct ifqueue *inq; 307 int arg, arg2, cmd, len; 308 309 addr = (struct dmcdevice *)ui->ui_addr; 310 cmd = addr->bsel2 & 0xff; 311 if ((cmd & DMC_RDYO) == 0) 312 return; 313 arg2 = addr->sel4; 314 arg = addr->sel6; 315 addr->bsel2 &= ~DMC_RDYO; 316 sc = &dmc_softc[unit]; 317 printd("dmcxint\n"); 318 switch (cmd & 07) { 319 320 case DMC_OUR: 321 /* 322 * A read has completed. Purge input buffered 323 * data path. Pass packet to type specific 324 * higher-level input routine. 325 */ 326 sc->sc_if.if_ipackets++; 327 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 328 UBAPURGE(sc->sc_ifuba.ifu_uba, 329 sc->sc_ifuba.ifu_r.ifrw_bdp); 330 len = arg & DMC_CCOUNT; 331 printd(" read done, len %d\n", len); 332 switch (ui->ui_flags & DMC_AF) { 333 #ifdef INET 334 case AF_INET: 335 schednetisr(NETISR_IP); 336 inq = &ipintrq; 337 break; 338 #endif 339 340 default: 341 printf("dmc%d: unknown address type %d\n", unit, 342 ui->ui_flags & DMC_AF); 343 goto setup; 344 } 345 m = if_rubaget(&sc->sc_ifuba, len, 0); 346 if (m == 0) 347 goto setup; 348 if (IF_QFULL(inq)) { 349 IF_DROP(inq); 350 m_freem(m); 351 } else 352 IF_ENQUEUE(inq, m); 353 354 setup: 355 arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 356 dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 357 return; 358 359 case DMC_OUX: 360 /* 361 * A write has completed, start another 362 * transfer if there is more data to send. 363 */ 364 if (sc->sc_oactive == 0) 365 return; /* SHOULD IT BE A FATAL ERROR? */ 366 printd(" write done\n"); 367 sc->sc_if.if_opackets++; 368 sc->sc_oactive = 0; 369 if (sc->sc_ifuba.ifu_xtofree) { 370 m_freem(sc->sc_ifuba.ifu_xtofree); 371 sc->sc_ifuba.ifu_xtofree = 0; 372 } 373 if (sc->sc_if.if_snd.ifq_head == 0) 374 return; 375 dmcstart(unit); 376 return; 377 378 case DMC_CNTLO: 379 arg &= DMC_CNTMASK; 380 if (arg&DMC_FATAL) { 381 addr->bsel1 = DMC_MCLR; 382 sc->sc_flag &= ~DMCRUN; 383 /*** DO SOMETHING TO RESTART DEVICE ***/ 384 printf("DMC FATAL ERROR 0%o\n", arg); 385 } else { 386 /* ACCUMULATE STATISTICS */ 387 printf("DMC SOFT ERROR 0%o\n", arg); 388 } 389 return; 390 391 default: 392 printf("dmc%d: bad control %o\n", unit, cmd); 393 } 394 } 395 396 /* 397 * DMC output routine. 398 * Just send the data, header was supplied by 399 * upper level protocol routines. 400 */ 401 dmcoutput(ifp, m, dst) 402 register struct ifnet *ifp; 403 register struct mbuf *m; 404 struct sockaddr *dst; 405 { 406 struct uba_device *ui = dmcinfo[ifp->if_unit]; 407 int s; 408 409 printd("dmcoutput\n"); 410 if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 411 printf("dmc%d: af%d not supported\n", ifp->if_unit, 412 dst->sa_family); 413 m_freem(m); 414 return (EAFNOSUPPORT); 415 } 416 s = splimp(); 417 if (IF_QFULL(&ifp->if_snd)) { 418 IF_DROP(&ifp->if_snd); 419 m_freem(m); 420 splx(s); 421 return (ENOBUFS); 422 } 423 IF_ENQUEUE(&ifp->if_snd, m); 424 if (dmc_softc[ifp->if_unit].sc_oactive == 0) 425 dmcstart(ifp->if_unit); 426 splx(s); 427 return (0); 428 } 429