1 /* if_dmc.c 4.25 83/02/21 */ 2 3 #include "dmc.h" 4 #if NDMC > 0 5 #define printd if(dmcdebug)printf 6 int dmcdebug = 0; 7 /* 8 * DMC11 device driver, internet version 9 * 10 * TODO 11 * allow more than one outstanding read or write. 12 * 13 * UNTESTED WITH 4.1C 14 */ 15 #include "../machine/pte.h" 16 17 #include "../h/param.h" 18 #include "../h/systm.h" 19 #include "../h/mbuf.h" 20 #include "../h/buf.h" 21 #include "../h/tty.h" 22 #include "../h/protosw.h" 23 #include "../h/socket.h" 24 #include "../h/vmmac.h" 25 #include <errno.h> 26 27 #include "../net/if.h" 28 #include "../net/netisr.h" 29 #include "../net/route.h" 30 #include "../netinet/in.h" 31 #include "../netinet/in_systm.h" 32 33 #include "../vax/cpu.h" 34 #include "../vax/mtpr.h" 35 #include "../vaxif/if_uba.h" 36 #include "../vaxif/if_dmc.h" 37 #include "../vaxuba/ubareg.h" 38 #include "../vaxuba/ubavar.h" 39 40 #ifndef DMC_USEMAINT 41 #define DMC_USEMAINT 1 /* use maintenance mode */ 42 #endif 43 44 /* 45 * Driver information for auto-configuration stuff. 46 */ 47 int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 48 struct uba_device *dmcinfo[NDMC]; 49 u_short dmcstd[] = { 0 }; 50 struct uba_driver dmcdriver = 51 { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 52 53 #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 54 #define DMC_NET 0xffffff00 /* 24 bits of net number in ui_flags */ 55 56 /* 57 * DMC software status per interface. 58 * 59 * Each interface is referenced by a network interface structure, 60 * sc_if, which the routing code uses to locate the interface. 61 * This structure contains the output queue for the interface, its address, ... 62 * We also have, for each interface, a UBA interface structure, which 63 * contains information about the UNIBUS resources held by the interface: 64 * map registers, buffered data paths, etc. Information is cached in this 65 * structure for use by the if_uba.c routines in running the interface 66 * efficiently. 67 */ 68 struct dmc_softc { 69 struct ifnet sc_if; /* network-visible interface */ 70 struct ifuba sc_ifuba; /* UNIBUS resources */ 71 short sc_flag; /* flags */ 72 short sc_oactive; /* output active */ 73 int sc_ubinfo; /* UBA mapping info for base table */ 74 struct clist sc_que; /* command queue */ 75 } dmc_softc[NDMC]; 76 77 /* flags */ 78 #define DMCRUN 01 79 #define DMCBMAPPED 02 /* base table mapped */ 80 81 struct dmc_base { 82 short d_base[128]; /* DMC base table */ 83 } dmc_base[NDMC]; 84 85 #define loword(x) ((short *)&x)[0] 86 #define hiword(x) ((short *)&x)[1] 87 88 dmcprobe(reg) 89 caddr_t reg; 90 { 91 register int br, cvec; 92 register struct dmcdevice *addr = (struct dmcdevice *)reg; 93 register int i; 94 95 #ifdef lint 96 br = 0; cvec = br; br = cvec; 97 dmcrint(0); dmcxint(0); 98 #endif 99 addr->bsel1 = DMC_MCLR; 100 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 101 ; 102 if ((addr->bsel1 & DMC_RUN) == 0) 103 return (0); 104 addr->bsel1 &= ~DMC_MCLR; 105 addr->bsel0 = DMC_RQI|DMC_IEI; 106 DELAY(100000); 107 addr->bsel1 = DMC_MCLR; 108 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 109 ; 110 #ifdef ECHACK 111 br = 0x16; 112 #endif 113 return (1); 114 } 115 116 /* 117 * Interface exists: make available by filling in network interface 118 * record. System will initialize the interface when it is ready 119 * to accept packets. 120 */ 121 dmcattach(ui) 122 register struct uba_device *ui; 123 { 124 register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 125 register struct sockaddr_in *sin; 126 127 sc->sc_if.if_unit = ui->ui_unit; 128 sc->sc_if.if_name = "dmc"; 129 sc->sc_if.if_mtu = DMCMTU; 130 sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 131 sc->sc_if.if_host[0] = 17; /* random number */ 132 sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 133 sin->sin_family = AF_INET; 134 sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 135 sc->sc_if.if_init = dmcinit; 136 sc->sc_if.if_output = dmcoutput; 137 sc->sc_if.if_reset = dmcreset; 138 /* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */ 139 sc->sc_ifuba.ifu_flags = UBA_NEEDBDP | UBA_CANTWAIT; 140 if_attach(&sc->sc_if); 141 } 142 143 /* 144 * Reset of interface after UNIBUS reset. 145 * If interface is on specified UBA, reset it's state. 146 */ 147 dmcreset(unit, uban) 148 int unit, uban; 149 { 150 register struct uba_device *ui; 151 152 if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 153 ui->ui_ubanum != uban) 154 return; 155 printf(" dmc%d", unit); 156 dmcinit(unit); 157 } 158 159 /* 160 * Initialization of interface; reinitialize UNIBUS usage. 161 */ 162 dmcinit(unit) 163 int unit; 164 { 165 register struct dmc_softc *sc = &dmc_softc[unit]; 166 register struct uba_device *ui = dmcinfo[unit]; 167 register struct dmcdevice *addr; 168 int base; 169 170 printd("dmcinit\n"); 171 if ((sc->sc_flag&DMCBMAPPED) == 0) { 172 sc->sc_ubinfo = uballoc(ui->ui_ubanum, 173 (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 174 sc->sc_flag |= DMCBMAPPED; 175 } 176 if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 177 (int)btoc(DMCMTU)) == 0) { 178 printf("dmc%d: can't initialize\n", unit); 179 sc->sc_if.if_flags &= ~IFF_UP; 180 return; 181 } 182 addr = (struct dmcdevice *)ui->ui_addr; 183 addr->bsel2 |= DMC_IEO; 184 base = sc->sc_ubinfo & 0x3ffff; 185 printd(" base 0x%x\n", base); 186 dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 187 dmcload(sc, DMC_CNTLI, 0, DMC_USEMAINT ? DMC_MAINT : 0); 188 base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 189 dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 190 printd(" first read queued, addr 0x%x\n", base); 191 sc->sc_if.if_flags |= IFF_UP; 192 /* set up routing table entry */ 193 if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) { 194 rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr, RTF_HOST|RTF_UP); 195 sc->sc_if.if_flags |= IFF_ROUTE; 196 } 197 } 198 199 /* 200 * Start output on interface. Get another datagram 201 * to send from the interface queue and map it to 202 * the interface before starting output. 203 */ 204 dmcstart(dev) 205 dev_t dev; 206 { 207 int unit = minor(dev); 208 struct uba_device *ui = dmcinfo[unit]; 209 register struct dmc_softc *sc = &dmc_softc[unit]; 210 int addr, len; 211 struct mbuf *m; 212 213 printd("dmcstart\n"); 214 /* 215 * Dequeue a request and map it to the UNIBUS. 216 * If no more requests, just return. 217 */ 218 IF_DEQUEUE(&sc->sc_if.if_snd, m); 219 if (m == 0) 220 return; 221 len = if_wubaput(&sc->sc_ifuba, m); 222 223 /* 224 * Have request mapped to UNIBUS for transmission. 225 * Purge any stale data from this BDP and start the output. 226 */ 227 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 228 UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 229 addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 230 printd(" len %d, addr 0x%x, ", len, addr); 231 printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 232 dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 233 sc->sc_oactive = 1; 234 } 235 236 /* 237 * Utility routine to load the DMC device registers. 238 */ 239 dmcload(sc, type, w0, w1) 240 register struct dmc_softc *sc; 241 int type, w0, w1; 242 { 243 register struct dmcdevice *addr; 244 register int unit, sps, n; 245 246 printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 247 unit = sc - dmc_softc; 248 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 249 sps = spl5(); 250 if ((n = sc->sc_que.c_cc) == 0) 251 addr->bsel0 = type | DMC_RQI; 252 else 253 (void) putc(type | DMC_RQI, &sc->sc_que); 254 (void) putw(w0, &sc->sc_que); 255 (void) putw(w1, &sc->sc_que); 256 if (n == 0) 257 dmcrint(unit); 258 splx(sps); 259 } 260 261 /* 262 * DMC interface receiver interrupt. 263 * Ready to accept another command, 264 * pull one off the command queue. 265 */ 266 dmcrint(unit) 267 int unit; 268 { 269 register struct dmc_softc *sc; 270 register struct dmcdevice *addr; 271 register int n; 272 273 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 274 sc = &dmc_softc[unit]; 275 while (addr->bsel0&DMC_RDYI) { 276 addr->sel4 = getw(&sc->sc_que); 277 addr->sel6 = getw(&sc->sc_que); 278 addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 279 while (addr->bsel0&DMC_RDYI) 280 ; 281 if (sc->sc_que.c_cc == 0) 282 goto out; 283 addr->bsel0 = getc(&sc->sc_que); 284 n = RDYSCAN; 285 while (n-- && (addr->bsel0&DMC_RDYI) == 0) 286 ; 287 } 288 if (sc->sc_que.c_cc) 289 addr->bsel0 |= DMC_IEI; 290 out: 291 dmcxint(unit); 292 } 293 294 /* 295 * DMC interface transmitter interrupt. 296 * A transfer has completed, check for errors. 297 * If it was a read, notify appropriate protocol. 298 * If it was a write, pull the next one off the queue. 299 */ 300 dmcxint(unit) 301 int unit; 302 { 303 register struct dmc_softc *sc; 304 struct uba_device *ui = dmcinfo[unit]; 305 struct dmcdevice *addr; 306 struct mbuf *m; 307 register struct ifqueue *inq; 308 int arg, arg2, cmd, len; 309 310 addr = (struct dmcdevice *)ui->ui_addr; 311 cmd = addr->bsel2 & 0xff; 312 if ((cmd & DMC_RDYO) == 0) 313 return; 314 arg2 = addr->sel4; 315 arg = addr->sel6; 316 addr->bsel2 &= ~DMC_RDYO; 317 sc = &dmc_softc[unit]; 318 printd("dmcxint\n"); 319 switch (cmd & 07) { 320 321 case DMC_OUR: 322 /* 323 * A read has completed. Purge input buffered 324 * data path. Pass packet to type specific 325 * higher-level input routine. 326 */ 327 sc->sc_if.if_ipackets++; 328 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 329 UBAPURGE(sc->sc_ifuba.ifu_uba, 330 sc->sc_ifuba.ifu_r.ifrw_bdp); 331 len = arg & DMC_CCOUNT; 332 printd(" read done, len %d\n", len); 333 switch (ui->ui_flags & DMC_AF) { 334 #ifdef INET 335 case AF_INET: 336 schednetisr(NETISR_IP); 337 inq = &ipintrq; 338 break; 339 #endif 340 341 default: 342 printf("dmc%d: unknown address type %d\n", unit, 343 ui->ui_flags & DMC_AF); 344 goto setup; 345 } 346 m = if_rubaget(&sc->sc_ifuba, len, 0); 347 if (m == 0) 348 goto setup; 349 if (IF_QFULL(inq)) { 350 IF_DROP(inq); 351 m_freem(m); 352 } else 353 IF_ENQUEUE(inq, m); 354 355 setup: 356 arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 357 dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 358 return; 359 360 case DMC_OUX: 361 /* 362 * A write has completed, start another 363 * transfer if there is more data to send. 364 */ 365 if (sc->sc_oactive == 0) 366 return; /* SHOULD IT BE A FATAL ERROR? */ 367 printd(" write done\n"); 368 sc->sc_if.if_opackets++; 369 sc->sc_oactive = 0; 370 if (sc->sc_ifuba.ifu_xtofree) { 371 m_freem(sc->sc_ifuba.ifu_xtofree); 372 sc->sc_ifuba.ifu_xtofree = 0; 373 } 374 if (sc->sc_if.if_snd.ifq_head == 0) 375 return; 376 dmcstart(unit); 377 return; 378 379 case DMC_CNTLO: 380 arg &= DMC_CNTMASK; 381 if (arg&DMC_FATAL) { 382 addr->bsel1 = DMC_MCLR; 383 sc->sc_flag &= ~DMCRUN; 384 /*** DO SOMETHING TO RESTART DEVICE ***/ 385 printf("DMC FATAL ERROR 0%o\n", arg); 386 } else { 387 /* ACCUMULATE STATISTICS */ 388 printf("DMC SOFT ERROR 0%o\n", arg); 389 } 390 return; 391 392 default: 393 printf("dmc%d: bad control %o\n", unit, cmd); 394 } 395 } 396 397 /* 398 * DMC output routine. 399 * Just send the data, header was supplied by 400 * upper level protocol routines. 401 */ 402 dmcoutput(ifp, m, dst) 403 register struct ifnet *ifp; 404 register struct mbuf *m; 405 struct sockaddr *dst; 406 { 407 struct uba_device *ui = dmcinfo[ifp->if_unit]; 408 int s; 409 410 printd("dmcoutput\n"); 411 if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 412 printf("dmc%d: af%d not supported\n", ifp->if_unit, 413 dst->sa_family); 414 m_freem(m); 415 return (EAFNOSUPPORT); 416 } 417 s = splimp(); 418 if (IF_QFULL(&ifp->if_snd)) { 419 IF_DROP(&ifp->if_snd); 420 m_freem(m); 421 splx(s); 422 return (ENOBUFS); 423 } 424 IF_ENQUEUE(&ifp->if_snd, m); 425 if (dmc_softc[ifp->if_unit].sc_oactive == 0) 426 dmcstart(ifp->if_unit); 427 splx(s); 428 return (0); 429 } 430