1*9794Ssam /* if_dmc.c 4.22 82/12/17 */ 25725Sroot 35725Sroot #include "dmc.h" 45725Sroot #if NDMC > 0 55725Sroot #define printd if(dmcdebug)printf 65725Sroot int dmcdebug = 1; 75725Sroot /* 85725Sroot * DMC11 device driver, internet version 95725Sroot * 105725Sroot * TODO 115725Sroot * allow more than one outstanding read or write. 125725Sroot */ 13*9794Ssam #include "../machine/pte.h" 145725Sroot 155725Sroot #include "../h/param.h" 165725Sroot #include "../h/systm.h" 175725Sroot #include "../h/mbuf.h" 185725Sroot #include "../h/buf.h" 195725Sroot #include "../h/tty.h" 205725Sroot #include "../h/protosw.h" 215725Sroot #include "../h/socket.h" 225725Sroot #include "../h/vmmac.h" 238460Sroot #include <errno.h> 248460Sroot 258460Sroot #include "../net/if.h" 269176Ssam #include "../net/netisr.h" 278460Sroot #include "../net/route.h" 288416Swnj #include "../netinet/in.h" 298416Swnj #include "../netinet/in_systm.h" 308460Sroot 318460Sroot #include "../vax/cpu.h" 328460Sroot #include "../vax/mtpr.h" 338416Swnj #include "../vaxif/if_uba.h" 348416Swnj #include "../vaxif/if_dmc.h" 358460Sroot #include "../vaxuba/ubareg.h" 368460Sroot #include "../vaxuba/ubavar.h" 375725Sroot 385725Sroot /* 395725Sroot * Driver information for auto-configuration stuff. 405725Sroot */ 415725Sroot int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 425725Sroot struct uba_device *dmcinfo[NDMC]; 435725Sroot u_short dmcstd[] = { 0 }; 445725Sroot struct uba_driver dmcdriver = 455725Sroot { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 465725Sroot 476334Ssam #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 487161Ssam #define DMC_NET 0xffffff00 /* 24 bits of net number in ui_flags */ 495725Sroot 505725Sroot /* 515725Sroot * DMC software status per interface. 525725Sroot * 535725Sroot * Each interface is referenced by a network interface structure, 545725Sroot * sc_if, which the routing code uses to locate the interface. 555725Sroot * This structure contains the output queue for the interface, its address, ... 565725Sroot * We also have, for each interface, a UBA interface structure, which 575725Sroot * contains information about the UNIBUS resources held by the interface: 585725Sroot * map registers, buffered data paths, etc. Information is cached in this 595725Sroot * structure for use by the if_uba.c routines in running the interface 605725Sroot * efficiently. 615725Sroot */ 625725Sroot struct dmc_softc { 635725Sroot struct ifnet sc_if; /* network-visible interface */ 645725Sroot struct ifuba sc_ifuba; /* UNIBUS resources */ 655725Sroot short sc_flag; /* flags */ 665725Sroot short sc_oactive; /* output active */ 675725Sroot int sc_ubinfo; /* UBA mapping info for base table */ 685725Sroot struct clist sc_que; /* command queue */ 695725Sroot } dmc_softc[NDMC]; 705725Sroot 715725Sroot /* flags */ 725725Sroot #define DMCRUN 01 735725Sroot #define DMCBMAPPED 02 /* base table mapped */ 745725Sroot 755725Sroot struct dmc_base { 765725Sroot short d_base[128]; /* DMC base table */ 775725Sroot } dmc_base[NDMC]; 785725Sroot 795725Sroot #define loword(x) ((short *)&x)[0] 805725Sroot #define hiword(x) ((short *)&x)[1] 815725Sroot 825725Sroot dmcprobe(reg) 835725Sroot caddr_t reg; 845725Sroot { 855725Sroot register int br, cvec; 865725Sroot register struct dmcdevice *addr = (struct dmcdevice *)reg; 875725Sroot register int i; 885725Sroot 895725Sroot #ifdef lint 905725Sroot br = 0; cvec = br; br = cvec; 915725Sroot dmcrint(0); dmcxint(0); 925725Sroot #endif 935725Sroot addr->bsel1 = DMC_MCLR; 945725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 955725Sroot ; 965725Sroot if ((addr->bsel1 & DMC_RUN) == 0) 976334Ssam return (0); 985725Sroot addr->bsel1 &= ~DMC_MCLR; 995725Sroot addr->bsel0 = DMC_RQI|DMC_IEI; 1005725Sroot DELAY(100000); 1015725Sroot addr->bsel1 = DMC_MCLR; 1025725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 1035725Sroot ; 1046575Ssam #ifdef ECHACK 1056575Ssam br = 0x16; 1066575Ssam #endif 1076334Ssam return (1); 1085725Sroot } 1095725Sroot 1105725Sroot /* 1115725Sroot * Interface exists: make available by filling in network interface 1125725Sroot * record. System will initialize the interface when it is ready 1135725Sroot * to accept packets. 1145725Sroot */ 1155725Sroot dmcattach(ui) 1165725Sroot register struct uba_device *ui; 1175725Sroot { 1185725Sroot register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 1196334Ssam register struct sockaddr_in *sin; 1205725Sroot 1215725Sroot sc->sc_if.if_unit = ui->ui_unit; 1225725Sroot sc->sc_if.if_name = "dmc"; 1235725Sroot sc->sc_if.if_mtu = DMCMTU; 1245725Sroot sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 1255725Sroot sc->sc_if.if_host[0] = 17; /* random number */ 1266334Ssam sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 1276587Ssam sin->sin_family = AF_INET; 1286334Ssam sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 1295725Sroot sc->sc_if.if_init = dmcinit; 1305725Sroot sc->sc_if.if_output = dmcoutput; 1318976Sroot sc->sc_if.if_reset = dmcreset; 1326587Ssam /* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */ 1336587Ssam sc->sc_ifuba.ifu_flags = UBA_NEEDBDP | UBA_CANTWAIT; 1345725Sroot if_attach(&sc->sc_if); 1355725Sroot } 1365725Sroot 1375725Sroot /* 1385725Sroot * Reset of interface after UNIBUS reset. 1395725Sroot * If interface is on specified UBA, reset it's state. 1405725Sroot */ 1415725Sroot dmcreset(unit, uban) 1425725Sroot int unit, uban; 1435725Sroot { 1445725Sroot register struct uba_device *ui; 1455725Sroot 1465725Sroot if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 1475725Sroot ui->ui_ubanum != uban) 1485725Sroot return; 1495725Sroot printf(" dmc%d", unit); 1505725Sroot dmcinit(unit); 1515725Sroot } 1525725Sroot 1535725Sroot /* 1545725Sroot * Initialization of interface; reinitialize UNIBUS usage. 1555725Sroot */ 1565725Sroot dmcinit(unit) 1575725Sroot int unit; 1585725Sroot { 1595725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 1605725Sroot register struct uba_device *ui = dmcinfo[unit]; 1615725Sroot register struct dmcdevice *addr; 1625725Sroot int base; 1635725Sroot 1645725Sroot printd("dmcinit\n"); 1655725Sroot if ((sc->sc_flag&DMCBMAPPED) == 0) { 1665725Sroot sc->sc_ubinfo = uballoc(ui->ui_ubanum, 1675725Sroot (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 1685725Sroot sc->sc_flag |= DMCBMAPPED; 1695725Sroot } 1705725Sroot if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 1715768Sroot (int)btoc(DMCMTU)) == 0) { 1725725Sroot printf("dmc%d: can't initialize\n", unit); 1736334Ssam sc->sc_if.if_flags &= ~IFF_UP; 1745725Sroot return; 1755725Sroot } 1765725Sroot addr = (struct dmcdevice *)ui->ui_addr; 1775725Sroot addr->bsel2 |= DMC_IEO; 1785725Sroot base = sc->sc_ubinfo & 0x3ffff; 1795725Sroot printd(" base 0x%x\n", base); 1805725Sroot dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 1815725Sroot dmcload(sc, DMC_CNTLI, 0, 0); 1825725Sroot base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 1835725Sroot dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 1845725Sroot printd(" first read queued, addr 0x%x\n", base); 1856334Ssam sc->sc_if.if_flags |= IFF_UP; 1866363Ssam /* set up routing table entry */ 1876363Ssam if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) { 1887150Swnj rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr, RTF_HOST|RTF_UP); 1896363Ssam sc->sc_if.if_flags |= IFF_ROUTE; 1906363Ssam } 1915725Sroot } 1925725Sroot 1935725Sroot /* 1945725Sroot * Start output on interface. Get another datagram 1955725Sroot * to send from the interface queue and map it to 1965725Sroot * the interface before starting output. 1975725Sroot */ 1985725Sroot dmcstart(dev) 1995725Sroot dev_t dev; 2005725Sroot { 2015725Sroot int unit = minor(dev); 2025725Sroot struct uba_device *ui = dmcinfo[unit]; 2035725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 2045725Sroot int addr, len; 2055725Sroot struct mbuf *m; 2065725Sroot 2075725Sroot printd("dmcstart\n"); 2085725Sroot /* 2095725Sroot * Dequeue a request and map it to the UNIBUS. 2105725Sroot * If no more requests, just return. 2115725Sroot */ 2125725Sroot IF_DEQUEUE(&sc->sc_if.if_snd, m); 2135725Sroot if (m == 0) 2145725Sroot return; 2155725Sroot len = if_wubaput(&sc->sc_ifuba, m); 2165725Sroot 2175725Sroot /* 2185725Sroot * Have request mapped to UNIBUS for transmission. 2195725Sroot * Purge any stale data from this BDP and start the output. 2205725Sroot */ 2216587Ssam if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 2225853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 2235725Sroot addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 2245725Sroot printd(" len %d, addr 0x%x, ", len, addr); 2255725Sroot printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 2265725Sroot dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 2275725Sroot sc->sc_oactive = 1; 2285725Sroot } 2295725Sroot 2305725Sroot /* 2315725Sroot * Utility routine to load the DMC device registers. 2325725Sroot */ 2335725Sroot dmcload(sc, type, w0, w1) 2345725Sroot register struct dmc_softc *sc; 2355725Sroot int type, w0, w1; 2365725Sroot { 2375725Sroot register struct dmcdevice *addr; 2385725Sroot register int unit, sps, n; 2395725Sroot 2405725Sroot printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 2415725Sroot unit = sc - dmc_softc; 2425725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2435725Sroot sps = spl5(); 2445725Sroot if ((n = sc->sc_que.c_cc) == 0) 2455725Sroot addr->bsel0 = type | DMC_RQI; 2465725Sroot else 2476159Ssam (void) putc(type | DMC_RQI, &sc->sc_que); 2486159Ssam (void) putw(w0, &sc->sc_que); 2496159Ssam (void) putw(w1, &sc->sc_que); 2505725Sroot if (n == 0) 2515725Sroot dmcrint(unit); 2525725Sroot splx(sps); 2535725Sroot } 2545725Sroot 2555725Sroot /* 2565725Sroot * DMC interface receiver interrupt. 2575725Sroot * Ready to accept another command, 2585725Sroot * pull one off the command queue. 2595725Sroot */ 2605725Sroot dmcrint(unit) 2615725Sroot int unit; 2625725Sroot { 2635725Sroot register struct dmc_softc *sc; 2645725Sroot register struct dmcdevice *addr; 2655725Sroot register int n; 2665725Sroot 2675725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2685725Sroot sc = &dmc_softc[unit]; 2695725Sroot while (addr->bsel0&DMC_RDYI) { 2705725Sroot addr->sel4 = getw(&sc->sc_que); 2715725Sroot addr->sel6 = getw(&sc->sc_que); 2725725Sroot addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 2735725Sroot while (addr->bsel0&DMC_RDYI) 2745725Sroot ; 2755725Sroot if (sc->sc_que.c_cc == 0) 2765725Sroot return; 2775725Sroot addr->bsel0 = getc(&sc->sc_que); 2785725Sroot n = RDYSCAN; 2795725Sroot while (n-- && (addr->bsel0&DMC_RDYI) == 0) 2805725Sroot ; 2815725Sroot } 2825725Sroot if (sc->sc_que.c_cc) 2835725Sroot addr->bsel0 |= DMC_IEI; 2845725Sroot } 2855725Sroot 2865725Sroot /* 2875725Sroot * DMC interface transmitter interrupt. 2885725Sroot * A transfer has completed, check for errors. 2895725Sroot * If it was a read, notify appropriate protocol. 2905725Sroot * If it was a write, pull the next one off the queue. 2915725Sroot */ 2925725Sroot dmcxint(unit) 2935725Sroot int unit; 2945725Sroot { 2955725Sroot register struct dmc_softc *sc; 2965725Sroot struct uba_device *ui = dmcinfo[unit]; 2975725Sroot struct dmcdevice *addr; 2985725Sroot struct mbuf *m; 2995725Sroot register struct ifqueue *inq; 3005725Sroot int arg, cmd, len; 3015725Sroot 3025725Sroot addr = (struct dmcdevice *)ui->ui_addr; 3035725Sroot arg = addr->sel6; 3045725Sroot cmd = addr->bsel2&7; 3055725Sroot addr->bsel2 &= ~DMC_RDYO; 3065725Sroot sc = &dmc_softc[unit]; 3075725Sroot printd("dmcxint\n"); 3085725Sroot switch (cmd) { 3095725Sroot 3105725Sroot case DMC_OUR: 3115725Sroot /* 3125725Sroot * A read has completed. Purge input buffered 3135725Sroot * data path. Pass packet to type specific 3145725Sroot * higher-level input routine. 3155725Sroot */ 3165725Sroot sc->sc_if.if_ipackets++; 3176587Ssam if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 3185853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, 3195853Sroot sc->sc_ifuba.ifu_r.ifrw_bdp); 3205725Sroot len = arg & DMC_CCOUNT; 3215725Sroot printd(" read done, len %d\n", len); 3226334Ssam switch (ui->ui_flags & DMC_AF) { 3235725Sroot #ifdef INET 3246334Ssam case AF_INET: 3256260Swnj schednetisr(NETISR_IP); 3265725Sroot inq = &ipintrq; 3275725Sroot break; 3285725Sroot #endif 3295725Sroot 3305725Sroot default: 3316334Ssam printf("dmc%d: unknown address type %d\n", unit, 3326334Ssam ui->ui_flags & DMC_AF); 3335725Sroot goto setup; 3345725Sroot } 3355725Sroot m = if_rubaget(&sc->sc_ifuba, len, 0); 3365725Sroot if (m == 0) 3375725Sroot goto setup; 3386207Swnj if (IF_QFULL(inq)) { 3396207Swnj IF_DROP(inq); 3409176Ssam m_freem(m); 3416207Swnj } else 3426207Swnj IF_ENQUEUE(inq, m); 3435725Sroot 3445725Sroot setup: 3455725Sroot arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 3465725Sroot dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 3475725Sroot return; 3485725Sroot 3495725Sroot case DMC_OUX: 3505725Sroot /* 3515725Sroot * A write has completed, start another 3525725Sroot * transfer if there is more data to send. 3535725Sroot */ 3545725Sroot if (sc->sc_oactive == 0) 3555725Sroot return; /* SHOULD IT BE A FATAL ERROR? */ 3565725Sroot printd(" write done\n"); 3575725Sroot sc->sc_if.if_opackets++; 3585725Sroot sc->sc_oactive = 0; 3595725Sroot if (sc->sc_ifuba.ifu_xtofree) { 3609176Ssam m_freem(sc->sc_ifuba.ifu_xtofree); 3615725Sroot sc->sc_ifuba.ifu_xtofree = 0; 3625725Sroot } 3635725Sroot if (sc->sc_if.if_snd.ifq_head == 0) 3645725Sroot return; 3655725Sroot dmcstart(unit); 3665725Sroot return; 3675725Sroot 3685725Sroot case DMC_CNTLO: 3695725Sroot arg &= DMC_CNTMASK; 3705725Sroot if (arg&DMC_FATAL) { 3715725Sroot addr->bsel1 = DMC_MCLR; 3725725Sroot sc->sc_flag &= ~DMCRUN; 3735725Sroot /*** DO SOMETHING TO RESTART DEVICE ***/ 3745725Sroot printf("DMC FATAL ERROR 0%o\n", arg); 3755725Sroot } else { 3765725Sroot /* ACCUMULATE STATISTICS */ 3775725Sroot printf("DMC SOFT ERROR 0%o\n", arg); 3785725Sroot } 3795725Sroot return; 3805725Sroot 3815725Sroot default: 3825725Sroot printf("dmc%d: bad control %o\n", unit, cmd); 3835725Sroot } 3845725Sroot } 3855725Sroot 3865725Sroot /* 3875725Sroot * DMC output routine. 3885725Sroot * Just send the data, header was supplied by 3895725Sroot * upper level protocol routines. 3905725Sroot */ 3916334Ssam dmcoutput(ifp, m, dst) 3925725Sroot register struct ifnet *ifp; 3935725Sroot register struct mbuf *m; 3946334Ssam struct sockaddr *dst; 3955725Sroot { 3965725Sroot struct uba_device *ui = dmcinfo[ifp->if_unit]; 3975725Sroot int s; 3985725Sroot 3995725Sroot printd("dmcoutput\n"); 4006334Ssam if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 4019176Ssam printf("dmc%d: af%d not supported\n", ifp->if_unit, 4029176Ssam dst->sa_family); 4036334Ssam m_freem(m); 4046502Ssam return (EAFNOSUPPORT); 4055725Sroot } 4065725Sroot s = splimp(); 4076207Swnj if (IF_QFULL(&ifp->if_snd)) { 4086207Swnj IF_DROP(&ifp->if_snd); 4096334Ssam m_freem(m); 4106207Swnj splx(s); 4116502Ssam return (ENOBUFS); 4126207Swnj } 4135725Sroot IF_ENQUEUE(&ifp->if_snd, m); 4145725Sroot if (dmc_softc[ifp->if_unit].sc_oactive == 0) 4155725Sroot dmcstart(ifp->if_unit); 4165725Sroot splx(s); 4176502Ssam return (0); 4185725Sroot } 419