1*8976Sroot /* if_dmc.c 4.20 82/10/31 */ 25725Sroot 35725Sroot #include "dmc.h" 45725Sroot #if NDMC > 0 55725Sroot #define printd if(dmcdebug)printf 65725Sroot int dmcdebug = 1; 75725Sroot /* 85725Sroot * DMC11 device driver, internet version 95725Sroot * 105725Sroot * TODO 115725Sroot * allow more than one outstanding read or write. 125725Sroot */ 135725Sroot 145725Sroot #include "../h/param.h" 155725Sroot #include "../h/systm.h" 165725Sroot #include "../h/mbuf.h" 175725Sroot #include "../h/pte.h" 185725Sroot #include "../h/buf.h" 195725Sroot #include "../h/tty.h" 205725Sroot #include "../h/protosw.h" 215725Sroot #include "../h/socket.h" 225725Sroot #include "../h/vmmac.h" 238460Sroot #include <errno.h> 248460Sroot 258460Sroot #include "../net/if.h" 268460Sroot #include "../net/route.h" 278416Swnj #include "../netinet/in.h" 288416Swnj #include "../netinet/in_systm.h" 298460Sroot 308460Sroot #include "../vax/cpu.h" 318460Sroot #include "../vax/mtpr.h" 328416Swnj #include "../vaxif/if_uba.h" 338416Swnj #include "../vaxif/if_dmc.h" 348460Sroot #include "../vaxuba/ubareg.h" 358460Sroot #include "../vaxuba/ubavar.h" 365725Sroot 375725Sroot /* 385725Sroot * Driver information for auto-configuration stuff. 395725Sroot */ 405725Sroot int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 415725Sroot struct uba_device *dmcinfo[NDMC]; 425725Sroot u_short dmcstd[] = { 0 }; 435725Sroot struct uba_driver dmcdriver = 445725Sroot { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 455725Sroot 466334Ssam #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 477161Ssam #define DMC_NET 0xffffff00 /* 24 bits of net number in ui_flags */ 485725Sroot 495725Sroot /* 505725Sroot * DMC software status per interface. 515725Sroot * 525725Sroot * Each interface is referenced by a network interface structure, 535725Sroot * sc_if, which the routing code uses to locate the interface. 545725Sroot * This structure contains the output queue for the interface, its address, ... 555725Sroot * We also have, for each interface, a UBA interface structure, which 565725Sroot * contains information about the UNIBUS resources held by the interface: 575725Sroot * map registers, buffered data paths, etc. Information is cached in this 585725Sroot * structure for use by the if_uba.c routines in running the interface 595725Sroot * efficiently. 605725Sroot */ 615725Sroot struct dmc_softc { 625725Sroot struct ifnet sc_if; /* network-visible interface */ 635725Sroot struct ifuba sc_ifuba; /* UNIBUS resources */ 645725Sroot short sc_flag; /* flags */ 655725Sroot short sc_oactive; /* output active */ 665725Sroot int sc_ubinfo; /* UBA mapping info for base table */ 675725Sroot struct clist sc_que; /* command queue */ 685725Sroot } dmc_softc[NDMC]; 695725Sroot 705725Sroot /* flags */ 715725Sroot #define DMCRUN 01 725725Sroot #define DMCBMAPPED 02 /* base table mapped */ 735725Sroot 745725Sroot struct dmc_base { 755725Sroot short d_base[128]; /* DMC base table */ 765725Sroot } dmc_base[NDMC]; 775725Sroot 785725Sroot #define loword(x) ((short *)&x)[0] 795725Sroot #define hiword(x) ((short *)&x)[1] 805725Sroot 815725Sroot dmcprobe(reg) 825725Sroot caddr_t reg; 835725Sroot { 845725Sroot register int br, cvec; 855725Sroot register struct dmcdevice *addr = (struct dmcdevice *)reg; 865725Sroot register int i; 875725Sroot 885725Sroot #ifdef lint 895725Sroot br = 0; cvec = br; br = cvec; 905725Sroot dmcrint(0); dmcxint(0); 915725Sroot #endif 925725Sroot addr->bsel1 = DMC_MCLR; 935725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 945725Sroot ; 955725Sroot if ((addr->bsel1 & DMC_RUN) == 0) 966334Ssam return (0); 975725Sroot addr->bsel1 &= ~DMC_MCLR; 985725Sroot addr->bsel0 = DMC_RQI|DMC_IEI; 995725Sroot DELAY(100000); 1005725Sroot addr->bsel1 = DMC_MCLR; 1015725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 1025725Sroot ; 1036575Ssam #ifdef ECHACK 1046575Ssam br = 0x16; 1056575Ssam #endif 1066334Ssam return (1); 1075725Sroot } 1085725Sroot 1095725Sroot /* 1105725Sroot * Interface exists: make available by filling in network interface 1115725Sroot * record. System will initialize the interface when it is ready 1125725Sroot * to accept packets. 1135725Sroot */ 1145725Sroot dmcattach(ui) 1155725Sroot register struct uba_device *ui; 1165725Sroot { 1175725Sroot register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 1186334Ssam register struct sockaddr_in *sin; 1195725Sroot 1205725Sroot sc->sc_if.if_unit = ui->ui_unit; 1215725Sroot sc->sc_if.if_name = "dmc"; 1225725Sroot sc->sc_if.if_mtu = DMCMTU; 1235725Sroot sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 1245725Sroot sc->sc_if.if_host[0] = 17; /* random number */ 1256334Ssam sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 1266587Ssam sin->sin_family = AF_INET; 1276334Ssam sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 1285725Sroot sc->sc_if.if_init = dmcinit; 1295725Sroot sc->sc_if.if_output = dmcoutput; 130*8976Sroot sc->sc_if.if_reset = dmcreset; 1316587Ssam /* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */ 1326587Ssam sc->sc_ifuba.ifu_flags = UBA_NEEDBDP | UBA_CANTWAIT; 1335725Sroot if_attach(&sc->sc_if); 1345725Sroot } 1355725Sroot 1365725Sroot /* 1375725Sroot * Reset of interface after UNIBUS reset. 1385725Sroot * If interface is on specified UBA, reset it's state. 1395725Sroot */ 1405725Sroot dmcreset(unit, uban) 1415725Sroot int unit, uban; 1425725Sroot { 1435725Sroot register struct uba_device *ui; 1445725Sroot 1455725Sroot if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 1465725Sroot ui->ui_ubanum != uban) 1475725Sroot return; 1485725Sroot printf(" dmc%d", unit); 1495725Sroot dmcinit(unit); 1505725Sroot } 1515725Sroot 1525725Sroot /* 1535725Sroot * Initialization of interface; reinitialize UNIBUS usage. 1545725Sroot */ 1555725Sroot dmcinit(unit) 1565725Sroot int unit; 1575725Sroot { 1585725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 1595725Sroot register struct uba_device *ui = dmcinfo[unit]; 1605725Sroot register struct dmcdevice *addr; 1615725Sroot int base; 1625725Sroot 1635725Sroot printd("dmcinit\n"); 1645725Sroot if ((sc->sc_flag&DMCBMAPPED) == 0) { 1655725Sroot sc->sc_ubinfo = uballoc(ui->ui_ubanum, 1665725Sroot (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 1675725Sroot sc->sc_flag |= DMCBMAPPED; 1685725Sroot } 1695725Sroot if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 1705768Sroot (int)btoc(DMCMTU)) == 0) { 1715725Sroot printf("dmc%d: can't initialize\n", unit); 1726334Ssam sc->sc_if.if_flags &= ~IFF_UP; 1735725Sroot return; 1745725Sroot } 1755725Sroot addr = (struct dmcdevice *)ui->ui_addr; 1765725Sroot addr->bsel2 |= DMC_IEO; 1775725Sroot base = sc->sc_ubinfo & 0x3ffff; 1785725Sroot printd(" base 0x%x\n", base); 1795725Sroot dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 1805725Sroot dmcload(sc, DMC_CNTLI, 0, 0); 1815725Sroot base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 1825725Sroot dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 1835725Sroot printd(" first read queued, addr 0x%x\n", base); 1846334Ssam sc->sc_if.if_flags |= IFF_UP; 1856363Ssam /* set up routing table entry */ 1866363Ssam if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) { 1877150Swnj rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr, RTF_HOST|RTF_UP); 1886363Ssam sc->sc_if.if_flags |= IFF_ROUTE; 1896363Ssam } 1905725Sroot } 1915725Sroot 1925725Sroot /* 1935725Sroot * Start output on interface. Get another datagram 1945725Sroot * to send from the interface queue and map it to 1955725Sroot * the interface before starting output. 1965725Sroot */ 1975725Sroot dmcstart(dev) 1985725Sroot dev_t dev; 1995725Sroot { 2005725Sroot int unit = minor(dev); 2015725Sroot struct uba_device *ui = dmcinfo[unit]; 2025725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 2035725Sroot int addr, len; 2045725Sroot struct mbuf *m; 2055725Sroot 2065725Sroot printd("dmcstart\n"); 2075725Sroot /* 2085725Sroot * Dequeue a request and map it to the UNIBUS. 2095725Sroot * If no more requests, just return. 2105725Sroot */ 2115725Sroot IF_DEQUEUE(&sc->sc_if.if_snd, m); 2125725Sroot if (m == 0) 2135725Sroot return; 2145725Sroot len = if_wubaput(&sc->sc_ifuba, m); 2155725Sroot 2165725Sroot /* 2175725Sroot * Have request mapped to UNIBUS for transmission. 2185725Sroot * Purge any stale data from this BDP and start the output. 2195725Sroot */ 2206587Ssam if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 2215853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 2225725Sroot addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 2235725Sroot printd(" len %d, addr 0x%x, ", len, addr); 2245725Sroot printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 2255725Sroot dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 2265725Sroot sc->sc_oactive = 1; 2275725Sroot } 2285725Sroot 2295725Sroot /* 2305725Sroot * Utility routine to load the DMC device registers. 2315725Sroot */ 2325725Sroot dmcload(sc, type, w0, w1) 2335725Sroot register struct dmc_softc *sc; 2345725Sroot int type, w0, w1; 2355725Sroot { 2365725Sroot register struct dmcdevice *addr; 2375725Sroot register int unit, sps, n; 2385725Sroot 2395725Sroot printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 2405725Sroot unit = sc - dmc_softc; 2415725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2425725Sroot sps = spl5(); 2435725Sroot if ((n = sc->sc_que.c_cc) == 0) 2445725Sroot addr->bsel0 = type | DMC_RQI; 2455725Sroot else 2466159Ssam (void) putc(type | DMC_RQI, &sc->sc_que); 2476159Ssam (void) putw(w0, &sc->sc_que); 2486159Ssam (void) putw(w1, &sc->sc_que); 2495725Sroot if (n == 0) 2505725Sroot dmcrint(unit); 2515725Sroot splx(sps); 2525725Sroot } 2535725Sroot 2545725Sroot /* 2555725Sroot * DMC interface receiver interrupt. 2565725Sroot * Ready to accept another command, 2575725Sroot * pull one off the command queue. 2585725Sroot */ 2595725Sroot dmcrint(unit) 2605725Sroot int unit; 2615725Sroot { 2625725Sroot register struct dmc_softc *sc; 2635725Sroot register struct dmcdevice *addr; 2645725Sroot register int n; 2655725Sroot 2665725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2675725Sroot sc = &dmc_softc[unit]; 2685725Sroot while (addr->bsel0&DMC_RDYI) { 2695725Sroot addr->sel4 = getw(&sc->sc_que); 2705725Sroot addr->sel6 = getw(&sc->sc_que); 2715725Sroot addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 2725725Sroot while (addr->bsel0&DMC_RDYI) 2735725Sroot ; 2745725Sroot if (sc->sc_que.c_cc == 0) 2755725Sroot return; 2765725Sroot addr->bsel0 = getc(&sc->sc_que); 2775725Sroot n = RDYSCAN; 2785725Sroot while (n-- && (addr->bsel0&DMC_RDYI) == 0) 2795725Sroot ; 2805725Sroot } 2815725Sroot if (sc->sc_que.c_cc) 2825725Sroot addr->bsel0 |= DMC_IEI; 2835725Sroot } 2845725Sroot 2855725Sroot /* 2865725Sroot * DMC interface transmitter interrupt. 2875725Sroot * A transfer has completed, check for errors. 2885725Sroot * If it was a read, notify appropriate protocol. 2895725Sroot * If it was a write, pull the next one off the queue. 2905725Sroot */ 2915725Sroot dmcxint(unit) 2925725Sroot int unit; 2935725Sroot { 2945725Sroot register struct dmc_softc *sc; 2955725Sroot struct uba_device *ui = dmcinfo[unit]; 2965725Sroot struct dmcdevice *addr; 2975725Sroot struct mbuf *m; 2985725Sroot register struct ifqueue *inq; 2995725Sroot int arg, cmd, len; 3005725Sroot 3015725Sroot addr = (struct dmcdevice *)ui->ui_addr; 3025725Sroot arg = addr->sel6; 3035725Sroot cmd = addr->bsel2&7; 3045725Sroot addr->bsel2 &= ~DMC_RDYO; 3055725Sroot sc = &dmc_softc[unit]; 3065725Sroot printd("dmcxint\n"); 3075725Sroot switch (cmd) { 3085725Sroot 3095725Sroot case DMC_OUR: 3105725Sroot /* 3115725Sroot * A read has completed. Purge input buffered 3125725Sroot * data path. Pass packet to type specific 3135725Sroot * higher-level input routine. 3145725Sroot */ 3155725Sroot sc->sc_if.if_ipackets++; 3166587Ssam if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 3175853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, 3185853Sroot sc->sc_ifuba.ifu_r.ifrw_bdp); 3195725Sroot len = arg & DMC_CCOUNT; 3205725Sroot printd(" read done, len %d\n", len); 3216334Ssam switch (ui->ui_flags & DMC_AF) { 3225725Sroot #ifdef INET 3236334Ssam case AF_INET: 3246260Swnj schednetisr(NETISR_IP); 3255725Sroot inq = &ipintrq; 3265725Sroot break; 3275725Sroot #endif 3285725Sroot 3295725Sroot default: 3306334Ssam printf("dmc%d: unknown address type %d\n", unit, 3316334Ssam ui->ui_flags & DMC_AF); 3325725Sroot goto setup; 3335725Sroot } 3345725Sroot m = if_rubaget(&sc->sc_ifuba, len, 0); 3355725Sroot if (m == 0) 3365725Sroot goto setup; 3376207Swnj if (IF_QFULL(inq)) { 3386207Swnj IF_DROP(inq); 3396207Swnj (void) m_freem(m); 3406207Swnj } else 3416207Swnj IF_ENQUEUE(inq, m); 3425725Sroot 3435725Sroot setup: 3445725Sroot arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 3455725Sroot dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 3465725Sroot return; 3475725Sroot 3485725Sroot case DMC_OUX: 3495725Sroot /* 3505725Sroot * A write has completed, start another 3515725Sroot * transfer if there is more data to send. 3525725Sroot */ 3535725Sroot if (sc->sc_oactive == 0) 3545725Sroot return; /* SHOULD IT BE A FATAL ERROR? */ 3555725Sroot printd(" write done\n"); 3565725Sroot sc->sc_if.if_opackets++; 3575725Sroot sc->sc_oactive = 0; 3585725Sroot if (sc->sc_ifuba.ifu_xtofree) { 3596207Swnj (void) m_freem(sc->sc_ifuba.ifu_xtofree); 3605725Sroot sc->sc_ifuba.ifu_xtofree = 0; 3615725Sroot } 3625725Sroot if (sc->sc_if.if_snd.ifq_head == 0) 3635725Sroot return; 3645725Sroot dmcstart(unit); 3655725Sroot return; 3665725Sroot 3675725Sroot case DMC_CNTLO: 3685725Sroot arg &= DMC_CNTMASK; 3695725Sroot if (arg&DMC_FATAL) { 3705725Sroot addr->bsel1 = DMC_MCLR; 3715725Sroot sc->sc_flag &= ~DMCRUN; 3725725Sroot /*** DO SOMETHING TO RESTART DEVICE ***/ 3735725Sroot printf("DMC FATAL ERROR 0%o\n", arg); 3745725Sroot } else { 3755725Sroot /* ACCUMULATE STATISTICS */ 3765725Sroot printf("DMC SOFT ERROR 0%o\n", arg); 3775725Sroot } 3785725Sroot return; 3795725Sroot 3805725Sroot default: 3815725Sroot printf("dmc%d: bad control %o\n", unit, cmd); 3825725Sroot } 3835725Sroot } 3845725Sroot 3855725Sroot /* 3865725Sroot * DMC output routine. 3875725Sroot * Just send the data, header was supplied by 3885725Sroot * upper level protocol routines. 3895725Sroot */ 3906334Ssam dmcoutput(ifp, m, dst) 3915725Sroot register struct ifnet *ifp; 3925725Sroot register struct mbuf *m; 3936334Ssam struct sockaddr *dst; 3945725Sroot { 3955725Sroot struct uba_device *ui = dmcinfo[ifp->if_unit]; 3965725Sroot int s; 3975725Sroot 3985725Sroot printd("dmcoutput\n"); 3996334Ssam if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 4006334Ssam printf("dmc%d: af%d not supported\n", ifp->if_unit, pf); 4016334Ssam m_freem(m); 4026502Ssam return (EAFNOSUPPORT); 4035725Sroot } 4045725Sroot s = splimp(); 4056207Swnj if (IF_QFULL(&ifp->if_snd)) { 4066207Swnj IF_DROP(&ifp->if_snd); 4076334Ssam m_freem(m); 4086207Swnj splx(s); 4096502Ssam return (ENOBUFS); 4106207Swnj } 4115725Sroot IF_ENQUEUE(&ifp->if_snd, m); 4125725Sroot if (dmc_softc[ifp->if_unit].sc_oactive == 0) 4135725Sroot dmcstart(ifp->if_unit); 4145725Sroot splx(s); 4156502Ssam return (0); 4165725Sroot } 417