1*6502Ssam /* if_dmc.c 4.10 82/04/10 */ 25725Sroot 35725Sroot #include "dmc.h" 45725Sroot #if NDMC > 0 55725Sroot #define printd if(dmcdebug)printf 65725Sroot int dmcdebug = 1; 75725Sroot /* 85725Sroot * DMC11 device driver, internet version 95725Sroot * 105725Sroot * TODO 115725Sroot * allow more than one outstanding read or write. 125725Sroot */ 135725Sroot 145725Sroot #include "../h/param.h" 155725Sroot #include "../h/systm.h" 165725Sroot #include "../h/mbuf.h" 175725Sroot #include "../h/pte.h" 185725Sroot #include "../h/buf.h" 195725Sroot #include "../h/tty.h" 205725Sroot #include "../h/protosw.h" 215725Sroot #include "../h/socket.h" 225725Sroot #include "../h/ubareg.h" 235725Sroot #include "../h/ubavar.h" 245725Sroot #include "../h/cpu.h" 255725Sroot #include "../h/mtpr.h" 265725Sroot #include "../h/vmmac.h" 275725Sroot #include "../net/in.h" 285725Sroot #include "../net/in_systm.h" 295725Sroot #include "../net/if.h" 305725Sroot #include "../net/if_uba.h" 315853Sroot #include "../net/if_dmc.h" 325725Sroot #include "../net/ip.h" 335725Sroot #include "../net/ip_var.h" 346363Ssam #include "../net/route.h" 35*6502Ssam #include <errno.h> 365725Sroot 375725Sroot /* 385725Sroot * Driver information for auto-configuration stuff. 395725Sroot */ 405725Sroot int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 415725Sroot struct uba_device *dmcinfo[NDMC]; 425725Sroot u_short dmcstd[] = { 0 }; 435725Sroot struct uba_driver dmcdriver = 445725Sroot { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 455725Sroot 466334Ssam #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 475725Sroot #define DMC_NET 0xff00 /* 8 bits of net number in ui_flags */ 485725Sroot 495725Sroot /* 505725Sroot * DMC software status per interface. 515725Sroot * 525725Sroot * Each interface is referenced by a network interface structure, 535725Sroot * sc_if, which the routing code uses to locate the interface. 545725Sroot * This structure contains the output queue for the interface, its address, ... 555725Sroot * We also have, for each interface, a UBA interface structure, which 565725Sroot * contains information about the UNIBUS resources held by the interface: 575725Sroot * map registers, buffered data paths, etc. Information is cached in this 585725Sroot * structure for use by the if_uba.c routines in running the interface 595725Sroot * efficiently. 605725Sroot */ 615725Sroot struct dmc_softc { 625725Sroot struct ifnet sc_if; /* network-visible interface */ 635725Sroot struct ifuba sc_ifuba; /* UNIBUS resources */ 645725Sroot short sc_flag; /* flags */ 655725Sroot short sc_oactive; /* output active */ 665725Sroot int sc_ubinfo; /* UBA mapping info for base table */ 675725Sroot struct clist sc_que; /* command queue */ 685725Sroot } dmc_softc[NDMC]; 695725Sroot 705725Sroot /* flags */ 715725Sroot #define DMCRUN 01 725725Sroot #define DMCBMAPPED 02 /* base table mapped */ 735725Sroot 745725Sroot struct dmc_base { 755725Sroot short d_base[128]; /* DMC base table */ 765725Sroot } dmc_base[NDMC]; 775725Sroot 785725Sroot #define loword(x) ((short *)&x)[0] 795725Sroot #define hiword(x) ((short *)&x)[1] 805725Sroot 815725Sroot dmcprobe(reg) 825725Sroot caddr_t reg; 835725Sroot { 845725Sroot register int br, cvec; 855725Sroot register struct dmcdevice *addr = (struct dmcdevice *)reg; 865725Sroot register int i; 875725Sroot 886363Ssam COUNT(DMCPROBE); 895725Sroot #ifdef lint 905725Sroot br = 0; cvec = br; br = cvec; 915725Sroot dmcrint(0); dmcxint(0); 925725Sroot #endif 935725Sroot addr->bsel1 = DMC_MCLR; 945725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 955725Sroot ; 965725Sroot if ((addr->bsel1 & DMC_RUN) == 0) 976334Ssam return (0); 985725Sroot addr->bsel1 &= ~DMC_MCLR; 995725Sroot addr->bsel0 = DMC_RQI|DMC_IEI; 1005725Sroot DELAY(100000); 1015725Sroot addr->bsel1 = DMC_MCLR; 1025725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 1035725Sroot ; 1046334Ssam return (1); 1055725Sroot } 1065725Sroot 1075725Sroot /* 1085725Sroot * Interface exists: make available by filling in network interface 1095725Sroot * record. System will initialize the interface when it is ready 1105725Sroot * to accept packets. 1115725Sroot */ 1125725Sroot dmcattach(ui) 1135725Sroot register struct uba_device *ui; 1145725Sroot { 1155725Sroot register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 1166334Ssam register struct sockaddr_in *sin; 1175725Sroot 1186363Ssam COUNT(DMCATTACH); 1195725Sroot sc->sc_if.if_unit = ui->ui_unit; 1205725Sroot sc->sc_if.if_name = "dmc"; 1215725Sroot sc->sc_if.if_mtu = DMCMTU; 1225725Sroot sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 1235725Sroot sc->sc_if.if_host[0] = 17; /* random number */ 1246334Ssam sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 1256334Ssam sin->sa_family = AF_INET; 1266334Ssam sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 1275725Sroot sc->sc_if.if_init = dmcinit; 1285725Sroot sc->sc_if.if_output = dmcoutput; 1295725Sroot sc->sc_if.if_ubareset = dmcreset; 1305853Sroot sc->sc_ifuba.ifuba_flags = UBA_NEEDBDP; 1315725Sroot if_attach(&sc->sc_if); 1325725Sroot } 1335725Sroot 1345725Sroot /* 1355725Sroot * Reset of interface after UNIBUS reset. 1365725Sroot * If interface is on specified UBA, reset it's state. 1375725Sroot */ 1385725Sroot dmcreset(unit, uban) 1395725Sroot int unit, uban; 1405725Sroot { 1415725Sroot register struct uba_device *ui; 1425725Sroot 1436363Ssam COUNT(DMCRESET); 1445725Sroot if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 1455725Sroot ui->ui_ubanum != uban) 1465725Sroot return; 1475725Sroot printf(" dmc%d", unit); 1485725Sroot dmcinit(unit); 1495725Sroot } 1505725Sroot 1515725Sroot /* 1525725Sroot * Initialization of interface; reinitialize UNIBUS usage. 1535725Sroot */ 1545725Sroot dmcinit(unit) 1555725Sroot int unit; 1565725Sroot { 1575725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 1585725Sroot register struct uba_device *ui = dmcinfo[unit]; 1595725Sroot register struct dmcdevice *addr; 1605725Sroot int base; 1615725Sroot 1626363Ssam COUNT(DMCINIT); 1635725Sroot printd("dmcinit\n"); 1645725Sroot if ((sc->sc_flag&DMCBMAPPED) == 0) { 1655725Sroot sc->sc_ubinfo = uballoc(ui->ui_ubanum, 1665725Sroot (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 1675725Sroot sc->sc_flag |= DMCBMAPPED; 1685725Sroot } 1695725Sroot if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 1705768Sroot (int)btoc(DMCMTU)) == 0) { 1715725Sroot printf("dmc%d: can't initialize\n", unit); 1726334Ssam sc->sc_if.if_flags &= ~IFF_UP; 1735725Sroot return; 1745725Sroot } 1755725Sroot addr = (struct dmcdevice *)ui->ui_addr; 1765725Sroot addr->bsel2 |= DMC_IEO; 1775725Sroot base = sc->sc_ubinfo & 0x3ffff; 1785725Sroot printd(" base 0x%x\n", base); 1795725Sroot dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 1805725Sroot dmcload(sc, DMC_CNTLI, 0, 0); 1815725Sroot base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 1825725Sroot dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 1835725Sroot printd(" first read queued, addr 0x%x\n", base); 1846334Ssam sc->sc_if.if_flags |= IFF_UP; 1856363Ssam /* set up routing table entry */ 1866363Ssam if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) { 1876363Ssam rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr, 1886377Ssam RTF_DIRECT|RTF_HOST|RTF_UP); 1896363Ssam sc->sc_if.if_flags |= IFF_ROUTE; 1906363Ssam } 1915725Sroot } 1925725Sroot 1935725Sroot /* 1945725Sroot * Start output on interface. Get another datagram 1955725Sroot * to send from the interface queue and map it to 1965725Sroot * the interface before starting output. 1975725Sroot */ 1985725Sroot dmcstart(dev) 1995725Sroot dev_t dev; 2005725Sroot { 2015725Sroot int unit = minor(dev); 2025725Sroot struct uba_device *ui = dmcinfo[unit]; 2035725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 2045725Sroot int addr, len; 2055725Sroot struct mbuf *m; 2065725Sroot 2076363Ssam COUNT(DMCSTART); 2085725Sroot printd("dmcstart\n"); 2095725Sroot /* 2105725Sroot * Dequeue a request and map it to the UNIBUS. 2115725Sroot * If no more requests, just return. 2125725Sroot */ 2135725Sroot IF_DEQUEUE(&sc->sc_if.if_snd, m); 2145725Sroot if (m == 0) 2155725Sroot return; 2165725Sroot len = if_wubaput(&sc->sc_ifuba, m); 2175725Sroot 2185725Sroot /* 2195725Sroot * Have request mapped to UNIBUS for transmission. 2205725Sroot * Purge any stale data from this BDP and start the output. 2215725Sroot */ 2225853Sroot if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP) 2235853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 2245725Sroot addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 2255725Sroot printd(" len %d, addr 0x%x, ", len, addr); 2265725Sroot printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 2275725Sroot dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 2285725Sroot sc->sc_oactive = 1; 2295725Sroot } 2305725Sroot 2315725Sroot /* 2325725Sroot * Utility routine to load the DMC device registers. 2335725Sroot */ 2345725Sroot dmcload(sc, type, w0, w1) 2355725Sroot register struct dmc_softc *sc; 2365725Sroot int type, w0, w1; 2375725Sroot { 2385725Sroot register struct dmcdevice *addr; 2395725Sroot register int unit, sps, n; 2405725Sroot 2416363Ssam COUNT(DMCLOAD); 2425725Sroot printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 2435725Sroot unit = sc - dmc_softc; 2445725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2455725Sroot sps = spl5(); 2465725Sroot if ((n = sc->sc_que.c_cc) == 0) 2475725Sroot addr->bsel0 = type | DMC_RQI; 2485725Sroot else 2496159Ssam (void) putc(type | DMC_RQI, &sc->sc_que); 2506159Ssam (void) putw(w0, &sc->sc_que); 2516159Ssam (void) putw(w1, &sc->sc_que); 2525725Sroot if (n == 0) 2535725Sroot dmcrint(unit); 2545725Sroot splx(sps); 2555725Sroot } 2565725Sroot 2575725Sroot /* 2585725Sroot * DMC interface receiver interrupt. 2595725Sroot * Ready to accept another command, 2605725Sroot * pull one off the command queue. 2615725Sroot */ 2625725Sroot dmcrint(unit) 2635725Sroot int unit; 2645725Sroot { 2655725Sroot register struct dmc_softc *sc; 2665725Sroot register struct dmcdevice *addr; 2675725Sroot register int n; 2685725Sroot int w0, w1; /* DEBUG */ 2695725Sroot 2706363Ssam COUNT(DMCRINT); 2715725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2725725Sroot sc = &dmc_softc[unit]; 2735725Sroot while (addr->bsel0&DMC_RDYI) { 2745725Sroot w0 = getw(&sc->sc_que); /* DEBUG */ 2755725Sroot addr->sel4 = w0; /* DEBUG */ 2765725Sroot w1 = getw(&sc->sc_que); /* DEBUG */ 2775725Sroot addr->sel6 = w1; /* DEBUG */ 2785725Sroot /* DEBUG 2795725Sroot addr->sel4 = getw(&sc->sc_que); 2805725Sroot addr->sel6 = getw(&sc->sc_que); 2815725Sroot DEBUG */ 2825725Sroot addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 2835725Sroot printd(" w0 0x%x, w1 0x%x\n", w0, w1); 2845725Sroot while (addr->bsel0&DMC_RDYI) 2855725Sroot ; 2865725Sroot if (sc->sc_que.c_cc == 0) 2875725Sroot return; 2885725Sroot addr->bsel0 = getc(&sc->sc_que); 2895725Sroot n = RDYSCAN; 2905725Sroot while (n-- && (addr->bsel0&DMC_RDYI) == 0) 2915725Sroot ; 2925725Sroot } 2935725Sroot if (sc->sc_que.c_cc) 2945725Sroot addr->bsel0 |= DMC_IEI; 2955725Sroot } 2965725Sroot 2975725Sroot /* 2985725Sroot * DMC interface transmitter interrupt. 2995725Sroot * A transfer has completed, check for errors. 3005725Sroot * If it was a read, notify appropriate protocol. 3015725Sroot * If it was a write, pull the next one off the queue. 3025725Sroot */ 3035725Sroot dmcxint(unit) 3045725Sroot int unit; 3055725Sroot { 3065725Sroot register struct dmc_softc *sc; 3075725Sroot struct uba_device *ui = dmcinfo[unit]; 3085725Sroot struct dmcdevice *addr; 3095725Sroot struct mbuf *m; 3105725Sroot register struct ifqueue *inq; 3115725Sroot int arg, cmd, len; 3125725Sroot 3136363Ssam COUNT(DMCXINT); 3145725Sroot addr = (struct dmcdevice *)ui->ui_addr; 3155725Sroot arg = addr->sel6; 3165725Sroot cmd = addr->bsel2&7; 3175725Sroot addr->bsel2 &= ~DMC_RDYO; 3185725Sroot sc = &dmc_softc[unit]; 3195725Sroot printd("dmcxint\n"); 3205725Sroot switch (cmd) { 3215725Sroot 3225725Sroot case DMC_OUR: 3235725Sroot /* 3245725Sroot * A read has completed. Purge input buffered 3255725Sroot * data path. Pass packet to type specific 3265725Sroot * higher-level input routine. 3275725Sroot */ 3285725Sroot sc->sc_if.if_ipackets++; 3295853Sroot if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP) 3305853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, 3315853Sroot sc->sc_ifuba.ifu_r.ifrw_bdp); 3325725Sroot len = arg & DMC_CCOUNT; 3335725Sroot printd(" read done, len %d\n", len); 3346334Ssam switch (ui->ui_flags & DMC_AF) { 3355725Sroot #ifdef INET 3366334Ssam case AF_INET: 3376260Swnj schednetisr(NETISR_IP); 3385725Sroot inq = &ipintrq; 3395725Sroot break; 3405725Sroot #endif 3415725Sroot 3425725Sroot default: 3436334Ssam printf("dmc%d: unknown address type %d\n", unit, 3446334Ssam ui->ui_flags & DMC_AF); 3455725Sroot goto setup; 3465725Sroot } 3475725Sroot m = if_rubaget(&sc->sc_ifuba, len, 0); 3485725Sroot if (m == 0) 3495725Sroot goto setup; 3506207Swnj if (IF_QFULL(inq)) { 3516207Swnj IF_DROP(inq); 3526207Swnj (void) m_freem(m); 3536207Swnj } else 3546207Swnj IF_ENQUEUE(inq, m); 3555725Sroot 3565725Sroot setup: 3575725Sroot arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 3585725Sroot dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 3595725Sroot return; 3605725Sroot 3615725Sroot case DMC_OUX: 3625725Sroot /* 3635725Sroot * A write has completed, start another 3645725Sroot * transfer if there is more data to send. 3655725Sroot */ 3665725Sroot if (sc->sc_oactive == 0) 3675725Sroot return; /* SHOULD IT BE A FATAL ERROR? */ 3685725Sroot printd(" write done\n"); 3695725Sroot sc->sc_if.if_opackets++; 3705725Sroot sc->sc_oactive = 0; 3715725Sroot if (sc->sc_ifuba.ifu_xtofree) { 3726207Swnj (void) m_freem(sc->sc_ifuba.ifu_xtofree); 3735725Sroot sc->sc_ifuba.ifu_xtofree = 0; 3745725Sroot } 3755725Sroot if (sc->sc_if.if_snd.ifq_head == 0) 3765725Sroot return; 3775725Sroot dmcstart(unit); 3785725Sroot return; 3795725Sroot 3805725Sroot case DMC_CNTLO: 3815725Sroot arg &= DMC_CNTMASK; 3825725Sroot if (arg&DMC_FATAL) { 3835725Sroot addr->bsel1 = DMC_MCLR; 3845725Sroot sc->sc_flag &= ~DMCRUN; 3855725Sroot /*** DO SOMETHING TO RESTART DEVICE ***/ 3865725Sroot printf("DMC FATAL ERROR 0%o\n", arg); 3875725Sroot } else { 3885725Sroot /* ACCUMULATE STATISTICS */ 3895725Sroot printf("DMC SOFT ERROR 0%o\n", arg); 3905725Sroot } 3915725Sroot return; 3925725Sroot 3935725Sroot default: 3945725Sroot printf("dmc%d: bad control %o\n", unit, cmd); 3955725Sroot } 3965725Sroot } 3975725Sroot 3985725Sroot /* 3995725Sroot * DMC output routine. 4005725Sroot * Just send the data, header was supplied by 4015725Sroot * upper level protocol routines. 4025725Sroot */ 4036334Ssam dmcoutput(ifp, m, dst) 4045725Sroot register struct ifnet *ifp; 4055725Sroot register struct mbuf *m; 4066334Ssam struct sockaddr *dst; 4075725Sroot { 4085725Sroot struct uba_device *ui = dmcinfo[ifp->if_unit]; 4095725Sroot int s; 4105725Sroot 4116363Ssam COUNT(DMCOUTPUT); 4125725Sroot printd("dmcoutput\n"); 4136334Ssam if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 4146334Ssam printf("dmc%d: af%d not supported\n", ifp->if_unit, pf); 4156334Ssam m_freem(m); 416*6502Ssam return (EAFNOSUPPORT); 4175725Sroot } 4185725Sroot s = splimp(); 4196207Swnj if (IF_QFULL(&ifp->if_snd)) { 4206207Swnj IF_DROP(&ifp->if_snd); 4216334Ssam m_freem(m); 4226207Swnj splx(s); 423*6502Ssam return (ENOBUFS); 4246207Swnj } 4255725Sroot IF_ENQUEUE(&ifp->if_snd, m); 4265725Sroot if (dmc_softc[ifp->if_unit].sc_oactive == 0) 4275725Sroot dmcstart(ifp->if_unit); 4285725Sroot splx(s); 429*6502Ssam return (0); 4305725Sroot } 431