1*6377Ssam /* if_dmc.c 4.9 82/03/30 */ 25725Sroot 35725Sroot #include "dmc.h" 45725Sroot #if NDMC > 0 55725Sroot #define printd if(dmcdebug)printf 65725Sroot int dmcdebug = 1; 75725Sroot /* 85725Sroot * DMC11 device driver, internet version 95725Sroot * 105725Sroot * TODO 115725Sroot * allow more than one outstanding read or write. 125725Sroot */ 135725Sroot 145725Sroot #include "../h/param.h" 155725Sroot #include "../h/systm.h" 165725Sroot #include "../h/mbuf.h" 175725Sroot #include "../h/pte.h" 185725Sroot #include "../h/buf.h" 195725Sroot #include "../h/tty.h" 205725Sroot #include "../h/protosw.h" 215725Sroot #include "../h/socket.h" 225725Sroot #include "../h/ubareg.h" 235725Sroot #include "../h/ubavar.h" 245725Sroot #include "../h/cpu.h" 255725Sroot #include "../h/mtpr.h" 265725Sroot #include "../h/vmmac.h" 275725Sroot #include "../net/in.h" 285725Sroot #include "../net/in_systm.h" 295725Sroot #include "../net/if.h" 305725Sroot #include "../net/if_uba.h" 315853Sroot #include "../net/if_dmc.h" 325725Sroot #include "../net/ip.h" 335725Sroot #include "../net/ip_var.h" 346363Ssam #include "../net/route.h" 355725Sroot 365725Sroot /* 375725Sroot * Driver information for auto-configuration stuff. 385725Sroot */ 395725Sroot int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 405725Sroot struct uba_device *dmcinfo[NDMC]; 415725Sroot u_short dmcstd[] = { 0 }; 425725Sroot struct uba_driver dmcdriver = 435725Sroot { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 445725Sroot 456334Ssam #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 465725Sroot #define DMC_NET 0xff00 /* 8 bits of net number in ui_flags */ 475725Sroot 485725Sroot /* 495725Sroot * DMC software status per interface. 505725Sroot * 515725Sroot * Each interface is referenced by a network interface structure, 525725Sroot * sc_if, which the routing code uses to locate the interface. 535725Sroot * This structure contains the output queue for the interface, its address, ... 545725Sroot * We also have, for each interface, a UBA interface structure, which 555725Sroot * contains information about the UNIBUS resources held by the interface: 565725Sroot * map registers, buffered data paths, etc. Information is cached in this 575725Sroot * structure for use by the if_uba.c routines in running the interface 585725Sroot * efficiently. 595725Sroot */ 605725Sroot struct dmc_softc { 615725Sroot struct ifnet sc_if; /* network-visible interface */ 625725Sroot struct ifuba sc_ifuba; /* UNIBUS resources */ 635725Sroot short sc_flag; /* flags */ 645725Sroot short sc_oactive; /* output active */ 655725Sroot int sc_ubinfo; /* UBA mapping info for base table */ 665725Sroot struct clist sc_que; /* command queue */ 675725Sroot } dmc_softc[NDMC]; 685725Sroot 695725Sroot /* flags */ 705725Sroot #define DMCRUN 01 715725Sroot #define DMCBMAPPED 02 /* base table mapped */ 725725Sroot 735725Sroot struct dmc_base { 745725Sroot short d_base[128]; /* DMC base table */ 755725Sroot } dmc_base[NDMC]; 765725Sroot 775725Sroot #define loword(x) ((short *)&x)[0] 785725Sroot #define hiword(x) ((short *)&x)[1] 795725Sroot 805725Sroot dmcprobe(reg) 815725Sroot caddr_t reg; 825725Sroot { 835725Sroot register int br, cvec; 845725Sroot register struct dmcdevice *addr = (struct dmcdevice *)reg; 855725Sroot register int i; 865725Sroot 876363Ssam COUNT(DMCPROBE); 885725Sroot #ifdef lint 895725Sroot br = 0; cvec = br; br = cvec; 905725Sroot dmcrint(0); dmcxint(0); 915725Sroot #endif 925725Sroot addr->bsel1 = DMC_MCLR; 935725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 945725Sroot ; 955725Sroot if ((addr->bsel1 & DMC_RUN) == 0) 966334Ssam return (0); 975725Sroot addr->bsel1 &= ~DMC_MCLR; 985725Sroot addr->bsel0 = DMC_RQI|DMC_IEI; 995725Sroot DELAY(100000); 1005725Sroot addr->bsel1 = DMC_MCLR; 1015725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 1025725Sroot ; 1036334Ssam return (1); 1045725Sroot } 1055725Sroot 1065725Sroot /* 1075725Sroot * Interface exists: make available by filling in network interface 1085725Sroot * record. System will initialize the interface when it is ready 1095725Sroot * to accept packets. 1105725Sroot */ 1115725Sroot dmcattach(ui) 1125725Sroot register struct uba_device *ui; 1135725Sroot { 1145725Sroot register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 1156334Ssam register struct sockaddr_in *sin; 1165725Sroot 1176363Ssam COUNT(DMCATTACH); 1185725Sroot sc->sc_if.if_unit = ui->ui_unit; 1195725Sroot sc->sc_if.if_name = "dmc"; 1205725Sroot sc->sc_if.if_mtu = DMCMTU; 1215725Sroot sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 1225725Sroot sc->sc_if.if_host[0] = 17; /* random number */ 1236334Ssam sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 1246334Ssam sin->sa_family = AF_INET; 1256334Ssam sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 1265725Sroot sc->sc_if.if_init = dmcinit; 1275725Sroot sc->sc_if.if_output = dmcoutput; 1285725Sroot sc->sc_if.if_ubareset = dmcreset; 1295853Sroot sc->sc_ifuba.ifuba_flags = UBA_NEEDBDP; 1305725Sroot if_attach(&sc->sc_if); 1315725Sroot } 1325725Sroot 1335725Sroot /* 1345725Sroot * Reset of interface after UNIBUS reset. 1355725Sroot * If interface is on specified UBA, reset it's state. 1365725Sroot */ 1375725Sroot dmcreset(unit, uban) 1385725Sroot int unit, uban; 1395725Sroot { 1405725Sroot register struct uba_device *ui; 1415725Sroot 1426363Ssam COUNT(DMCRESET); 1435725Sroot if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 1445725Sroot ui->ui_ubanum != uban) 1455725Sroot return; 1465725Sroot printf(" dmc%d", unit); 1475725Sroot dmcinit(unit); 1485725Sroot } 1495725Sroot 1505725Sroot /* 1515725Sroot * Initialization of interface; reinitialize UNIBUS usage. 1525725Sroot */ 1535725Sroot dmcinit(unit) 1545725Sroot int unit; 1555725Sroot { 1565725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 1575725Sroot register struct uba_device *ui = dmcinfo[unit]; 1585725Sroot register struct dmcdevice *addr; 1595725Sroot int base; 1605725Sroot 1616363Ssam COUNT(DMCINIT); 1625725Sroot printd("dmcinit\n"); 1635725Sroot if ((sc->sc_flag&DMCBMAPPED) == 0) { 1645725Sroot sc->sc_ubinfo = uballoc(ui->ui_ubanum, 1655725Sroot (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 1665725Sroot sc->sc_flag |= DMCBMAPPED; 1675725Sroot } 1685725Sroot if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 1695768Sroot (int)btoc(DMCMTU)) == 0) { 1705725Sroot printf("dmc%d: can't initialize\n", unit); 1716334Ssam sc->sc_if.if_flags &= ~IFF_UP; 1725725Sroot return; 1735725Sroot } 1745725Sroot addr = (struct dmcdevice *)ui->ui_addr; 1755725Sroot addr->bsel2 |= DMC_IEO; 1765725Sroot base = sc->sc_ubinfo & 0x3ffff; 1775725Sroot printd(" base 0x%x\n", base); 1785725Sroot dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 1795725Sroot dmcload(sc, DMC_CNTLI, 0, 0); 1805725Sroot base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 1815725Sroot dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 1825725Sroot printd(" first read queued, addr 0x%x\n", base); 1836334Ssam sc->sc_if.if_flags |= IFF_UP; 1846363Ssam /* set up routing table entry */ 1856363Ssam if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) { 1866363Ssam rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr, 187*6377Ssam RTF_DIRECT|RTF_HOST|RTF_UP); 1886363Ssam sc->sc_if.if_flags |= IFF_ROUTE; 1896363Ssam } 1905725Sroot } 1915725Sroot 1925725Sroot /* 1935725Sroot * Start output on interface. Get another datagram 1945725Sroot * to send from the interface queue and map it to 1955725Sroot * the interface before starting output. 1965725Sroot */ 1975725Sroot dmcstart(dev) 1985725Sroot dev_t dev; 1995725Sroot { 2005725Sroot int unit = minor(dev); 2015725Sroot struct uba_device *ui = dmcinfo[unit]; 2025725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 2035725Sroot int addr, len; 2045725Sroot struct mbuf *m; 2055725Sroot 2066363Ssam COUNT(DMCSTART); 2075725Sroot printd("dmcstart\n"); 2085725Sroot /* 2095725Sroot * Dequeue a request and map it to the UNIBUS. 2105725Sroot * If no more requests, just return. 2115725Sroot */ 2125725Sroot IF_DEQUEUE(&sc->sc_if.if_snd, m); 2135725Sroot if (m == 0) 2145725Sroot return; 2155725Sroot len = if_wubaput(&sc->sc_ifuba, m); 2165725Sroot 2175725Sroot /* 2185725Sroot * Have request mapped to UNIBUS for transmission. 2195725Sroot * Purge any stale data from this BDP and start the output. 2205725Sroot */ 2215853Sroot if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP) 2225853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 2235725Sroot addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 2245725Sroot printd(" len %d, addr 0x%x, ", len, addr); 2255725Sroot printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 2265725Sroot dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 2275725Sroot sc->sc_oactive = 1; 2285725Sroot } 2295725Sroot 2305725Sroot /* 2315725Sroot * Utility routine to load the DMC device registers. 2325725Sroot */ 2335725Sroot dmcload(sc, type, w0, w1) 2345725Sroot register struct dmc_softc *sc; 2355725Sroot int type, w0, w1; 2365725Sroot { 2375725Sroot register struct dmcdevice *addr; 2385725Sroot register int unit, sps, n; 2395725Sroot 2406363Ssam COUNT(DMCLOAD); 2415725Sroot printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 2425725Sroot unit = sc - dmc_softc; 2435725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2445725Sroot sps = spl5(); 2455725Sroot if ((n = sc->sc_que.c_cc) == 0) 2465725Sroot addr->bsel0 = type | DMC_RQI; 2475725Sroot else 2486159Ssam (void) putc(type | DMC_RQI, &sc->sc_que); 2496159Ssam (void) putw(w0, &sc->sc_que); 2506159Ssam (void) putw(w1, &sc->sc_que); 2515725Sroot if (n == 0) 2525725Sroot dmcrint(unit); 2535725Sroot splx(sps); 2545725Sroot } 2555725Sroot 2565725Sroot /* 2575725Sroot * DMC interface receiver interrupt. 2585725Sroot * Ready to accept another command, 2595725Sroot * pull one off the command queue. 2605725Sroot */ 2615725Sroot dmcrint(unit) 2625725Sroot int unit; 2635725Sroot { 2645725Sroot register struct dmc_softc *sc; 2655725Sroot register struct dmcdevice *addr; 2665725Sroot register int n; 2675725Sroot int w0, w1; /* DEBUG */ 2685725Sroot 2696363Ssam COUNT(DMCRINT); 2705725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2715725Sroot sc = &dmc_softc[unit]; 2725725Sroot while (addr->bsel0&DMC_RDYI) { 2735725Sroot w0 = getw(&sc->sc_que); /* DEBUG */ 2745725Sroot addr->sel4 = w0; /* DEBUG */ 2755725Sroot w1 = getw(&sc->sc_que); /* DEBUG */ 2765725Sroot addr->sel6 = w1; /* DEBUG */ 2775725Sroot /* DEBUG 2785725Sroot addr->sel4 = getw(&sc->sc_que); 2795725Sroot addr->sel6 = getw(&sc->sc_que); 2805725Sroot DEBUG */ 2815725Sroot addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 2825725Sroot printd(" w0 0x%x, w1 0x%x\n", w0, w1); 2835725Sroot while (addr->bsel0&DMC_RDYI) 2845725Sroot ; 2855725Sroot if (sc->sc_que.c_cc == 0) 2865725Sroot return; 2875725Sroot addr->bsel0 = getc(&sc->sc_que); 2885725Sroot n = RDYSCAN; 2895725Sroot while (n-- && (addr->bsel0&DMC_RDYI) == 0) 2905725Sroot ; 2915725Sroot } 2925725Sroot if (sc->sc_que.c_cc) 2935725Sroot addr->bsel0 |= DMC_IEI; 2945725Sroot } 2955725Sroot 2965725Sroot /* 2975725Sroot * DMC interface transmitter interrupt. 2985725Sroot * A transfer has completed, check for errors. 2995725Sroot * If it was a read, notify appropriate protocol. 3005725Sroot * If it was a write, pull the next one off the queue. 3015725Sroot */ 3025725Sroot dmcxint(unit) 3035725Sroot int unit; 3045725Sroot { 3055725Sroot register struct dmc_softc *sc; 3065725Sroot struct uba_device *ui = dmcinfo[unit]; 3075725Sroot struct dmcdevice *addr; 3085725Sroot struct mbuf *m; 3095725Sroot register struct ifqueue *inq; 3105725Sroot int arg, cmd, len; 3115725Sroot 3126363Ssam COUNT(DMCXINT); 3135725Sroot addr = (struct dmcdevice *)ui->ui_addr; 3145725Sroot arg = addr->sel6; 3155725Sroot cmd = addr->bsel2&7; 3165725Sroot addr->bsel2 &= ~DMC_RDYO; 3175725Sroot sc = &dmc_softc[unit]; 3185725Sroot printd("dmcxint\n"); 3195725Sroot switch (cmd) { 3205725Sroot 3215725Sroot case DMC_OUR: 3225725Sroot /* 3235725Sroot * A read has completed. Purge input buffered 3245725Sroot * data path. Pass packet to type specific 3255725Sroot * higher-level input routine. 3265725Sroot */ 3275725Sroot sc->sc_if.if_ipackets++; 3285853Sroot if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP) 3295853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, 3305853Sroot sc->sc_ifuba.ifu_r.ifrw_bdp); 3315725Sroot len = arg & DMC_CCOUNT; 3325725Sroot printd(" read done, len %d\n", len); 3336334Ssam switch (ui->ui_flags & DMC_AF) { 3345725Sroot #ifdef INET 3356334Ssam case AF_INET: 3366260Swnj schednetisr(NETISR_IP); 3375725Sroot inq = &ipintrq; 3385725Sroot break; 3395725Sroot #endif 3405725Sroot 3415725Sroot default: 3426334Ssam printf("dmc%d: unknown address type %d\n", unit, 3436334Ssam ui->ui_flags & DMC_AF); 3445725Sroot goto setup; 3455725Sroot } 3465725Sroot m = if_rubaget(&sc->sc_ifuba, len, 0); 3475725Sroot if (m == 0) 3485725Sroot goto setup; 3496207Swnj if (IF_QFULL(inq)) { 3506207Swnj IF_DROP(inq); 3516207Swnj (void) m_freem(m); 3526207Swnj } else 3536207Swnj IF_ENQUEUE(inq, m); 3545725Sroot 3555725Sroot setup: 3565725Sroot arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 3575725Sroot dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 3585725Sroot return; 3595725Sroot 3605725Sroot case DMC_OUX: 3615725Sroot /* 3625725Sroot * A write has completed, start another 3635725Sroot * transfer if there is more data to send. 3645725Sroot */ 3655725Sroot if (sc->sc_oactive == 0) 3665725Sroot return; /* SHOULD IT BE A FATAL ERROR? */ 3675725Sroot printd(" write done\n"); 3685725Sroot sc->sc_if.if_opackets++; 3695725Sroot sc->sc_oactive = 0; 3705725Sroot if (sc->sc_ifuba.ifu_xtofree) { 3716207Swnj (void) m_freem(sc->sc_ifuba.ifu_xtofree); 3725725Sroot sc->sc_ifuba.ifu_xtofree = 0; 3735725Sroot } 3745725Sroot if (sc->sc_if.if_snd.ifq_head == 0) 3755725Sroot return; 3765725Sroot dmcstart(unit); 3775725Sroot return; 3785725Sroot 3795725Sroot case DMC_CNTLO: 3805725Sroot arg &= DMC_CNTMASK; 3815725Sroot if (arg&DMC_FATAL) { 3825725Sroot addr->bsel1 = DMC_MCLR; 3835725Sroot sc->sc_flag &= ~DMCRUN; 3845725Sroot /*** DO SOMETHING TO RESTART DEVICE ***/ 3855725Sroot printf("DMC FATAL ERROR 0%o\n", arg); 3865725Sroot } else { 3875725Sroot /* ACCUMULATE STATISTICS */ 3885725Sroot printf("DMC SOFT ERROR 0%o\n", arg); 3895725Sroot } 3905725Sroot return; 3915725Sroot 3925725Sroot default: 3935725Sroot printf("dmc%d: bad control %o\n", unit, cmd); 3945725Sroot } 3955725Sroot } 3965725Sroot 3975725Sroot /* 3985725Sroot * DMC output routine. 3995725Sroot * Just send the data, header was supplied by 4005725Sroot * upper level protocol routines. 4015725Sroot */ 4026334Ssam dmcoutput(ifp, m, dst) 4035725Sroot register struct ifnet *ifp; 4045725Sroot register struct mbuf *m; 4056334Ssam struct sockaddr *dst; 4065725Sroot { 4075725Sroot struct uba_device *ui = dmcinfo[ifp->if_unit]; 4085725Sroot int s; 4095725Sroot 4106363Ssam COUNT(DMCOUTPUT); 4115725Sroot printd("dmcoutput\n"); 4126334Ssam if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 4136334Ssam printf("dmc%d: af%d not supported\n", ifp->if_unit, pf); 4146334Ssam m_freem(m); 4155725Sroot return (0); 4165725Sroot } 4175725Sroot s = splimp(); 4186207Swnj if (IF_QFULL(&ifp->if_snd)) { 4196207Swnj IF_DROP(&ifp->if_snd); 4206334Ssam m_freem(m); 4216207Swnj splx(s); 4226207Swnj return (0); 4236207Swnj } 4245725Sroot IF_ENQUEUE(&ifp->if_snd, m); 4255725Sroot if (dmc_softc[ifp->if_unit].sc_oactive == 0) 4265725Sroot dmcstart(ifp->if_unit); 4275725Sroot splx(s); 4285725Sroot return (1); 4295725Sroot } 430