1*6334Ssam /* if_dmc.c 4.7 82/03/28 */ 25725Sroot 35725Sroot #include "dmc.h" 45725Sroot #if NDMC > 0 55725Sroot #define printd if(dmcdebug)printf 65725Sroot int dmcdebug = 1; 75725Sroot /* 85725Sroot * DMC11 device driver, internet version 95725Sroot * 105725Sroot * TODO 115725Sroot * allow more than one outstanding read or write. 125725Sroot */ 135725Sroot 145725Sroot #include "../h/param.h" 155725Sroot #include "../h/systm.h" 165725Sroot #include "../h/mbuf.h" 175725Sroot #include "../h/pte.h" 185725Sroot #include "../h/buf.h" 195725Sroot #include "../h/tty.h" 205725Sroot #include "../h/protosw.h" 215725Sroot #include "../h/socket.h" 225725Sroot #include "../h/ubareg.h" 235725Sroot #include "../h/ubavar.h" 245725Sroot #include "../h/cpu.h" 255725Sroot #include "../h/mtpr.h" 265725Sroot #include "../h/vmmac.h" 275725Sroot #include "../net/in.h" 285725Sroot #include "../net/in_systm.h" 295725Sroot #include "../net/if.h" 305725Sroot #include "../net/if_uba.h" 315853Sroot #include "../net/if_dmc.h" 325725Sroot #include "../net/ip.h" 335725Sroot #include "../net/ip_var.h" 345725Sroot 355725Sroot /* 365725Sroot * Driver information for auto-configuration stuff. 375725Sroot */ 385725Sroot int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 395725Sroot struct uba_device *dmcinfo[NDMC]; 405725Sroot u_short dmcstd[] = { 0 }; 415725Sroot struct uba_driver dmcdriver = 425725Sroot { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 435725Sroot 44*6334Ssam #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 455725Sroot #define DMC_NET 0xff00 /* 8 bits of net number in ui_flags */ 465725Sroot 475725Sroot /* 485725Sroot * DMC software status per interface. 495725Sroot * 505725Sroot * Each interface is referenced by a network interface structure, 515725Sroot * sc_if, which the routing code uses to locate the interface. 525725Sroot * This structure contains the output queue for the interface, its address, ... 535725Sroot * We also have, for each interface, a UBA interface structure, which 545725Sroot * contains information about the UNIBUS resources held by the interface: 555725Sroot * map registers, buffered data paths, etc. Information is cached in this 565725Sroot * structure for use by the if_uba.c routines in running the interface 575725Sroot * efficiently. 585725Sroot */ 595725Sroot struct dmc_softc { 605725Sroot struct ifnet sc_if; /* network-visible interface */ 615725Sroot struct ifuba sc_ifuba; /* UNIBUS resources */ 625725Sroot short sc_flag; /* flags */ 635725Sroot short sc_oactive; /* output active */ 645725Sroot int sc_ubinfo; /* UBA mapping info for base table */ 655725Sroot struct clist sc_que; /* command queue */ 665725Sroot } dmc_softc[NDMC]; 675725Sroot 685725Sroot /* flags */ 695725Sroot #define DMCRUN 01 705725Sroot #define DMCBMAPPED 02 /* base table mapped */ 715725Sroot 725725Sroot struct dmc_base { 735725Sroot short d_base[128]; /* DMC base table */ 745725Sroot } dmc_base[NDMC]; 755725Sroot 765725Sroot #define loword(x) ((short *)&x)[0] 775725Sroot #define hiword(x) ((short *)&x)[1] 785725Sroot 795725Sroot dmcprobe(reg) 805725Sroot caddr_t reg; 815725Sroot { 825725Sroot register int br, cvec; 835725Sroot register struct dmcdevice *addr = (struct dmcdevice *)reg; 845725Sroot register int i; 855725Sroot 865725Sroot #ifdef lint 875725Sroot br = 0; cvec = br; br = cvec; 885725Sroot dmcrint(0); dmcxint(0); 895725Sroot #endif 905725Sroot addr->bsel1 = DMC_MCLR; 915725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 925725Sroot ; 935725Sroot if ((addr->bsel1 & DMC_RUN) == 0) 94*6334Ssam return (0); 955725Sroot addr->bsel1 &= ~DMC_MCLR; 965725Sroot addr->bsel0 = DMC_RQI|DMC_IEI; 975725Sroot DELAY(100000); 985725Sroot addr->bsel1 = DMC_MCLR; 995725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 1005725Sroot ; 101*6334Ssam return (1); 1025725Sroot } 1035725Sroot 1045725Sroot /* 1055725Sroot * Interface exists: make available by filling in network interface 1065725Sroot * record. System will initialize the interface when it is ready 1075725Sroot * to accept packets. 1085725Sroot */ 1095725Sroot dmcattach(ui) 1105725Sroot register struct uba_device *ui; 1115725Sroot { 1125725Sroot register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 113*6334Ssam register struct sockaddr_in *sin; 1145725Sroot 1155725Sroot sc->sc_if.if_unit = ui->ui_unit; 1165725Sroot sc->sc_if.if_name = "dmc"; 1175725Sroot sc->sc_if.if_mtu = DMCMTU; 1185725Sroot sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 1195725Sroot sc->sc_if.if_host[0] = 17; /* random number */ 120*6334Ssam sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 121*6334Ssam sin->sa_family = AF_INET; 122*6334Ssam sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 1235725Sroot sc->sc_if.if_init = dmcinit; 1245725Sroot sc->sc_if.if_output = dmcoutput; 1255725Sroot sc->sc_if.if_ubareset = dmcreset; 1265853Sroot sc->sc_ifuba.ifuba_flags = UBA_NEEDBDP; 1275725Sroot if_attach(&sc->sc_if); 1285725Sroot } 1295725Sroot 1305725Sroot /* 1315725Sroot * Reset of interface after UNIBUS reset. 1325725Sroot * If interface is on specified UBA, reset it's state. 1335725Sroot */ 1345725Sroot dmcreset(unit, uban) 1355725Sroot int unit, uban; 1365725Sroot { 1375725Sroot register struct uba_device *ui; 1385725Sroot 1395725Sroot if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 1405725Sroot ui->ui_ubanum != uban) 1415725Sroot return; 1425725Sroot printf(" dmc%d", unit); 1435725Sroot dmcinit(unit); 1445725Sroot } 1455725Sroot 1465725Sroot /* 1475725Sroot * Initialization of interface; reinitialize UNIBUS usage. 1485725Sroot */ 1495725Sroot dmcinit(unit) 1505725Sroot int unit; 1515725Sroot { 1525725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 1535725Sroot register struct uba_device *ui = dmcinfo[unit]; 1545725Sroot register struct dmcdevice *addr; 1555725Sroot int base; 1565725Sroot 1575725Sroot printd("dmcinit\n"); 1585725Sroot if ((sc->sc_flag&DMCBMAPPED) == 0) { 1595725Sroot sc->sc_ubinfo = uballoc(ui->ui_ubanum, 1605725Sroot (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 1615725Sroot sc->sc_flag |= DMCBMAPPED; 1625725Sroot } 1635725Sroot if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 1645768Sroot (int)btoc(DMCMTU)) == 0) { 1655725Sroot printf("dmc%d: can't initialize\n", unit); 166*6334Ssam sc->sc_if.if_flags &= ~IFF_UP; 1675725Sroot return; 1685725Sroot } 1695725Sroot addr = (struct dmcdevice *)ui->ui_addr; 1705725Sroot addr->bsel2 |= DMC_IEO; 1715725Sroot base = sc->sc_ubinfo & 0x3ffff; 1725725Sroot printd(" base 0x%x\n", base); 1735725Sroot dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 1745725Sroot dmcload(sc, DMC_CNTLI, 0, 0); 1755725Sroot base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 1765725Sroot dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 1775725Sroot printd(" first read queued, addr 0x%x\n", base); 178*6334Ssam sc->sc_if.if_flags |= IFF_UP; 1795725Sroot } 1805725Sroot 1815725Sroot /* 1825725Sroot * Start output on interface. Get another datagram 1835725Sroot * to send from the interface queue and map it to 1845725Sroot * the interface before starting output. 1855725Sroot */ 1865725Sroot dmcstart(dev) 1875725Sroot dev_t dev; 1885725Sroot { 1895725Sroot int unit = minor(dev); 1905725Sroot struct uba_device *ui = dmcinfo[unit]; 1915725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 1925725Sroot int addr, len; 1935725Sroot struct mbuf *m; 1945725Sroot 1955725Sroot printd("dmcstart\n"); 1965725Sroot /* 1975725Sroot * Dequeue a request and map it to the UNIBUS. 1985725Sroot * If no more requests, just return. 1995725Sroot */ 2005725Sroot IF_DEQUEUE(&sc->sc_if.if_snd, m); 2015725Sroot if (m == 0) 2025725Sroot return; 2035725Sroot len = if_wubaput(&sc->sc_ifuba, m); 2045725Sroot 2055725Sroot /* 2065725Sroot * Have request mapped to UNIBUS for transmission. 2075725Sroot * Purge any stale data from this BDP and start the output. 2085725Sroot */ 2095853Sroot if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP) 2105853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 2115725Sroot addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 2125725Sroot printd(" len %d, addr 0x%x, ", len, addr); 2135725Sroot printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 2145725Sroot dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 2155725Sroot sc->sc_oactive = 1; 2165725Sroot } 2175725Sroot 2185725Sroot /* 2195725Sroot * Utility routine to load the DMC device registers. 2205725Sroot */ 2215725Sroot dmcload(sc, type, w0, w1) 2225725Sroot register struct dmc_softc *sc; 2235725Sroot int type, w0, w1; 2245725Sroot { 2255725Sroot register struct dmcdevice *addr; 2265725Sroot register int unit, sps, n; 2275725Sroot 2285725Sroot printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 2295725Sroot unit = sc - dmc_softc; 2305725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2315725Sroot sps = spl5(); 2325725Sroot if ((n = sc->sc_que.c_cc) == 0) 2335725Sroot addr->bsel0 = type | DMC_RQI; 2345725Sroot else 2356159Ssam (void) putc(type | DMC_RQI, &sc->sc_que); 2366159Ssam (void) putw(w0, &sc->sc_que); 2376159Ssam (void) putw(w1, &sc->sc_que); 2385725Sroot if (n == 0) 2395725Sroot dmcrint(unit); 2405725Sroot splx(sps); 2415725Sroot } 2425725Sroot 2435725Sroot /* 2445725Sroot * DMC interface receiver interrupt. 2455725Sroot * Ready to accept another command, 2465725Sroot * pull one off the command queue. 2475725Sroot */ 2485725Sroot dmcrint(unit) 2495725Sroot int unit; 2505725Sroot { 2515725Sroot register struct dmc_softc *sc; 2525725Sroot register struct dmcdevice *addr; 2535725Sroot register int n; 2545725Sroot int w0, w1; /* DEBUG */ 2555725Sroot 2565725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2575725Sroot sc = &dmc_softc[unit]; 2585725Sroot while (addr->bsel0&DMC_RDYI) { 2595725Sroot w0 = getw(&sc->sc_que); /* DEBUG */ 2605725Sroot addr->sel4 = w0; /* DEBUG */ 2615725Sroot w1 = getw(&sc->sc_que); /* DEBUG */ 2625725Sroot addr->sel6 = w1; /* DEBUG */ 2635725Sroot /* DEBUG 2645725Sroot addr->sel4 = getw(&sc->sc_que); 2655725Sroot addr->sel6 = getw(&sc->sc_que); 2665725Sroot DEBUG */ 2675725Sroot addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 2685725Sroot printd(" w0 0x%x, w1 0x%x\n", w0, w1); 2695725Sroot while (addr->bsel0&DMC_RDYI) 2705725Sroot ; 2715725Sroot if (sc->sc_que.c_cc == 0) 2725725Sroot return; 2735725Sroot addr->bsel0 = getc(&sc->sc_que); 2745725Sroot n = RDYSCAN; 2755725Sroot while (n-- && (addr->bsel0&DMC_RDYI) == 0) 2765725Sroot ; 2775725Sroot } 2785725Sroot if (sc->sc_que.c_cc) 2795725Sroot addr->bsel0 |= DMC_IEI; 2805725Sroot } 2815725Sroot 2825725Sroot /* 2835725Sroot * DMC interface transmitter interrupt. 2845725Sroot * A transfer has completed, check for errors. 2855725Sroot * If it was a read, notify appropriate protocol. 2865725Sroot * If it was a write, pull the next one off the queue. 2875725Sroot */ 2885725Sroot dmcxint(unit) 2895725Sroot int unit; 2905725Sroot { 2915725Sroot register struct dmc_softc *sc; 2925725Sroot struct uba_device *ui = dmcinfo[unit]; 2935725Sroot struct dmcdevice *addr; 2945725Sroot struct mbuf *m; 2955725Sroot register struct ifqueue *inq; 2965725Sroot int arg, cmd, len; 2975725Sroot 2985725Sroot addr = (struct dmcdevice *)ui->ui_addr; 2995725Sroot arg = addr->sel6; 3005725Sroot cmd = addr->bsel2&7; 3015725Sroot addr->bsel2 &= ~DMC_RDYO; 3025725Sroot sc = &dmc_softc[unit]; 3035725Sroot printd("dmcxint\n"); 3045725Sroot switch (cmd) { 3055725Sroot 3065725Sroot case DMC_OUR: 3075725Sroot /* 3085725Sroot * A read has completed. Purge input buffered 3095725Sroot * data path. Pass packet to type specific 3105725Sroot * higher-level input routine. 3115725Sroot */ 3125725Sroot sc->sc_if.if_ipackets++; 3135853Sroot if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP) 3145853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, 3155853Sroot sc->sc_ifuba.ifu_r.ifrw_bdp); 3165725Sroot len = arg & DMC_CCOUNT; 3175725Sroot printd(" read done, len %d\n", len); 318*6334Ssam switch (ui->ui_flags & DMC_AF) { 3195725Sroot #ifdef INET 320*6334Ssam case AF_INET: 3216260Swnj schednetisr(NETISR_IP); 3225725Sroot inq = &ipintrq; 3235725Sroot break; 3245725Sroot #endif 3255725Sroot 3265725Sroot default: 327*6334Ssam printf("dmc%d: unknown address type %d\n", unit, 328*6334Ssam ui->ui_flags & DMC_AF); 3295725Sroot goto setup; 3305725Sroot } 3315725Sroot m = if_rubaget(&sc->sc_ifuba, len, 0); 3325725Sroot if (m == 0) 3335725Sroot goto setup; 3346207Swnj if (IF_QFULL(inq)) { 3356207Swnj IF_DROP(inq); 3366207Swnj (void) m_freem(m); 3376207Swnj } else 3386207Swnj IF_ENQUEUE(inq, m); 3395725Sroot 3405725Sroot setup: 3415725Sroot arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 3425725Sroot dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 3435725Sroot return; 3445725Sroot 3455725Sroot case DMC_OUX: 3465725Sroot /* 3475725Sroot * A write has completed, start another 3485725Sroot * transfer if there is more data to send. 3495725Sroot */ 3505725Sroot if (sc->sc_oactive == 0) 3515725Sroot return; /* SHOULD IT BE A FATAL ERROR? */ 3525725Sroot printd(" write done\n"); 3535725Sroot sc->sc_if.if_opackets++; 3545725Sroot sc->sc_oactive = 0; 3555725Sroot if (sc->sc_ifuba.ifu_xtofree) { 3566207Swnj (void) m_freem(sc->sc_ifuba.ifu_xtofree); 3575725Sroot sc->sc_ifuba.ifu_xtofree = 0; 3585725Sroot } 3595725Sroot if (sc->sc_if.if_snd.ifq_head == 0) 3605725Sroot return; 3615725Sroot dmcstart(unit); 3625725Sroot return; 3635725Sroot 3645725Sroot case DMC_CNTLO: 3655725Sroot arg &= DMC_CNTMASK; 3665725Sroot if (arg&DMC_FATAL) { 3675725Sroot addr->bsel1 = DMC_MCLR; 3685725Sroot sc->sc_flag &= ~DMCRUN; 3695725Sroot /*** DO SOMETHING TO RESTART DEVICE ***/ 3705725Sroot printf("DMC FATAL ERROR 0%o\n", arg); 3715725Sroot } else { 3725725Sroot /* ACCUMULATE STATISTICS */ 3735725Sroot printf("DMC SOFT ERROR 0%o\n", arg); 3745725Sroot } 3755725Sroot return; 3765725Sroot 3775725Sroot default: 3785725Sroot printf("dmc%d: bad control %o\n", unit, cmd); 3795725Sroot } 3805725Sroot } 3815725Sroot 3825725Sroot /* 3835725Sroot * DMC output routine. 3845725Sroot * Just send the data, header was supplied by 3855725Sroot * upper level protocol routines. 3865725Sroot */ 387*6334Ssam dmcoutput(ifp, m, dst) 3885725Sroot register struct ifnet *ifp; 3895725Sroot register struct mbuf *m; 390*6334Ssam struct sockaddr *dst; 3915725Sroot { 3925725Sroot struct uba_device *ui = dmcinfo[ifp->if_unit]; 3935725Sroot int s; 3945725Sroot 3955725Sroot printd("dmcoutput\n"); 396*6334Ssam if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 397*6334Ssam printf("dmc%d: af%d not supported\n", ifp->if_unit, pf); 398*6334Ssam m_freem(m); 3995725Sroot return (0); 4005725Sroot } 4015725Sroot s = splimp(); 4026207Swnj if (IF_QFULL(&ifp->if_snd)) { 4036207Swnj IF_DROP(&ifp->if_snd); 404*6334Ssam m_freem(m); 4056207Swnj splx(s); 4066207Swnj return (0); 4076207Swnj } 4085725Sroot IF_ENQUEUE(&ifp->if_snd, m); 4095725Sroot if (dmc_softc[ifp->if_unit].sc_oactive == 0) 4105725Sroot dmcstart(ifp->if_unit); 4115725Sroot splx(s); 4125725Sroot return (1); 4135725Sroot } 414