1*6260Swnj /* if_dmc.c 4.6 82/03/19 */ 25725Sroot 35725Sroot #include "dmc.h" 45725Sroot #if NDMC > 0 55725Sroot #define printd if(dmcdebug)printf 65725Sroot int dmcdebug = 1; 75725Sroot /* 85725Sroot * DMC11 device driver, internet version 95725Sroot * 105725Sroot * TODO 115725Sroot * allow more than one outstanding read or write. 125725Sroot */ 135725Sroot 145725Sroot #include "../h/param.h" 155725Sroot #include "../h/systm.h" 165725Sroot #include "../h/mbuf.h" 175725Sroot #include "../h/pte.h" 185725Sroot #include "../h/buf.h" 195725Sroot #include "../h/tty.h" 205725Sroot #include "../h/protosw.h" 215725Sroot #include "../h/socket.h" 225725Sroot #include "../h/ubareg.h" 235725Sroot #include "../h/ubavar.h" 245725Sroot #include "../h/cpu.h" 255725Sroot #include "../h/mtpr.h" 265725Sroot #include "../h/vmmac.h" 275725Sroot #include "../net/in.h" 285725Sroot #include "../net/in_systm.h" 295725Sroot #include "../net/if.h" 305725Sroot #include "../net/if_uba.h" 315853Sroot #include "../net/if_dmc.h" 325725Sroot #include "../net/ip.h" 335725Sroot #include "../net/ip_var.h" 345725Sroot 355725Sroot /* 365725Sroot * Driver information for auto-configuration stuff. 375725Sroot */ 385725Sroot int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 395725Sroot struct uba_device *dmcinfo[NDMC]; 405725Sroot u_short dmcstd[] = { 0 }; 415725Sroot struct uba_driver dmcdriver = 425725Sroot { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 435725Sroot 445725Sroot #define DMC_PF 0xff /* 8 bits of protocol type in ui_flags */ 455725Sroot #define DMC_NET 0xff00 /* 8 bits of net number in ui_flags */ 465725Sroot 475725Sroot /* 485725Sroot * DMC software status per interface. 495725Sroot * 505725Sroot * Each interface is referenced by a network interface structure, 515725Sroot * sc_if, which the routing code uses to locate the interface. 525725Sroot * This structure contains the output queue for the interface, its address, ... 535725Sroot * We also have, for each interface, a UBA interface structure, which 545725Sroot * contains information about the UNIBUS resources held by the interface: 555725Sroot * map registers, buffered data paths, etc. Information is cached in this 565725Sroot * structure for use by the if_uba.c routines in running the interface 575725Sroot * efficiently. 585725Sroot */ 595725Sroot struct dmc_softc { 605725Sroot struct ifnet sc_if; /* network-visible interface */ 615725Sroot struct ifuba sc_ifuba; /* UNIBUS resources */ 625725Sroot short sc_flag; /* flags */ 635725Sroot short sc_oactive; /* output active */ 645725Sroot int sc_ubinfo; /* UBA mapping info for base table */ 655725Sroot struct clist sc_que; /* command queue */ 665725Sroot } dmc_softc[NDMC]; 675725Sroot 685725Sroot /* flags */ 695725Sroot #define DMCRUN 01 705725Sroot #define DMCBMAPPED 02 /* base table mapped */ 715725Sroot 725725Sroot struct dmc_base { 735725Sroot short d_base[128]; /* DMC base table */ 745725Sroot } dmc_base[NDMC]; 755725Sroot 765725Sroot #define loword(x) ((short *)&x)[0] 775725Sroot #define hiword(x) ((short *)&x)[1] 785725Sroot 795725Sroot dmcprobe(reg) 805725Sroot caddr_t reg; 815725Sroot { 825725Sroot register int br, cvec; 835725Sroot register struct dmcdevice *addr = (struct dmcdevice *)reg; 845725Sroot register int i; 855725Sroot 865725Sroot #ifdef lint 875725Sroot br = 0; cvec = br; br = cvec; 885725Sroot dmcrint(0); dmcxint(0); 895725Sroot #endif 905725Sroot addr->bsel1 = DMC_MCLR; 915725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 925725Sroot ; 935725Sroot if ((addr->bsel1 & DMC_RUN) == 0) 945725Sroot return(0); 955725Sroot addr->bsel1 &= ~DMC_MCLR; 965725Sroot addr->bsel0 = DMC_RQI|DMC_IEI; 975725Sroot DELAY(100000); 985725Sroot addr->bsel1 = DMC_MCLR; 995725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 1005725Sroot ; 1015725Sroot return(1); 1025725Sroot } 1035725Sroot 1045725Sroot /* 1055725Sroot * Interface exists: make available by filling in network interface 1065725Sroot * record. System will initialize the interface when it is ready 1075725Sroot * to accept packets. 1085725Sroot */ 1095725Sroot dmcattach(ui) 1105725Sroot register struct uba_device *ui; 1115725Sroot { 1125725Sroot register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 1135725Sroot 1145725Sroot sc->sc_if.if_unit = ui->ui_unit; 1155725Sroot sc->sc_if.if_name = "dmc"; 1165725Sroot sc->sc_if.if_mtu = DMCMTU; 1175725Sroot sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 1185725Sroot sc->sc_if.if_host[0] = 17; /* random number */ 1195725Sroot sc->sc_if.if_addr = 1205725Sroot if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 1215725Sroot sc->sc_if.if_init = dmcinit; 1225725Sroot sc->sc_if.if_output = dmcoutput; 1235725Sroot sc->sc_if.if_ubareset = dmcreset; 1245853Sroot sc->sc_ifuba.ifuba_flags = UBA_NEEDBDP; 1255725Sroot if_attach(&sc->sc_if); 1265725Sroot } 1275725Sroot 1285725Sroot /* 1295725Sroot * Reset of interface after UNIBUS reset. 1305725Sroot * If interface is on specified UBA, reset it's state. 1315725Sroot */ 1325725Sroot dmcreset(unit, uban) 1335725Sroot int unit, uban; 1345725Sroot { 1355725Sroot register struct uba_device *ui; 1365725Sroot 1375725Sroot if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 1385725Sroot ui->ui_ubanum != uban) 1395725Sroot return; 1405725Sroot printf(" dmc%d", unit); 1415725Sroot dmcinit(unit); 1425725Sroot } 1435725Sroot 1445725Sroot /* 1455725Sroot * Initialization of interface; reinitialize UNIBUS usage. 1465725Sroot */ 1475725Sroot dmcinit(unit) 1485725Sroot int unit; 1495725Sroot { 1505725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 1515725Sroot register struct uba_device *ui = dmcinfo[unit]; 1525725Sroot register struct dmcdevice *addr; 1535725Sroot int base; 1545725Sroot 1555725Sroot printd("dmcinit\n"); 1565725Sroot if ((sc->sc_flag&DMCBMAPPED) == 0) { 1575725Sroot sc->sc_ubinfo = uballoc(ui->ui_ubanum, 1585725Sroot (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 1595725Sroot sc->sc_flag |= DMCBMAPPED; 1605725Sroot } 1615725Sroot if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 1625768Sroot (int)btoc(DMCMTU)) == 0) { 1635725Sroot printf("dmc%d: can't initialize\n", unit); 1645725Sroot return; 1655725Sroot } 1665725Sroot addr = (struct dmcdevice *)ui->ui_addr; 1675725Sroot addr->bsel2 |= DMC_IEO; 1685725Sroot base = sc->sc_ubinfo & 0x3ffff; 1695725Sroot printd(" base 0x%x\n", base); 1705725Sroot dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 1715725Sroot dmcload(sc, DMC_CNTLI, 0, 0); 1725725Sroot base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 1735725Sroot dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 1745725Sroot printd(" first read queued, addr 0x%x\n", base); 1755725Sroot } 1765725Sroot 1775725Sroot /* 1785725Sroot * Start output on interface. Get another datagram 1795725Sroot * to send from the interface queue and map it to 1805725Sroot * the interface before starting output. 1815725Sroot */ 1825725Sroot dmcstart(dev) 1835725Sroot dev_t dev; 1845725Sroot { 1855725Sroot int unit = minor(dev); 1865725Sroot struct uba_device *ui = dmcinfo[unit]; 1875725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 1885725Sroot int addr, len; 1895725Sroot struct mbuf *m; 1905725Sroot 1915725Sroot printd("dmcstart\n"); 1925725Sroot /* 1935725Sroot * Dequeue a request and map it to the UNIBUS. 1945725Sroot * If no more requests, just return. 1955725Sroot */ 1965725Sroot IF_DEQUEUE(&sc->sc_if.if_snd, m); 1975725Sroot if (m == 0) 1985725Sroot return; 1995725Sroot len = if_wubaput(&sc->sc_ifuba, m); 2005725Sroot 2015725Sroot /* 2025725Sroot * Have request mapped to UNIBUS for transmission. 2035725Sroot * Purge any stale data from this BDP and start the output. 2045725Sroot */ 2055853Sroot if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP) 2065853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 2075725Sroot addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 2085725Sroot printd(" len %d, addr 0x%x, ", len, addr); 2095725Sroot printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 2105725Sroot dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 2115725Sroot sc->sc_oactive = 1; 2125725Sroot } 2135725Sroot 2145725Sroot /* 2155725Sroot * Utility routine to load the DMC device registers. 2165725Sroot */ 2175725Sroot dmcload(sc, type, w0, w1) 2185725Sroot register struct dmc_softc *sc; 2195725Sroot int type, w0, w1; 2205725Sroot { 2215725Sroot register struct dmcdevice *addr; 2225725Sroot register int unit, sps, n; 2235725Sroot 2245725Sroot printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 2255725Sroot unit = sc - dmc_softc; 2265725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2275725Sroot sps = spl5(); 2285725Sroot if ((n = sc->sc_que.c_cc) == 0) 2295725Sroot addr->bsel0 = type | DMC_RQI; 2305725Sroot else 2316159Ssam (void) putc(type | DMC_RQI, &sc->sc_que); 2326159Ssam (void) putw(w0, &sc->sc_que); 2336159Ssam (void) putw(w1, &sc->sc_que); 2345725Sroot if (n == 0) 2355725Sroot dmcrint(unit); 2365725Sroot splx(sps); 2375725Sroot } 2385725Sroot 2395725Sroot /* 2405725Sroot * DMC interface receiver interrupt. 2415725Sroot * Ready to accept another command, 2425725Sroot * pull one off the command queue. 2435725Sroot */ 2445725Sroot dmcrint(unit) 2455725Sroot int unit; 2465725Sroot { 2475725Sroot register struct dmc_softc *sc; 2485725Sroot register struct dmcdevice *addr; 2495725Sroot register int n; 2505725Sroot int w0, w1; /* DEBUG */ 2515725Sroot 2525725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2535725Sroot sc = &dmc_softc[unit]; 2545725Sroot while (addr->bsel0&DMC_RDYI) { 2555725Sroot w0 = getw(&sc->sc_que); /* DEBUG */ 2565725Sroot addr->sel4 = w0; /* DEBUG */ 2575725Sroot w1 = getw(&sc->sc_que); /* DEBUG */ 2585725Sroot addr->sel6 = w1; /* DEBUG */ 2595725Sroot /* DEBUG 2605725Sroot addr->sel4 = getw(&sc->sc_que); 2615725Sroot addr->sel6 = getw(&sc->sc_que); 2625725Sroot DEBUG */ 2635725Sroot addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 2645725Sroot printd(" w0 0x%x, w1 0x%x\n", w0, w1); 2655725Sroot while (addr->bsel0&DMC_RDYI) 2665725Sroot ; 2675725Sroot if (sc->sc_que.c_cc == 0) 2685725Sroot return; 2695725Sroot addr->bsel0 = getc(&sc->sc_que); 2705725Sroot n = RDYSCAN; 2715725Sroot while (n-- && (addr->bsel0&DMC_RDYI) == 0) 2725725Sroot ; 2735725Sroot } 2745725Sroot if (sc->sc_que.c_cc) 2755725Sroot addr->bsel0 |= DMC_IEI; 2765725Sroot } 2775725Sroot 2785725Sroot /* 2795725Sroot * DMC interface transmitter interrupt. 2805725Sroot * A transfer has completed, check for errors. 2815725Sroot * If it was a read, notify appropriate protocol. 2825725Sroot * If it was a write, pull the next one off the queue. 2835725Sroot */ 2845725Sroot dmcxint(unit) 2855725Sroot int unit; 2865725Sroot { 2875725Sroot register struct dmc_softc *sc; 2885725Sroot struct uba_device *ui = dmcinfo[unit]; 2895725Sroot struct dmcdevice *addr; 2905725Sroot struct mbuf *m; 2915725Sroot register struct ifqueue *inq; 2925725Sroot int arg, cmd, len; 2935725Sroot 2945725Sroot addr = (struct dmcdevice *)ui->ui_addr; 2955725Sroot arg = addr->sel6; 2965725Sroot cmd = addr->bsel2&7; 2975725Sroot addr->bsel2 &= ~DMC_RDYO; 2985725Sroot sc = &dmc_softc[unit]; 2995725Sroot printd("dmcxint\n"); 3005725Sroot switch (cmd) { 3015725Sroot 3025725Sroot case DMC_OUR: 3035725Sroot /* 3045725Sroot * A read has completed. Purge input buffered 3055725Sroot * data path. Pass packet to type specific 3065725Sroot * higher-level input routine. 3075725Sroot */ 3085725Sroot sc->sc_if.if_ipackets++; 3095853Sroot if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP) 3105853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, 3115853Sroot sc->sc_ifuba.ifu_r.ifrw_bdp); 3125725Sroot len = arg & DMC_CCOUNT; 3135725Sroot printd(" read done, len %d\n", len); 3145725Sroot switch (ui->ui_flags & DMC_PF) { 3155725Sroot #ifdef INET 3165725Sroot case PF_INET: 317*6260Swnj schednetisr(NETISR_IP); 3185725Sroot inq = &ipintrq; 3195725Sroot break; 3205725Sroot #endif 3215725Sroot 3225725Sroot default: 3235725Sroot printf("dmc%d: unknown packet type %d\n", unit, 3245725Sroot ui->ui_flags & DMC_NET); 3255725Sroot goto setup; 3265725Sroot } 3275725Sroot m = if_rubaget(&sc->sc_ifuba, len, 0); 3285725Sroot if (m == 0) 3295725Sroot goto setup; 3306207Swnj if (IF_QFULL(inq)) { 3316207Swnj IF_DROP(inq); 3326207Swnj (void) m_freem(m); 3336207Swnj } else 3346207Swnj IF_ENQUEUE(inq, m); 3355725Sroot 3365725Sroot setup: 3375725Sroot arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 3385725Sroot dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 3395725Sroot return; 3405725Sroot 3415725Sroot case DMC_OUX: 3425725Sroot /* 3435725Sroot * A write has completed, start another 3445725Sroot * transfer if there is more data to send. 3455725Sroot */ 3465725Sroot if (sc->sc_oactive == 0) 3475725Sroot return; /* SHOULD IT BE A FATAL ERROR? */ 3485725Sroot printd(" write done\n"); 3495725Sroot sc->sc_if.if_opackets++; 3505725Sroot sc->sc_oactive = 0; 3515725Sroot if (sc->sc_ifuba.ifu_xtofree) { 3526207Swnj (void) m_freem(sc->sc_ifuba.ifu_xtofree); 3535725Sroot sc->sc_ifuba.ifu_xtofree = 0; 3545725Sroot } 3555725Sroot if (sc->sc_if.if_snd.ifq_head == 0) 3565725Sroot return; 3575725Sroot dmcstart(unit); 3585725Sroot return; 3595725Sroot 3605725Sroot case DMC_CNTLO: 3615725Sroot arg &= DMC_CNTMASK; 3625725Sroot if (arg&DMC_FATAL) { 3635725Sroot addr->bsel1 = DMC_MCLR; 3645725Sroot sc->sc_flag &= ~DMCRUN; 3655725Sroot /*** DO SOMETHING TO RESTART DEVICE ***/ 3665725Sroot printf("DMC FATAL ERROR 0%o\n", arg); 3675725Sroot } else { 3685725Sroot /* ACCUMULATE STATISTICS */ 3695725Sroot printf("DMC SOFT ERROR 0%o\n", arg); 3705725Sroot } 3715725Sroot return; 3725725Sroot 3735725Sroot default: 3745725Sroot printf("dmc%d: bad control %o\n", unit, cmd); 3755725Sroot } 3765725Sroot } 3775725Sroot 3785725Sroot /* 3795725Sroot * DMC output routine. 3805725Sroot * Just send the data, header was supplied by 3815725Sroot * upper level protocol routines. 3825725Sroot */ 3835725Sroot dmcoutput(ifp, m, pf) 3845725Sroot register struct ifnet *ifp; 3855725Sroot register struct mbuf *m; 3865725Sroot int pf; 3875725Sroot { 3885725Sroot struct uba_device *ui = dmcinfo[ifp->if_unit]; 3895725Sroot int s; 3905725Sroot 3915725Sroot printd("dmcoutput\n"); 3925725Sroot if (pf != (ui->ui_flags & DMC_PF)) { 3935725Sroot printf("dmc%d: protocol %d not supported\n", ifp->if_unit, pf); 3946207Swnj (void) m_freem(m); 3955725Sroot return (0); 3965725Sroot } 3975725Sroot s = splimp(); 3986207Swnj if (IF_QFULL(&ifp->if_snd)) { 3996207Swnj IF_DROP(&ifp->if_snd); 4006207Swnj (void) m_freem(m); 4016207Swnj splx(s); 4026207Swnj return (0); 4036207Swnj } 4045725Sroot IF_ENQUEUE(&ifp->if_snd, m); 4055725Sroot if (dmc_softc[ifp->if_unit].sc_oactive == 0) 4065725Sroot dmcstart(ifp->if_unit); 4075725Sroot splx(s); 4085725Sroot return (1); 4095725Sroot } 410