1*19862Skarels /* if_dmc.c 6.5 85/05/01 */ 25725Sroot 35725Sroot #include "dmc.h" 45725Sroot #if NDMC > 0 517565Skarels 65725Sroot /* 75725Sroot * DMC11 device driver, internet version 85725Sroot * 917565Skarels * Bill Nesheim 1017221Stef * Cornell University 1111191Ssam * 1217565Skarels * Lou Salkind 1317565Skarels * New York University 145725Sroot */ 1517565Skarels 1617565Skarels /* #define DEBUG /* for base table dump on fatal error */ 1717565Skarels 189794Ssam #include "../machine/pte.h" 195725Sroot 2017111Sbloom #include "param.h" 2117111Sbloom #include "systm.h" 2217111Sbloom #include "mbuf.h" 2317111Sbloom #include "buf.h" 2417221Stef #include "ioctl.h" /* must precede tty.h */ 2517111Sbloom #include "tty.h" 2617111Sbloom #include "protosw.h" 2717111Sbloom #include "socket.h" 2817111Sbloom #include "vmmac.h" 2917111Sbloom #include "errno.h" 308460Sroot 318460Sroot #include "../net/if.h" 329176Ssam #include "../net/netisr.h" 338460Sroot #include "../net/route.h" 348416Swnj #include "../netinet/in.h" 358416Swnj #include "../netinet/in_systm.h" 3617565Skarels #include "../netinet/ip.h" 3717565Skarels #include "../netinet/ip_var.h" 388460Sroot 398460Sroot #include "../vax/cpu.h" 408460Sroot #include "../vax/mtpr.h" 4117111Sbloom #include "if_uba.h" 4217111Sbloom #include "if_dmc.h" 438460Sroot #include "../vaxuba/ubareg.h" 448460Sroot #include "../vaxuba/ubavar.h" 455725Sroot 4617565Skarels #include "../h/time.h" 4717565Skarels #include "../h/kernel.h" 4817565Skarels 4917565Skarels int dmctimer; /* timer started? */ 5017565Skarels int dmc_timeout = 8; /* timeout value */ 5117565Skarels int dmcwatch(); 5217565Skarels 535725Sroot /* 545725Sroot * Driver information for auto-configuration stuff. 555725Sroot */ 5613061Ssam int dmcprobe(), dmcattach(), dmcinit(), dmcioctl(); 5713061Ssam int dmcoutput(), dmcreset(); 585725Sroot struct uba_device *dmcinfo[NDMC]; 595725Sroot u_short dmcstd[] = { 0 }; 605725Sroot struct uba_driver dmcdriver = 615725Sroot { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 625725Sroot 6317221Stef #define NRCV 7 6417565Skarels #define NXMT 3 6517221Stef #define NTOT (NRCV + NXMT) 6617565Skarels #define NCMDS (NTOT+4) /* size of command queue */ 6717221Stef 6817565Skarels #define printd if(dmcdebug)printf 6917565Skarels int dmcdebug = 0; 7017565Skarels 7117221Stef /* error reporting intervals */ 7217221Stef #define DMC_RPNBFS 50 7317221Stef #define DMC_RPDSC 1 7417565Skarels #define DMC_RPTMO 10 7517565Skarels #define DMC_RPDCK 10 7617221Stef 7717221Stef struct dmc_command { 7817221Stef char qp_cmd; /* command */ 7917221Stef short qp_ubaddr; /* buffer address */ 8017221Stef short qp_cc; /* character count || XMEM */ 8117221Stef struct dmc_command *qp_next; /* next command on queue */ 8217221Stef }; 8317221Stef 845725Sroot /* 8517221Stef * The dmcuba structures generalize the ifuba structure 8617565Skarels * to an arbitrary number of receive and transmit buffers. 8717221Stef */ 8817221Stef struct ifxmt { 8917565Skarels struct ifrw x_ifrw; /* mapping info */ 9017221Stef struct pte x_map[IF_MAXNUBAMR]; /* output base pages */ 9117221Stef short x_xswapd; /* mask of clusters swapped */ 9217221Stef struct mbuf *x_xtofree; /* pages being dma'd out */ 9317221Stef }; 9417565Skarels 9517221Stef struct dmcuba { 9617221Stef short ifu_uban; /* uba number */ 9717221Stef short ifu_hlen; /* local net header length */ 9817221Stef struct uba_regs *ifu_uba; /* uba regs, in vm */ 9917221Stef struct ifrw ifu_r[NRCV]; /* receive information */ 10017221Stef struct ifxmt ifu_w[NXMT]; /* transmit information */ 10117221Stef /* these should only be pointers */ 10217221Stef short ifu_flags; /* used during uballoc's */ 10317221Stef }; 10417221Stef 10517221Stef struct dmcbufs { 10617221Stef int ubinfo; /* from uballoc */ 10717221Stef short cc; /* buffer size */ 10817221Stef short flags; /* access control */ 10917221Stef }; 11017221Stef #define DBUF_OURS 0 /* buffer is available */ 11117221Stef #define DBUF_DMCS 1 /* buffer claimed by somebody */ 11217221Stef #define DBUF_XMIT 4 /* transmit buffer */ 11317565Skarels #define DBUF_RCV 8 /* receive buffer */ 11417221Stef 11517221Stef struct mbuf *dmc_get(); 11617221Stef 11717221Stef /* 1185725Sroot * DMC software status per interface. 1195725Sroot * 1205725Sroot * Each interface is referenced by a network interface structure, 1215725Sroot * sc_if, which the routing code uses to locate the interface. 1225725Sroot * This structure contains the output queue for the interface, its address, ... 12317221Stef * We also have, for each interface, a set of 7 UBA interface structures 12417221Stef * for each, which 12517221Stef * contain information about the UNIBUS resources held by the interface: 1265725Sroot * map registers, buffered data paths, etc. Information is cached in this 1275725Sroot * structure for use by the if_uba.c routines in running the interface 1285725Sroot * efficiently. 1295725Sroot */ 1305725Sroot struct dmc_softc { 13117221Stef short sc_oused; /* output buffers currently in use */ 13217221Stef short sc_iused; /* input buffers given to DMC */ 13317221Stef short sc_flag; /* flags */ 13417565Skarels int sc_nticks; /* seconds since last interrupt */ 1355725Sroot struct ifnet sc_if; /* network-visible interface */ 13617565Skarels struct dmcbufs sc_rbufs[NRCV]; /* receive buffer info */ 13717221Stef struct dmcbufs sc_xbufs[NXMT]; /* transmit buffer info */ 13817221Stef struct dmcuba sc_ifuba; /* UNIBUS resources */ 1395725Sroot int sc_ubinfo; /* UBA mapping info for base table */ 14017221Stef int sc_errors[4]; /* non-fatal error counters */ 14117221Stef #define sc_datck sc_errors[0] 14217221Stef #define sc_timeo sc_errors[1] 14317221Stef #define sc_nobuf sc_errors[2] 14417221Stef #define sc_disc sc_errors[3] 14517221Stef /* command queue stuff */ 14617565Skarels struct dmc_command sc_cmdbuf[NCMDS]; 14717221Stef struct dmc_command *sc_qhead; /* head of command queue */ 14817221Stef struct dmc_command *sc_qtail; /* tail of command queue */ 14917221Stef struct dmc_command *sc_qactive; /* command in progress */ 15017221Stef struct dmc_command *sc_qfreeh; /* head of list of free cmd buffers */ 15117221Stef struct dmc_command *sc_qfreet; /* tail of list of free cmd buffers */ 15217221Stef /* end command queue stuff */ 1535725Sroot } dmc_softc[NDMC]; 1545725Sroot 1555725Sroot /* flags */ 15617565Skarels #define DMC_ALLOC 01 /* unibus resources allocated */ 15717565Skarels #define DMC_BMAPPED 02 /* base table mapped */ 15817565Skarels #define DMC_RESTART 04 /* software restart in progress */ 15917565Skarels #define DMC_ACTIVE 08 /* device active */ 1605725Sroot 16117565Skarels struct dmc_base { 16217565Skarels short d_base[128]; /* DMC base table */ 1635725Sroot } dmc_base[NDMC]; 1645725Sroot 16517221Stef /* queue manipulation macros */ 16617221Stef #define QUEUE_AT_HEAD(qp, head, tail) \ 16717221Stef (qp)->qp_next = (head); \ 16817221Stef (head) = (qp); \ 16917221Stef if ((tail) == (struct dmc_command *) 0) \ 17017221Stef (tail) = (head) 1715725Sroot 17217221Stef #define QUEUE_AT_TAIL(qp, head, tail) \ 17317221Stef if ((tail)) \ 17417221Stef (tail)->qp_next = (qp); \ 17517221Stef else \ 17617221Stef (head) = (qp); \ 17717221Stef (qp)->qp_next = (struct dmc_command *) 0; \ 17817221Stef (tail) = (qp) 17917221Stef 18017221Stef #define DEQUEUE(head, tail) \ 18117221Stef (head) = (head)->qp_next;\ 18217221Stef if ((head) == (struct dmc_command *) 0)\ 18317221Stef (tail) = (head) 18417221Stef 1855725Sroot dmcprobe(reg) 1865725Sroot caddr_t reg; 1875725Sroot { 1885725Sroot register int br, cvec; 1895725Sroot register struct dmcdevice *addr = (struct dmcdevice *)reg; 1905725Sroot register int i; 1915725Sroot 1925725Sroot #ifdef lint 1935725Sroot br = 0; cvec = br; br = cvec; 1945725Sroot dmcrint(0); dmcxint(0); 1955725Sroot #endif 1965725Sroot addr->bsel1 = DMC_MCLR; 1975725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 1985725Sroot ; 19917565Skarels if ((addr->bsel1 & DMC_RUN) == 0) { 20017565Skarels printf("dmcprobe: can't start device\n" ); 2016334Ssam return (0); 20217565Skarels } 2035725Sroot addr->bsel0 = DMC_RQI|DMC_IEI; 20417565Skarels /* let's be paranoid */ 20517565Skarels addr->bsel0 |= DMC_RQI|DMC_IEI; 20617565Skarels DELAY(1000000); 2075725Sroot addr->bsel1 = DMC_MCLR; 2085725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 2095725Sroot ; 2106334Ssam return (1); 2115725Sroot } 2125725Sroot 2135725Sroot /* 2145725Sroot * Interface exists: make available by filling in network interface 2155725Sroot * record. System will initialize the interface when it is ready 2165725Sroot * to accept packets. 2175725Sroot */ 2185725Sroot dmcattach(ui) 2195725Sroot register struct uba_device *ui; 2205725Sroot { 2215725Sroot register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 2225725Sroot 2235725Sroot sc->sc_if.if_unit = ui->ui_unit; 2245725Sroot sc->sc_if.if_name = "dmc"; 2255725Sroot sc->sc_if.if_mtu = DMCMTU; 2265725Sroot sc->sc_if.if_init = dmcinit; 2275725Sroot sc->sc_if.if_output = dmcoutput; 22813061Ssam sc->sc_if.if_ioctl = dmcioctl; 2298976Sroot sc->sc_if.if_reset = dmcreset; 23017221Stef sc->sc_if.if_flags = IFF_POINTOPOINT; 23117221Stef sc->sc_ifuba.ifu_flags = UBA_CANTWAIT; 23217221Stef 23317565Skarels if_attach(&sc->sc_if); 23417565Skarels if (dmctimer == 0) { 23517565Skarels dmctimer = 1; 23617565Skarels timeout(dmcwatch, (caddr_t) 0, hz); 23717221Stef } 2385725Sroot } 2395725Sroot 2405725Sroot /* 2415725Sroot * Reset of interface after UNIBUS reset. 242*19862Skarels * If interface is on specified UBA, reset its state. 2435725Sroot */ 2445725Sroot dmcreset(unit, uban) 2455725Sroot int unit, uban; 2465725Sroot { 2475725Sroot register struct uba_device *ui; 24817221Stef register struct dmc_softc *sc = &dmc_softc[unit]; 2495725Sroot 2505725Sroot if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 2515725Sroot ui->ui_ubanum != uban) 2525725Sroot return; 2535725Sroot printf(" dmc%d", unit); 25417565Skarels sc->sc_flag = 0; 255*19862Skarels sc->sc_if.if_flags &= ~IFF_RUNNING; 2565725Sroot dmcinit(unit); 2575725Sroot } 2585725Sroot 2595725Sroot /* 2605725Sroot * Initialization of interface; reinitialize UNIBUS usage. 2615725Sroot */ 2625725Sroot dmcinit(unit) 2635725Sroot int unit; 2645725Sroot { 2655725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 2665725Sroot register struct uba_device *ui = dmcinfo[unit]; 2675725Sroot register struct dmcdevice *addr; 26813061Ssam register struct ifnet *ifp = &sc->sc_if; 26917221Stef register struct ifrw *ifrw; 27017221Stef register struct ifxmt *ifxp; 27117221Stef register struct dmcbufs *rp; 27217565Skarels register struct dmc_command *qp; 273*19862Skarels struct ifaddr *ifa; 27417221Stef int base; 27517565Skarels int s; 2765725Sroot 27717221Stef addr = (struct dmcdevice *)ui->ui_addr; 27817221Stef 279*19862Skarels /* 280*19862Skarels * Check to see that an address has been set 281*19862Skarels * (both local and destination for an address family). 282*19862Skarels */ 283*19862Skarels for (ifa = ifp->if_addrlist; ifa; ifa = ifa->ifa_next) 284*19862Skarels if (ifa->ifa_addr.sa_family && ifa->ifa_dstaddr.sa_family) 285*19862Skarels break; 286*19862Skarels if (ifa == (struct ifaddr *) 0) 2875725Sroot return; 28817221Stef 28917221Stef if ((addr->bsel1&DMC_RUN) == 0) { 29017221Stef printf("dmcinit: DMC not running\n"); 291*19862Skarels ifp->if_flags &= ~IFF_UP; 29217221Stef return; 29317221Stef } 29417221Stef /* map base table */ 29517565Skarels if ((sc->sc_flag & DMC_BMAPPED) == 0) { 29617221Stef sc->sc_ubinfo = uballoc(ui->ui_ubanum, 29717221Stef (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 29817221Stef sc->sc_flag |= DMC_BMAPPED; 29917221Stef } 30017221Stef /* initialize UNIBUS resources */ 30117221Stef sc->sc_iused = sc->sc_oused = 0; 302*19862Skarels if ((ifp->if_flags & IFF_RUNNING) == 0) { 30317565Skarels if (dmc_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 30417565Skarels sizeof(struct dmc_header), (int)btoc(DMCMTU)) == 0) { 305*19862Skarels printf("dmc%d: can't allocate uba resources\n", unit); 30613061Ssam ifp->if_flags &= ~IFF_UP; 30713061Ssam return; 30813061Ssam } 309*19862Skarels ifp->if_flags |= IFF_RUNNING; 3105725Sroot } 31117221Stef 31217221Stef /* initialize buffer pool */ 31317565Skarels /* receives */ 31417221Stef ifrw = &sc->sc_ifuba.ifu_r[0]; 31517221Stef for (rp = &sc->sc_rbufs[0]; rp < &sc->sc_rbufs[NRCV]; rp++) { 31617221Stef rp->ubinfo = ifrw->ifrw_info & 0x3ffff; 31717565Skarels rp->cc = DMCMTU + sizeof (struct dmc_header); 31817221Stef rp->flags = DBUF_OURS|DBUF_RCV; 31917221Stef ifrw++; 3206363Ssam } 32117221Stef /* transmits */ 32217221Stef ifxp = &sc->sc_ifuba.ifu_w[0]; 32317221Stef for (rp = &sc->sc_xbufs[0]; rp < &sc->sc_xbufs[NXMT]; rp++) { 32417221Stef rp->ubinfo = ifxp->x_ifrw.ifrw_info & 0x3ffff; 32517221Stef rp->cc = 0; 32617221Stef rp->flags = DBUF_OURS|DBUF_XMIT; 32717221Stef ifxp++; 32817221Stef } 32917565Skarels 33017565Skarels /* set up command queues */ 33117565Skarels sc->sc_qfreeh = sc->sc_qfreet 33217565Skarels = sc->sc_qhead = sc->sc_qtail = sc->sc_qactive = 33317565Skarels (struct dmc_command *)0; 33417565Skarels /* set up free command buffer list */ 33517565Skarels for (qp = &sc->sc_cmdbuf[0]; qp < &sc->sc_cmdbuf[NCMDS]; qp++) { 33617565Skarels QUEUE_AT_HEAD(qp, sc->sc_qfreeh, sc->sc_qfreet); 33717565Skarels } 33817565Skarels 33917221Stef /* base in */ 34017221Stef base = sc->sc_ubinfo & 0x3ffff; 34117565Skarels dmcload(sc, DMC_BASEI, base, (base>>2) & DMC_XMEM); 34217221Stef /* specify half duplex operation, flags tell if primary */ 34317221Stef /* or secondary station */ 34417221Stef if (ui->ui_flags == 0) 34517565Skarels /* use DDMCP mode in full duplex */ 34617565Skarels dmcload(sc, DMC_CNTLI, 0, 0); 34717221Stef else if (ui->ui_flags == 1) 34817565Skarels /* use MAINTENENCE mode */ 34917565Skarels dmcload(sc, DMC_CNTLI, 0, DMC_MAINT ); 35017221Stef else if (ui->ui_flags == 2) 35117221Stef /* use DDCMP half duplex as primary station */ 35217221Stef dmcload(sc, DMC_CNTLI, 0, DMC_HDPLX); 35317221Stef else if (ui->ui_flags == 3) 35417221Stef /* use DDCMP half duplex as secondary station */ 35517221Stef dmcload(sc, DMC_CNTLI, 0, DMC_HDPLX | DMC_SEC); 35617565Skarels 35717565Skarels /* enable operation done interrupts */ 35817565Skarels sc->sc_flag &= ~DMC_ACTIVE; 35917565Skarels while ((addr->bsel2 & DMC_IEO) == 0) 36017565Skarels addr->bsel2 |= DMC_IEO; 36117565Skarels s = spl5(); 36217221Stef /* queue first NRCV buffers for DMC to fill */ 36317221Stef for (rp = &sc->sc_rbufs[0]; rp < &sc->sc_rbufs[NRCV]; rp++) { 36417221Stef rp->flags |= DBUF_DMCS; 36517221Stef dmcload(sc, DMC_READ, rp->ubinfo, 36617565Skarels (((rp->ubinfo>>2)&DMC_XMEM) | rp->cc)); 36717221Stef sc->sc_iused++; 36817221Stef } 36917565Skarels splx(s); 3705725Sroot } 3715725Sroot 3725725Sroot /* 3735725Sroot * Start output on interface. Get another datagram 3745725Sroot * to send from the interface queue and map it to 3755725Sroot * the interface before starting output. 37617221Stef * 37717221Stef * Must be called at spl 5 3785725Sroot */ 3795725Sroot dmcstart(dev) 3805725Sroot dev_t dev; 3815725Sroot { 3825725Sroot int unit = minor(dev); 3835725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 3845725Sroot struct mbuf *m; 38517221Stef register struct dmcbufs *rp; 38617221Stef register int n; 3875725Sroot 3885725Sroot /* 38917221Stef * Dequeue up to NXMT requests and map them to the UNIBUS. 39017221Stef * If no more requests, or no dmc buffers available, just return. 3915725Sroot */ 39217221Stef n = 0; 39317221Stef for (rp = &sc->sc_xbufs[0]; rp < &sc->sc_xbufs[NXMT]; rp++ ) { 39417221Stef /* find an available buffer */ 39517565Skarels if ((rp->flags & DBUF_DMCS) == 0) { 39617221Stef IF_DEQUEUE(&sc->sc_if.if_snd, m); 39717221Stef if (m == 0) 39817221Stef return; 39917221Stef /* mark it dmcs */ 40017221Stef rp->flags |= (DBUF_DMCS); 40117221Stef /* 40217221Stef * Have request mapped to UNIBUS for transmission 40317221Stef * and start the output. 40417221Stef */ 40517565Skarels rp->cc = dmcput(&sc->sc_ifuba, n, m); 40617565Skarels rp->cc &= DMC_CCOUNT; 40717221Stef sc->sc_oused++; 40817221Stef dmcload(sc, DMC_WRITE, rp->ubinfo, 40917221Stef rp->cc | ((rp->ubinfo>>2)&DMC_XMEM)); 41017221Stef } 41117221Stef n++; 41217221Stef } 4135725Sroot } 4145725Sroot 4155725Sroot /* 4165725Sroot * Utility routine to load the DMC device registers. 4175725Sroot */ 4185725Sroot dmcload(sc, type, w0, w1) 4195725Sroot register struct dmc_softc *sc; 4205725Sroot int type, w0, w1; 4215725Sroot { 4225725Sroot register struct dmcdevice *addr; 42317221Stef register int unit, sps; 42417221Stef register struct dmc_command *qp; 4255725Sroot 42617565Skarels unit = sc - dmc_softc; 4275725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 4285725Sroot sps = spl5(); 42917221Stef 43017221Stef /* grab a command buffer from the free list */ 43117221Stef if ((qp = sc->sc_qfreeh) == (struct dmc_command *)0) 43217221Stef panic("dmc command queue overflow"); 43317221Stef DEQUEUE(sc->sc_qfreeh, sc->sc_qfreet); 43417221Stef 43517221Stef /* fill in requested info */ 43617221Stef qp->qp_cmd = (type | DMC_RQI); 43717221Stef qp->qp_ubaddr = w0; 43817221Stef qp->qp_cc = w1; 43917221Stef 44017221Stef if (sc->sc_qactive) { /* command in progress */ 44117221Stef if (type == DMC_READ) { 44217221Stef QUEUE_AT_HEAD(qp, sc->sc_qhead, sc->sc_qtail); 44317221Stef } else { 44417221Stef QUEUE_AT_TAIL(qp, sc->sc_qhead, sc->sc_qtail); 44517221Stef } 44617221Stef } else { /* command port free */ 44717221Stef sc->sc_qactive = qp; 44817221Stef addr->bsel0 = qp->qp_cmd; 4495725Sroot dmcrint(unit); 45017221Stef } 4515725Sroot splx(sps); 4525725Sroot } 4535725Sroot 4545725Sroot /* 4555725Sroot * DMC interface receiver interrupt. 4565725Sroot * Ready to accept another command, 4575725Sroot * pull one off the command queue. 4585725Sroot */ 4595725Sroot dmcrint(unit) 4605725Sroot int unit; 4615725Sroot { 4625725Sroot register struct dmc_softc *sc; 4635725Sroot register struct dmcdevice *addr; 46417221Stef register struct dmc_command *qp; 4655725Sroot register int n; 4665725Sroot 4675725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 4685725Sroot sc = &dmc_softc[unit]; 46917221Stef if ((qp = sc->sc_qactive) == (struct dmc_command *) 0) { 47017565Skarels printf("dmc%d: dmcrint no command\n", unit); 47117221Stef return; 47217221Stef } 4735725Sroot while (addr->bsel0&DMC_RDYI) { 47417221Stef addr->sel4 = qp->qp_ubaddr; 47517221Stef addr->sel6 = qp->qp_cc; 4765725Sroot addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 47717221Stef /* free command buffer */ 47817221Stef QUEUE_AT_HEAD(qp, sc->sc_qfreeh, sc->sc_qfreet); 47917221Stef while (addr->bsel0 & DMC_RDYI) { 48017221Stef /* 48117221Stef * Can't check for RDYO here 'cause 48217221Stef * this routine isn't reentrant! 48317221Stef */ 48417221Stef DELAY(5); 48517221Stef } 48617221Stef /* move on to next command */ 48717565Skarels if ((sc->sc_qactive = sc->sc_qhead) == (struct dmc_command *)0) 48817565Skarels break; /* all done */ 48917221Stef /* more commands to do, start the next one */ 49017221Stef qp = sc->sc_qactive; 49117221Stef DEQUEUE(sc->sc_qhead, sc->sc_qtail); 49217221Stef addr->bsel0 = qp->qp_cmd; 4935725Sroot n = RDYSCAN; 49417565Skarels while (n-- > 0) 49517565Skarels if ((addr->bsel0&DMC_RDYI) || (addr->bsel2&DMC_RDYO)) 49617565Skarels break; 4975725Sroot } 49817221Stef if (sc->sc_qactive) { 49917221Stef addr->bsel0 |= DMC_IEI|DMC_RQI; 50017221Stef /* VMS does it twice !*$%@# */ 50117221Stef addr->bsel0 |= DMC_IEI|DMC_RQI; 50217221Stef } 50317565Skarels 5045725Sroot } 5055725Sroot 5065725Sroot /* 5075725Sroot * DMC interface transmitter interrupt. 50817221Stef * A transfer may have completed, check for errors. 5095725Sroot * If it was a read, notify appropriate protocol. 5105725Sroot * If it was a write, pull the next one off the queue. 5115725Sroot */ 5125725Sroot dmcxint(unit) 5135725Sroot int unit; 5145725Sroot { 5155725Sroot register struct dmc_softc *sc; 51613065Ssam register struct ifnet *ifp; 5175725Sroot struct uba_device *ui = dmcinfo[unit]; 5185725Sroot struct dmcdevice *addr; 5195725Sroot struct mbuf *m; 52017565Skarels struct ifqueue *inq; 52117221Stef int arg, pkaddr, cmd, len; 52217221Stef register struct ifrw *ifrw; 52317221Stef register struct dmcbufs *rp; 52417565Skarels register struct ifxmt *ifxp; 52517565Skarels struct dmc_header *dh; 52617565Skarels int off, resid; 5275725Sroot 5285725Sroot addr = (struct dmcdevice *)ui->ui_addr; 52917221Stef sc = &dmc_softc[unit]; 53017221Stef ifp = &sc->sc_if; 53117221Stef 53217565Skarels while (addr->bsel2 & DMC_RDYO) { 5335725Sroot 53417565Skarels cmd = addr->bsel2 & 0xff; 53517565Skarels arg = addr->sel6 & 0xffff; 53617565Skarels /* reconstruct UNIBUS address of buffer returned to us */ 53717565Skarels pkaddr = ((arg&DMC_XMEM)<<2) | (addr->sel4 & 0xffff); 53817565Skarels /* release port */ 53917565Skarels addr->bsel2 &= ~DMC_RDYO; 54017565Skarels switch (cmd & 07) { 54117565Skarels 54217565Skarels case DMC_OUR: 54317565Skarels /* 54417565Skarels * A read has completed. 54517565Skarels * Pass packet to type specific 54617565Skarels * higher-level input routine. 54717565Skarels */ 54817565Skarels ifp->if_ipackets++; 54917565Skarels /* find location in dmcuba struct */ 55017565Skarels ifrw= &sc->sc_ifuba.ifu_r[0]; 55117565Skarels for (rp = &sc->sc_rbufs[0]; rp < &sc->sc_rbufs[NRCV]; rp++) { 55217565Skarels if(rp->ubinfo == pkaddr) 55317565Skarels break; 55417565Skarels ifrw++; 55517565Skarels } 55617565Skarels if (rp >= &sc->sc_rbufs[NRCV]) 55717565Skarels panic("dmc rcv"); 55817565Skarels if ((rp->flags & DBUF_DMCS) == 0) 55917565Skarels printf("dmc%d: done unalloc rbuf\n", unit); 56017565Skarels 56117565Skarels len = (arg & DMC_CCOUNT) - sizeof (struct dmc_header); 56217565Skarels if (len < 0 || len > DMCMTU) { 56317565Skarels ifp->if_ierrors++; 56417565Skarels printd("dmc%d: bad rcv pkt addr 0x%x len 0x%x\n", 56517565Skarels unit, pkaddr, len); 56617565Skarels goto setup; 56717565Skarels } 56817565Skarels /* 56917565Skarels * Deal with trailer protocol: if type is trailer 57017565Skarels * get true type from first 16-bit word past data. 57117565Skarels * Remember that type was trailer by setting off. 57217565Skarels */ 57317565Skarels dh = (struct dmc_header *)ifrw->ifrw_addr; 57417565Skarels dh->dmc_type = ntohs((u_short)dh->dmc_type); 57517565Skarels #define dmcdataaddr(dh, off, type) ((type)(((caddr_t)((dh)+1)+(off)))) 57617565Skarels if (dh->dmc_type >= DMC_TRAILER && 57717565Skarels dh->dmc_type < DMC_TRAILER+DMC_NTRAILER) { 57817565Skarels off = (dh->dmc_type - DMC_TRAILER) * 512; 57917565Skarels if (off >= DMCMTU) 58017565Skarels goto setup; /* sanity */ 58117565Skarels dh->dmc_type = ntohs(*dmcdataaddr(dh, off, u_short *)); 58217565Skarels resid = ntohs(*(dmcdataaddr(dh, off+2, u_short *))); 58317565Skarels if (off + resid > len) 58417565Skarels goto setup; /* sanity */ 58517565Skarels len = off + resid; 58617565Skarels } else 58717565Skarels off = 0; 58817565Skarels if (len == 0) 58917565Skarels goto setup; 59017565Skarels 59117565Skarels /* 59217565Skarels * Pull packet off interface. Off is nonzero if 59317565Skarels * packet has trailing header; dmc_get will then 59417565Skarels * force this header information to be at the front, 59517565Skarels * but we still have to drop the type and length 59617565Skarels * which are at the front of any trailer data. 59717565Skarels */ 59817565Skarels m = dmc_get(&sc->sc_ifuba, ifrw, len, off); 59917565Skarels if (m == 0) 60017565Skarels goto setup; 60117565Skarels if (off) { 60217565Skarels m->m_off += 2 * sizeof (u_short); 60317565Skarels m->m_len -= 2 * sizeof (u_short); 60417565Skarels } 60517565Skarels switch (dh->dmc_type) { 60617565Skarels 6075725Sroot #ifdef INET 60817565Skarels case DMC_IPTYPE: 60917565Skarels schednetisr(NETISR_IP); 61017565Skarels inq = &ipintrq; 61117565Skarels break; 6125725Sroot #endif 61317565Skarels default: 61417565Skarels m_freem(m); 61517565Skarels goto setup; 61617565Skarels } 6175725Sroot 61817565Skarels if (IF_QFULL(inq)) { 61917565Skarels IF_DROP(inq); 62017565Skarels m_freem(m); 62117565Skarels } else 62217565Skarels IF_ENQUEUE(inq, m); 62317221Stef 62417565Skarels setup: 62517565Skarels /* is this needed? */ 62617565Skarels rp->ubinfo = ifrw->ifrw_info & 0x3ffff; 6275725Sroot 62817565Skarels dmcload(sc, DMC_READ, rp->ubinfo, 62917565Skarels ((rp->ubinfo >> 2) & DMC_XMEM) | rp->cc); 63017565Skarels break; 6315725Sroot 63217565Skarels case DMC_OUX: 63317565Skarels /* 63417565Skarels * A write has completed, start another 63517565Skarels * transfer if there is more data to send. 63617565Skarels */ 63717565Skarels ifp->if_opackets++; 63817565Skarels /* find associated dmcbuf structure */ 63917565Skarels ifxp = &sc->sc_ifuba.ifu_w[0]; 64017565Skarels for (rp = &sc->sc_xbufs[0]; rp < &sc->sc_xbufs[NXMT]; rp++) { 64117565Skarels if(rp->ubinfo == pkaddr) 64217565Skarels break; 64317565Skarels ifxp++; 64417565Skarels } 64517565Skarels if (rp >= &sc->sc_xbufs[NXMT]) { 64617565Skarels printf("dmc%d: bad packet address 0x%x\n", 64717565Skarels unit, pkaddr); 64817565Skarels break; 64917565Skarels } 65017565Skarels if ((rp->flags & DBUF_DMCS) == 0) 65117565Skarels printf("dmc%d: unallocated packet 0x%x\n", 65217565Skarels unit, pkaddr); 65317565Skarels /* mark buffer free */ 65417565Skarels if (ifxp->x_xtofree) { 65517565Skarels (void)m_freem(ifxp->x_xtofree); 65617565Skarels ifxp->x_xtofree = 0; 65717565Skarels } 65817565Skarels rp->flags &= ~DBUF_DMCS; 65917565Skarels sc->sc_oused--; 66017565Skarels sc->sc_nticks = 0; 66117565Skarels sc->sc_flag |= DMC_ACTIVE; 66217565Skarels break; 66317221Stef 66417565Skarels case DMC_CNTLO: 66517565Skarels arg &= DMC_CNTMASK; 66617565Skarels if (arg & DMC_FATAL) { 66717565Skarels printd("dmc%d: fatal error, flags=%b\n", 66817565Skarels unit, arg, CNTLO_BITS); 66917565Skarels dmcrestart(unit); 67017565Skarels break; 67117565Skarels } 67217565Skarels /* ACCUMULATE STATISTICS */ 67317221Stef switch(arg) { 67417221Stef case DMC_NOBUFS: 67517565Skarels ifp->if_ierrors++; 67617565Skarels if ((sc->sc_nobuf++ % DMC_RPNBFS) == 0) 67717565Skarels goto report; 67817565Skarels break; 67917221Stef case DMC_DISCONN: 68017565Skarels if ((sc->sc_disc++ % DMC_RPDSC) == 0) 68117565Skarels goto report; 68217565Skarels break; 68317221Stef case DMC_TIMEOUT: 68417565Skarels if ((sc->sc_timeo++ % DMC_RPTMO) == 0) 68517565Skarels goto report; 68617565Skarels break; 68717221Stef case DMC_DATACK: 68817565Skarels ifp->if_oerrors++; 68917565Skarels if ((sc->sc_datck++ % DMC_RPDCK) == 0) 69017565Skarels goto report; 69117565Skarels break; 69217221Stef default: 69317221Stef goto report; 69417221Stef } 69517221Stef break; 69617221Stef report: 69717565Skarels printd("dmc%d: soft error, flags=%b\n", unit, 69817565Skarels arg, CNTLO_BITS); 69917565Skarels if ((sc->sc_flag & DMC_RESTART) == 0) { 70017565Skarels /* 70117565Skarels * kill off the dmc to get things 70217565Skarels * going again by generating a 70317565Skarels * procedure error 70417565Skarels */ 70517565Skarels sc->sc_flag |= DMC_RESTART; 70617565Skarels arg = sc->sc_ubinfo & 0x3ffff; 70717565Skarels dmcload(sc, DMC_BASEI, arg, (arg>>2)&DMC_XMEM); 70817565Skarels } 70917565Skarels break; 71017565Skarels 71117565Skarels default: 71217565Skarels printf("dmc%d: bad control %o\n", unit, cmd); 71317565Skarels break; 7145725Sroot } 7155725Sroot } 71617565Skarels dmcstart(unit); 71717221Stef return; 7185725Sroot } 7195725Sroot 7205725Sroot /* 7215725Sroot * DMC output routine. 72217565Skarels * Encapsulate a packet of type family for the dmc. 72317565Skarels * Use trailer local net encapsulation if enough data in first 72417565Skarels * packet leaves a multiple of 512 bytes of data in remainder. 7255725Sroot */ 72617565Skarels dmcoutput(ifp, m0, dst) 7275725Sroot register struct ifnet *ifp; 72817565Skarels register struct mbuf *m0; 7296334Ssam struct sockaddr *dst; 7305725Sroot { 73117565Skarels int type, error, s; 73217565Skarels register struct mbuf *m = m0; 73317565Skarels register struct dmc_header *dh; 73417565Skarels register int off; 7355725Sroot 73617565Skarels switch (dst->sa_family) { 73717565Skarels #ifdef INET 73817565Skarels case AF_INET: 73917565Skarels off = ntohs((u_short)mtod(m, struct ip *)->ip_len) - m->m_len; 74017565Skarels if ((ifp->if_flags & IFF_NOTRAILERS) == 0) 74117565Skarels if (off > 0 && (off & 0x1ff) == 0 && 74217565Skarels m->m_off >= MMINOFF + 2 * sizeof (u_short)) { 74317565Skarels type = DMC_TRAILER + (off>>9); 74417565Skarels m->m_off -= 2 * sizeof (u_short); 74517565Skarels m->m_len += 2 * sizeof (u_short); 74617565Skarels *mtod(m, u_short *) = htons((u_short)DMC_IPTYPE); 74717565Skarels *(mtod(m, u_short *) + 1) = htons((u_short)m->m_len); 74817565Skarels goto gottrailertype; 74917565Skarels } 75017565Skarels type = DMC_IPTYPE; 75117565Skarels off = 0; 75217565Skarels goto gottype; 75317565Skarels #endif 75417565Skarels 75517565Skarels case AF_UNSPEC: 75617565Skarels dh = (struct dmc_header *)dst->sa_data; 75717565Skarels type = dh->dmc_type; 75817565Skarels goto gottype; 75917565Skarels 76017565Skarels default: 76117565Skarels printf("dmc%d: can't handle af%d\n", ifp->if_unit, 76217565Skarels dst->sa_family); 76317565Skarels error = EAFNOSUPPORT; 76417565Skarels goto bad; 7655725Sroot } 76617565Skarels 76717565Skarels gottrailertype: 76817565Skarels /* 76917565Skarels * Packet to be sent as a trailer; move first packet 77017565Skarels * (control information) to end of chain. 77117565Skarels */ 77217565Skarels while (m->m_next) 77317565Skarels m = m->m_next; 77417565Skarels m->m_next = m0; 77517565Skarels m = m0->m_next; 77617565Skarels m0->m_next = 0; 77717565Skarels m0 = m; 77817565Skarels 77917565Skarels gottype: 78017565Skarels /* 78117565Skarels * Add local network header 78217565Skarels * (there is space for a uba on a vax to step on) 78317565Skarels */ 78417565Skarels if (m->m_off > MMAXOFF || 78517565Skarels MMINOFF + sizeof(struct dmc_header) > m->m_off) { 78617565Skarels m = m_get(M_DONTWAIT, MT_HEADER); 78717565Skarels if (m == 0) { 78817565Skarels error = ENOBUFS; 78917565Skarels goto bad; 79017565Skarels } 79117565Skarels m->m_next = m0; 79217565Skarels m->m_off = MMINOFF; 79317565Skarels m->m_len = sizeof (struct dmc_header); 79417565Skarels } else { 79517565Skarels m->m_off -= sizeof (struct dmc_header); 79617565Skarels m->m_len += sizeof (struct dmc_header); 79717565Skarels } 79817565Skarels dh = mtod(m, struct dmc_header *); 79917565Skarels dh->dmc_type = htons((u_short)type); 80017565Skarels 80117565Skarels /* 80217565Skarels * Queue message on interface, and start output if interface 80317565Skarels * not yet active. 80417565Skarels */ 80517565Skarels s = splimp(); 8066207Swnj if (IF_QFULL(&ifp->if_snd)) { 8076207Swnj IF_DROP(&ifp->if_snd); 8086334Ssam m_freem(m); 8096207Swnj splx(s); 8106502Ssam return (ENOBUFS); 8116207Swnj } 8125725Sroot IF_ENQUEUE(&ifp->if_snd, m); 81317221Stef dmcstart(ifp->if_unit); 8145725Sroot splx(s); 8156502Ssam return (0); 81617565Skarels 81717565Skarels bad: 81817565Skarels m_freem(m0); 81917565Skarels return (error); 8205725Sroot } 82113061Ssam 82217565Skarels 82313061Ssam /* 82413061Ssam * Process an ioctl request. 82513061Ssam */ 82613061Ssam dmcioctl(ifp, cmd, data) 82713061Ssam register struct ifnet *ifp; 82813061Ssam int cmd; 82913061Ssam caddr_t data; 83013061Ssam { 83113061Ssam int s = splimp(), error = 0; 83213061Ssam 83313061Ssam switch (cmd) { 83413061Ssam 83513061Ssam case SIOCSIFADDR: 83617221Stef ifp->if_flags |= IFF_UP; 837*19862Skarels if ((ifp->if_flags & IFF_RUNNING) == 0) 838*19862Skarels dmcinit(ifp->if_unit); 83913061Ssam break; 84013061Ssam 84113061Ssam case SIOCSIFDSTADDR: 842*19862Skarels if ((ifp->if_flags & IFF_RUNNING) == 0) 843*19862Skarels dmcinit(ifp->if_unit); 84413061Ssam break; 84517221Stef 84613061Ssam default: 84713061Ssam error = EINVAL; 84813061Ssam } 84913061Ssam splx(s); 85013061Ssam return (error); 85113061Ssam } 85217221Stef 85317565Skarels 85417221Stef /* 85517221Stef * Routines supporting UNIBUS network interfaces. 85617221Stef */ 85717221Stef 85817221Stef /* 85917221Stef * Init UNIBUS for interface on uban whose headers of size hlen are to 86017221Stef * end on a page boundary. We allocate a UNIBUS map register for the page 86117221Stef * with the header, and nmr more UNIBUS map registers for i/o on the adapter, 86217221Stef * doing this for each receive and transmit buffer. We also 86317221Stef * allocate page frames in the mbuffer pool for these pages. 86417221Stef */ 86517221Stef dmc_ubainit(ifu, uban, hlen, nmr) 86617221Stef register struct dmcuba *ifu; 86717221Stef int uban, hlen, nmr; 86817221Stef { 86917221Stef register caddr_t cp, dp; 87017221Stef register struct ifrw *ifrw; 87117221Stef register struct ifxmt *ifxp; 87217221Stef int i, ncl; 87317221Stef 87417221Stef ncl = clrnd(nmr + CLSIZE) / CLSIZE; 87517565Skarels if (ifu->ifu_r[0].ifrw_addr) 87617221Stef /* 87717221Stef * If the first read buffer has a non-zero 87817221Stef * address, it means we have already allocated core 87917221Stef */ 88017221Stef cp = ifu->ifu_r[0].ifrw_addr - (CLBYTES - hlen); 88117565Skarels else { 88217221Stef cp = m_clalloc(NTOT * ncl, MPG_SPACE); 88317221Stef if (cp == 0) 88417221Stef return (0); 88517221Stef ifu->ifu_hlen = hlen; 88617221Stef ifu->ifu_uban = uban; 88717221Stef ifu->ifu_uba = uba_hd[uban].uh_uba; 88817221Stef dp = cp + CLBYTES - hlen; 88917221Stef for (ifrw = ifu->ifu_r; ifrw < &ifu->ifu_r[NRCV]; ifrw++) { 89017221Stef ifrw->ifrw_addr = dp; 89117221Stef dp += ncl * CLBYTES; 89217221Stef } 89317221Stef for (ifxp = ifu->ifu_w; ifxp < &ifu->ifu_w[NXMT]; ifxp++) { 89417221Stef ifxp->x_ifrw.ifrw_addr = dp; 89517221Stef dp += ncl * CLBYTES; 89617221Stef } 89717221Stef } 89817221Stef /* allocate for receive ring */ 89917221Stef for (ifrw = ifu->ifu_r; ifrw < &ifu->ifu_r[NRCV]; ifrw++) { 90017221Stef if (dmc_ubaalloc(ifu, ifrw, nmr) == 0) { 90117221Stef struct ifrw *rw; 90217221Stef 90317221Stef for (rw = ifu->ifu_r; rw < ifrw; rw++) 90417221Stef ubarelse(ifu->ifu_uban, &rw->ifrw_info); 90517221Stef goto bad; 90617221Stef } 90717221Stef } 90817221Stef /* and now transmit ring */ 90917221Stef for (ifxp = ifu->ifu_w; ifxp < &ifu->ifu_w[NXMT]; ifxp++) { 91017221Stef ifrw = &ifxp->x_ifrw; 91117221Stef if (dmc_ubaalloc(ifu, ifrw, nmr) == 0) { 91217221Stef struct ifxmt *xp; 91317221Stef 91417221Stef for (xp = ifu->ifu_w; xp < ifxp; xp++) 91517221Stef ubarelse(ifu->ifu_uban, &xp->x_ifrw.ifrw_info); 91617221Stef for (ifrw = ifu->ifu_r; ifrw < &ifu->ifu_r[NRCV]; ifrw++) 91717221Stef ubarelse(ifu->ifu_uban, &ifrw->ifrw_info); 91817221Stef goto bad; 91917221Stef } 92017221Stef for (i = 0; i < nmr; i++) 92117221Stef ifxp->x_map[i] = ifrw->ifrw_mr[i]; 92217221Stef ifxp->x_xswapd = 0; 92317221Stef } 92417221Stef return (1); 92517221Stef bad: 92617221Stef m_pgfree(cp, NTOT * ncl); 92717221Stef ifu->ifu_r[0].ifrw_addr = 0; 92817221Stef return (0); 92917221Stef } 93017221Stef 93117221Stef /* 93217221Stef * Setup either a ifrw structure by allocating UNIBUS map registers, 93317221Stef * possibly a buffered data path, and initializing the fields of 93417221Stef * the ifrw structure to minimize run-time overhead. 93517221Stef */ 93617221Stef static 93717221Stef dmc_ubaalloc(ifu, ifrw, nmr) 93817221Stef struct dmcuba *ifu; 93917221Stef register struct ifrw *ifrw; 94017221Stef int nmr; 94117221Stef { 94217221Stef register int info; 94317221Stef 94417221Stef info = 94517221Stef uballoc(ifu->ifu_uban, ifrw->ifrw_addr, nmr*NBPG + ifu->ifu_hlen, 94617221Stef ifu->ifu_flags); 94717221Stef if (info == 0) 94817221Stef return (0); 94917221Stef ifrw->ifrw_info = info; 95017221Stef ifrw->ifrw_bdp = UBAI_BDP(info); 95117221Stef ifrw->ifrw_proto = UBAMR_MRV | (UBAI_BDP(info) << UBAMR_DPSHIFT); 95217221Stef ifrw->ifrw_mr = &ifu->ifu_uba->uba_map[UBAI_MR(info) + 1]; 95317221Stef return (1); 95417221Stef } 95517221Stef 95617221Stef /* 95717221Stef * Pull read data off a interface. 95817221Stef * Len is length of data, with local net header stripped. 95917221Stef * Off is non-zero if a trailer protocol was used, and 96017221Stef * gives the offset of the trailer information. 96117221Stef * We copy the trailer information and then all the normal 96217221Stef * data into mbufs. When full cluster sized units are present 96317221Stef * on the interface on cluster boundaries we can get them more 96417221Stef * easily by remapping, and take advantage of this here. 96517221Stef */ 96617221Stef struct mbuf * 96717221Stef dmc_get(ifu, ifrw, totlen, off0) 96817221Stef register struct dmcuba *ifu; 96917221Stef register struct ifrw *ifrw; 97017221Stef int totlen, off0; 97117221Stef { 97217221Stef struct mbuf *top, **mp, *m; 97317221Stef int off = off0, len; 97417221Stef register caddr_t cp = ifrw->ifrw_addr + ifu->ifu_hlen; 97517221Stef 97617221Stef top = 0; 97717221Stef mp = ⊤ 97817221Stef while (totlen > 0) { 97917221Stef MGET(m, M_DONTWAIT, MT_DATA); 98017221Stef if (m == 0) 98117221Stef goto bad; 98217221Stef if (off) { 98317221Stef len = totlen - off; 98417221Stef cp = ifrw->ifrw_addr + ifu->ifu_hlen + off; 98517221Stef } else 98617221Stef len = totlen; 98717221Stef if (len >= CLBYTES) { 98817221Stef struct mbuf *p; 98917221Stef struct pte *cpte, *ppte; 99017221Stef int x, *ip, i; 99117221Stef 99217221Stef MCLGET(p, 1); 99317221Stef if (p == 0) 99417221Stef goto nopage; 99517221Stef len = m->m_len = CLBYTES; 99617221Stef m->m_off = (int)p - (int)m; 99717221Stef if (!claligned(cp)) 99817221Stef goto copy; 99917221Stef 100017221Stef /* 100117221Stef * Switch pages mapped to UNIBUS with new page p, 100217221Stef * as quick form of copy. Remap UNIBUS and invalidate. 100317221Stef */ 100417221Stef cpte = &Mbmap[mtocl(cp)*CLSIZE]; 100517221Stef ppte = &Mbmap[mtocl(p)*CLSIZE]; 100617221Stef x = btop(cp - ifrw->ifrw_addr); 100717221Stef ip = (int *)&ifrw->ifrw_mr[x]; 100817221Stef for (i = 0; i < CLSIZE; i++) { 100917221Stef struct pte t; 101017221Stef t = *ppte; *ppte++ = *cpte; *cpte = t; 101117221Stef *ip++ = 101217221Stef cpte++->pg_pfnum|ifrw->ifrw_proto; 101317221Stef mtpr(TBIS, cp); 101417221Stef cp += NBPG; 101517221Stef mtpr(TBIS, (caddr_t)p); 101617221Stef p += NBPG / sizeof (*p); 101717221Stef } 101817221Stef goto nocopy; 101917221Stef } 102017221Stef nopage: 102117221Stef m->m_len = MIN(MLEN, len); 102217221Stef m->m_off = MMINOFF; 102317221Stef copy: 102417221Stef bcopy(cp, mtod(m, caddr_t), (unsigned)m->m_len); 102517221Stef cp += m->m_len; 102617221Stef nocopy: 102717221Stef *mp = m; 102817221Stef mp = &m->m_next; 102917221Stef if (off) { 103017221Stef /* sort of an ALGOL-W style for statement... */ 103117221Stef off += m->m_len; 103217221Stef if (off == totlen) { 103317221Stef cp = ifrw->ifrw_addr + ifu->ifu_hlen; 103417221Stef off = 0; 103517221Stef totlen = off0; 103617221Stef } 103717221Stef } else 103817221Stef totlen -= m->m_len; 103917221Stef } 104017221Stef return (top); 104117221Stef bad: 104217221Stef m_freem(top); 104317221Stef return (0); 104417221Stef } 104517221Stef 104617221Stef /* 104717221Stef * Map a chain of mbufs onto a network interface 104817221Stef * in preparation for an i/o operation. 104917221Stef * The argument chain of mbufs includes the local network 105017221Stef * header which is copied to be in the mapped, aligned 105117221Stef * i/o space. 105217221Stef */ 105317221Stef dmcput(ifu, n, m) 105417221Stef struct dmcuba *ifu; 105517221Stef int n; 105617221Stef register struct mbuf *m; 105717221Stef { 105817221Stef register struct mbuf *mp; 105917221Stef register caddr_t cp; 106017221Stef register struct ifxmt *ifxp; 106117221Stef register struct ifrw *ifrw; 106217221Stef register int i; 106317221Stef int xswapd = 0; 106417221Stef int x, cc, t; 106517221Stef caddr_t dp; 106617221Stef 106717221Stef ifxp = &ifu->ifu_w[n]; 106817221Stef ifrw = &ifxp->x_ifrw; 106917221Stef cp = ifrw->ifrw_addr; 107017221Stef while (m) { 107117221Stef dp = mtod(m, char *); 107217221Stef if (claligned(cp) && claligned(dp) && m->m_len == CLBYTES) { 107317221Stef struct pte *pte; int *ip; 107417221Stef pte = &Mbmap[mtocl(dp)*CLSIZE]; 107517221Stef x = btop(cp - ifrw->ifrw_addr); 107617221Stef ip = (int *)&ifrw->ifrw_mr[x]; 107717221Stef for (i = 0; i < CLSIZE; i++) 107817221Stef *ip++ = ifrw->ifrw_proto | pte++->pg_pfnum; 107917221Stef xswapd |= 1 << (x>>(CLSHIFT-PGSHIFT)); 108017221Stef mp = m->m_next; 108117221Stef m->m_next = ifxp->x_xtofree; 108217221Stef ifxp->x_xtofree = m; 108317221Stef cp += m->m_len; 108417221Stef } else { 108517221Stef bcopy(mtod(m, caddr_t), cp, (unsigned)m->m_len); 108617221Stef cp += m->m_len; 108717221Stef MFREE(m, mp); 108817221Stef } 108917221Stef m = mp; 109017221Stef } 109117221Stef 109217221Stef /* 109317221Stef * Xswapd is the set of clusters we just mapped out. Ifxp->x_xswapd 109417221Stef * is the set of clusters mapped out from before. We compute 109517221Stef * the number of clusters involved in this operation in x. 109617221Stef * Clusters mapped out before and involved in this operation 109717221Stef * should be unmapped so original pages will be accessed by the device. 109817221Stef */ 109917221Stef cc = cp - ifrw->ifrw_addr; 110017221Stef x = ((cc - ifu->ifu_hlen) + CLBYTES - 1) >> CLSHIFT; 110117221Stef ifxp->x_xswapd &= ~xswapd; 110217221Stef while (i = ffs(ifxp->x_xswapd)) { 110317221Stef i--; 110417221Stef if (i >= x) 110517221Stef break; 110617221Stef ifxp->x_xswapd &= ~(1<<i); 110717221Stef i *= CLSIZE; 110817221Stef for (t = 0; t < CLSIZE; t++) { 110917221Stef ifrw->ifrw_mr[i] = ifxp->x_map[i]; 111017221Stef i++; 111117221Stef } 111217221Stef } 111317221Stef ifxp->x_xswapd |= xswapd; 111417221Stef return (cc); 111517221Stef } 111617565Skarels 111717565Skarels /* 111817565Skarels * Restart after a fatal error. 111917565Skarels * Clear device and reinitialize. 112017565Skarels */ 112117565Skarels dmcrestart(unit) 112217565Skarels int unit; 112317565Skarels { 112417565Skarels register struct dmc_softc *sc = &dmc_softc[unit]; 112517565Skarels register struct uba_device *ui = dmcinfo[unit]; 112617565Skarels register struct dmcdevice *addr; 112717565Skarels register struct ifxmt *ifxp; 112817565Skarels register int i; 112917565Skarels register struct mbuf *m; 113017565Skarels struct dmcuba *ifu; 113117565Skarels 113217565Skarels addr = (struct dmcdevice *)ui->ui_addr; 113317565Skarels ifu = &sc->sc_ifuba; 113417565Skarels #ifdef DEBUG 113517565Skarels /* dump base table */ 113617565Skarels printf("dmc%d base table:\n", unit); 113717565Skarels for (i = 0; i < sizeof (struct dmc_base); i++) 113817565Skarels printf("%o\n" ,dmc_base[unit].d_base[i]); 113913085Ssam #endif 114017565Skarels /* 114117565Skarels * Let the DMR finish the MCLR. At 1 Mbit, it should do so 114217565Skarels * in about a max of 6.4 milliseconds with diagnostics enabled. 114317565Skarels */ 114417565Skarels addr->bsel1 = DMC_MCLR; 114517565Skarels for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 114617565Skarels ; 114717565Skarels /* Did the timer expire or did the DMR finish? */ 114817565Skarels if ((addr->bsel1 & DMC_RUN) == 0) { 114917565Skarels printf("dmc%d: M820 Test Failed\n", unit); 115017565Skarels return; 115117565Skarels } 115217565Skarels 115317565Skarels #ifdef notdef /* tef sez why throw these packets away??? */ 115417565Skarels /* purge send queue */ 115517565Skarels IF_DEQUEUE(&sc->sc_if.if_snd, m); 115617565Skarels while (m) { 115717565Skarels m_freem(m); 115817565Skarels IF_DEQUEUE(&sc->sc_if.if_snd, m); 115917565Skarels } 116017565Skarels #endif 116117565Skarels for (ifxp = ifu->ifu_w; ifxp < &ifu->ifu_w[NXMT]; ifxp++) { 116217565Skarels if (ifxp->x_xtofree) { 116317565Skarels (void) m_freem(ifxp->x_xtofree); 116417565Skarels ifxp->x_xtofree = 0; 116517565Skarels } 116617565Skarels } 116717565Skarels 116817565Skarels /* restart DMC */ 116917565Skarels dmcinit(unit); 117017565Skarels sc->sc_flag &= ~DMC_RESTART; 117117565Skarels sc->sc_if.if_collisions++; /* why not? */ 117217565Skarels } 117317565Skarels 117417565Skarels /* 117517565Skarels * Check to see that transmitted packets don't 117617565Skarels * lose interrupts. The device has to be active. 117717565Skarels */ 117817565Skarels dmcwatch() 117917565Skarels { 118017565Skarels register struct uba_device *ui; 118117565Skarels register struct dmc_softc *sc; 118217565Skarels struct dmcdevice *addr; 118317565Skarels register int i; 118417565Skarels 118517565Skarels for (i = 0; i < NDMC; i++) { 118617565Skarels sc = &dmc_softc[i]; 118717565Skarels if ((sc->sc_flag & DMC_ACTIVE) == 0) 118817565Skarels continue; 118917565Skarels if ((ui = dmcinfo[i]) == 0 || ui->ui_alive == 0) 119017565Skarels continue; 119117565Skarels if (sc->sc_oused) { 119217565Skarels sc->sc_nticks++; 119317565Skarels if (sc->sc_nticks > dmc_timeout) { 119417565Skarels sc->sc_nticks = 0; 119517565Skarels addr = (struct dmcdevice *)ui->ui_addr; 119617565Skarels printd("dmc%d hung: bsel0=%b bsel2=%b\n", i, 119717565Skarels addr->bsel0 & 0xff, DMC0BITS, 119817565Skarels addr->bsel2 & 0xff, DMC2BITS); 119917565Skarels dmcrestart(i); 120017565Skarels } 120117565Skarels } 120217565Skarels } 120317565Skarels timeout(dmcwatch, (caddr_t) 0, hz); 120417565Skarels } 120517565Skarels #endif 1206