1*11191Ssam /* if_dmc.c 4.24 83/02/20 */ 25725Sroot 35725Sroot #include "dmc.h" 45725Sroot #if NDMC > 0 55725Sroot #define printd if(dmcdebug)printf 611189Ssam int dmcdebug = 0; 75725Sroot /* 85725Sroot * DMC11 device driver, internet version 95725Sroot * 105725Sroot * TODO 115725Sroot * allow more than one outstanding read or write. 12*11191Ssam * 13*11191Ssam * UNTESTED WITH 4.1C 145725Sroot */ 159794Ssam #include "../machine/pte.h" 165725Sroot 175725Sroot #include "../h/param.h" 185725Sroot #include "../h/systm.h" 195725Sroot #include "../h/mbuf.h" 205725Sroot #include "../h/buf.h" 215725Sroot #include "../h/tty.h" 225725Sroot #include "../h/protosw.h" 235725Sroot #include "../h/socket.h" 245725Sroot #include "../h/vmmac.h" 258460Sroot #include <errno.h> 268460Sroot 278460Sroot #include "../net/if.h" 289176Ssam #include "../net/netisr.h" 298460Sroot #include "../net/route.h" 308416Swnj #include "../netinet/in.h" 318416Swnj #include "../netinet/in_systm.h" 328460Sroot 338460Sroot #include "../vax/cpu.h" 348460Sroot #include "../vax/mtpr.h" 358416Swnj #include "../vaxif/if_uba.h" 368416Swnj #include "../vaxif/if_dmc.h" 378460Sroot #include "../vaxuba/ubareg.h" 388460Sroot #include "../vaxuba/ubavar.h" 395725Sroot 4011189Ssam #ifndef DMC_USEMAINT 4111189Ssam #define DMC_USEMAINT 1 /* use maintenance mode */ 4211189Ssam #endif 4311189Ssam 445725Sroot /* 455725Sroot * Driver information for auto-configuration stuff. 465725Sroot */ 475725Sroot int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset(); 485725Sroot struct uba_device *dmcinfo[NDMC]; 495725Sroot u_short dmcstd[] = { 0 }; 505725Sroot struct uba_driver dmcdriver = 515725Sroot { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo }; 525725Sroot 536334Ssam #define DMC_AF 0xff /* 8 bits of address type in ui_flags */ 547161Ssam #define DMC_NET 0xffffff00 /* 24 bits of net number in ui_flags */ 555725Sroot 565725Sroot /* 575725Sroot * DMC software status per interface. 585725Sroot * 595725Sroot * Each interface is referenced by a network interface structure, 605725Sroot * sc_if, which the routing code uses to locate the interface. 615725Sroot * This structure contains the output queue for the interface, its address, ... 625725Sroot * We also have, for each interface, a UBA interface structure, which 635725Sroot * contains information about the UNIBUS resources held by the interface: 645725Sroot * map registers, buffered data paths, etc. Information is cached in this 655725Sroot * structure for use by the if_uba.c routines in running the interface 665725Sroot * efficiently. 675725Sroot */ 685725Sroot struct dmc_softc { 695725Sroot struct ifnet sc_if; /* network-visible interface */ 705725Sroot struct ifuba sc_ifuba; /* UNIBUS resources */ 715725Sroot short sc_flag; /* flags */ 725725Sroot short sc_oactive; /* output active */ 735725Sroot int sc_ubinfo; /* UBA mapping info for base table */ 745725Sroot struct clist sc_que; /* command queue */ 755725Sroot } dmc_softc[NDMC]; 765725Sroot 775725Sroot /* flags */ 785725Sroot #define DMCRUN 01 795725Sroot #define DMCBMAPPED 02 /* base table mapped */ 805725Sroot 815725Sroot struct dmc_base { 825725Sroot short d_base[128]; /* DMC base table */ 835725Sroot } dmc_base[NDMC]; 845725Sroot 855725Sroot #define loword(x) ((short *)&x)[0] 865725Sroot #define hiword(x) ((short *)&x)[1] 875725Sroot 885725Sroot dmcprobe(reg) 895725Sroot caddr_t reg; 905725Sroot { 915725Sroot register int br, cvec; 925725Sroot register struct dmcdevice *addr = (struct dmcdevice *)reg; 935725Sroot register int i; 945725Sroot 955725Sroot #ifdef lint 965725Sroot br = 0; cvec = br; br = cvec; 975725Sroot dmcrint(0); dmcxint(0); 985725Sroot #endif 995725Sroot addr->bsel1 = DMC_MCLR; 1005725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 1015725Sroot ; 1025725Sroot if ((addr->bsel1 & DMC_RUN) == 0) 1036334Ssam return (0); 1045725Sroot addr->bsel1 &= ~DMC_MCLR; 1055725Sroot addr->bsel0 = DMC_RQI|DMC_IEI; 1065725Sroot DELAY(100000); 1075725Sroot addr->bsel1 = DMC_MCLR; 1085725Sroot for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--) 1095725Sroot ; 1106575Ssam #ifdef ECHACK 1116575Ssam br = 0x16; 1126575Ssam #endif 1136334Ssam return (1); 1145725Sroot } 1155725Sroot 1165725Sroot /* 1175725Sroot * Interface exists: make available by filling in network interface 1185725Sroot * record. System will initialize the interface when it is ready 1195725Sroot * to accept packets. 1205725Sroot */ 1215725Sroot dmcattach(ui) 1225725Sroot register struct uba_device *ui; 1235725Sroot { 1245725Sroot register struct dmc_softc *sc = &dmc_softc[ui->ui_unit]; 1256334Ssam register struct sockaddr_in *sin; 1265725Sroot 1275725Sroot sc->sc_if.if_unit = ui->ui_unit; 1285725Sroot sc->sc_if.if_name = "dmc"; 1295725Sroot sc->sc_if.if_mtu = DMCMTU; 1305725Sroot sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8; 1315725Sroot sc->sc_if.if_host[0] = 17; /* random number */ 1326334Ssam sin = (struct sockaddr_in *)&sc->sc_if.if_addr; 1336587Ssam sin->sin_family = AF_INET; 1346334Ssam sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]); 1355725Sroot sc->sc_if.if_init = dmcinit; 1365725Sroot sc->sc_if.if_output = dmcoutput; 1378976Sroot sc->sc_if.if_reset = dmcreset; 1386587Ssam /* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */ 1396587Ssam sc->sc_ifuba.ifu_flags = UBA_NEEDBDP | UBA_CANTWAIT; 1405725Sroot if_attach(&sc->sc_if); 1415725Sroot } 1425725Sroot 1435725Sroot /* 1445725Sroot * Reset of interface after UNIBUS reset. 1455725Sroot * If interface is on specified UBA, reset it's state. 1465725Sroot */ 1475725Sroot dmcreset(unit, uban) 1485725Sroot int unit, uban; 1495725Sroot { 1505725Sroot register struct uba_device *ui; 1515725Sroot 1525725Sroot if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 || 1535725Sroot ui->ui_ubanum != uban) 1545725Sroot return; 1555725Sroot printf(" dmc%d", unit); 1565725Sroot dmcinit(unit); 1575725Sroot } 1585725Sroot 1595725Sroot /* 1605725Sroot * Initialization of interface; reinitialize UNIBUS usage. 1615725Sroot */ 1625725Sroot dmcinit(unit) 1635725Sroot int unit; 1645725Sroot { 1655725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 1665725Sroot register struct uba_device *ui = dmcinfo[unit]; 1675725Sroot register struct dmcdevice *addr; 1685725Sroot int base; 1695725Sroot 1705725Sroot printd("dmcinit\n"); 1715725Sroot if ((sc->sc_flag&DMCBMAPPED) == 0) { 1725725Sroot sc->sc_ubinfo = uballoc(ui->ui_ubanum, 1735725Sroot (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0); 1745725Sroot sc->sc_flag |= DMCBMAPPED; 1755725Sroot } 1765725Sroot if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0, 1775768Sroot (int)btoc(DMCMTU)) == 0) { 1785725Sroot printf("dmc%d: can't initialize\n", unit); 1796334Ssam sc->sc_if.if_flags &= ~IFF_UP; 1805725Sroot return; 1815725Sroot } 1825725Sroot addr = (struct dmcdevice *)ui->ui_addr; 1835725Sroot addr->bsel2 |= DMC_IEO; 1845725Sroot base = sc->sc_ubinfo & 0x3ffff; 1855725Sroot printd(" base 0x%x\n", base); 1865725Sroot dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM); 18711189Ssam dmcload(sc, DMC_CNTLI, 0, DMC_USEMAINT ? DMC_MAINT : 0); 1885725Sroot base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 1895725Sroot dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU); 1905725Sroot printd(" first read queued, addr 0x%x\n", base); 1916334Ssam sc->sc_if.if_flags |= IFF_UP; 1926363Ssam /* set up routing table entry */ 1936363Ssam if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) { 1947150Swnj rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr, RTF_HOST|RTF_UP); 1956363Ssam sc->sc_if.if_flags |= IFF_ROUTE; 1966363Ssam } 1975725Sroot } 1985725Sroot 1995725Sroot /* 2005725Sroot * Start output on interface. Get another datagram 2015725Sroot * to send from the interface queue and map it to 2025725Sroot * the interface before starting output. 2035725Sroot */ 2045725Sroot dmcstart(dev) 2055725Sroot dev_t dev; 2065725Sroot { 2075725Sroot int unit = minor(dev); 2085725Sroot struct uba_device *ui = dmcinfo[unit]; 2095725Sroot register struct dmc_softc *sc = &dmc_softc[unit]; 2105725Sroot int addr, len; 2115725Sroot struct mbuf *m; 2125725Sroot 2135725Sroot printd("dmcstart\n"); 2145725Sroot /* 2155725Sroot * Dequeue a request and map it to the UNIBUS. 2165725Sroot * If no more requests, just return. 2175725Sroot */ 2185725Sroot IF_DEQUEUE(&sc->sc_if.if_snd, m); 2195725Sroot if (m == 0) 2205725Sroot return; 2215725Sroot len = if_wubaput(&sc->sc_ifuba, m); 2225725Sroot 2235725Sroot /* 2245725Sroot * Have request mapped to UNIBUS for transmission. 2255725Sroot * Purge any stale data from this BDP and start the output. 2265725Sroot */ 2276587Ssam if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 2285853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp); 2295725Sroot addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff; 2305725Sroot printd(" len %d, addr 0x%x, ", len, addr); 2315725Sroot printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]); 2325725Sroot dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM)); 2335725Sroot sc->sc_oactive = 1; 2345725Sroot } 2355725Sroot 2365725Sroot /* 2375725Sroot * Utility routine to load the DMC device registers. 2385725Sroot */ 2395725Sroot dmcload(sc, type, w0, w1) 2405725Sroot register struct dmc_softc *sc; 2415725Sroot int type, w0, w1; 2425725Sroot { 2435725Sroot register struct dmcdevice *addr; 2445725Sroot register int unit, sps, n; 2455725Sroot 2465725Sroot printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1); 2475725Sroot unit = sc - dmc_softc; 2485725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2495725Sroot sps = spl5(); 2505725Sroot if ((n = sc->sc_que.c_cc) == 0) 2515725Sroot addr->bsel0 = type | DMC_RQI; 2525725Sroot else 2536159Ssam (void) putc(type | DMC_RQI, &sc->sc_que); 2546159Ssam (void) putw(w0, &sc->sc_que); 2556159Ssam (void) putw(w1, &sc->sc_que); 2565725Sroot if (n == 0) 2575725Sroot dmcrint(unit); 2585725Sroot splx(sps); 2595725Sroot } 2605725Sroot 2615725Sroot /* 2625725Sroot * DMC interface receiver interrupt. 2635725Sroot * Ready to accept another command, 2645725Sroot * pull one off the command queue. 2655725Sroot */ 2665725Sroot dmcrint(unit) 2675725Sroot int unit; 2685725Sroot { 2695725Sroot register struct dmc_softc *sc; 2705725Sroot register struct dmcdevice *addr; 2715725Sroot register int n; 2725725Sroot 2735725Sroot addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr; 2745725Sroot sc = &dmc_softc[unit]; 2755725Sroot while (addr->bsel0&DMC_RDYI) { 2765725Sroot addr->sel4 = getw(&sc->sc_que); 2775725Sroot addr->sel6 = getw(&sc->sc_que); 2785725Sroot addr->bsel0 &= ~(DMC_IEI|DMC_RQI); 2795725Sroot while (addr->bsel0&DMC_RDYI) 2805725Sroot ; 2815725Sroot if (sc->sc_que.c_cc == 0) 28211189Ssam goto out; 2835725Sroot addr->bsel0 = getc(&sc->sc_que); 2845725Sroot n = RDYSCAN; 2855725Sroot while (n-- && (addr->bsel0&DMC_RDYI) == 0) 2865725Sroot ; 2875725Sroot } 2885725Sroot if (sc->sc_que.c_cc) 2895725Sroot addr->bsel0 |= DMC_IEI; 29011189Ssam out: 29111189Ssam dmxint(unit); 2925725Sroot } 2935725Sroot 2945725Sroot /* 2955725Sroot * DMC interface transmitter interrupt. 2965725Sroot * A transfer has completed, check for errors. 2975725Sroot * If it was a read, notify appropriate protocol. 2985725Sroot * If it was a write, pull the next one off the queue. 2995725Sroot */ 3005725Sroot dmcxint(unit) 3015725Sroot int unit; 3025725Sroot { 3035725Sroot register struct dmc_softc *sc; 3045725Sroot struct uba_device *ui = dmcinfo[unit]; 3055725Sroot struct dmcdevice *addr; 3065725Sroot struct mbuf *m; 3075725Sroot register struct ifqueue *inq; 30811189Ssam int arg, arg2, cmd, len; 3095725Sroot 3105725Sroot addr = (struct dmcdevice *)ui->ui_addr; 31111189Ssam cmd = addr->bsel2 & 0xff; 31211189Ssam if ((cmd & DMC_RDYO) == 0) 31311189Ssam return; 31411189Ssam arg2 = addr->sel4; 3155725Sroot arg = addr->sel6; 3165725Sroot addr->bsel2 &= ~DMC_RDYO; 3175725Sroot sc = &dmc_softc[unit]; 3185725Sroot printd("dmcxint\n"); 31911189Ssam switch (cmd & 07) { 3205725Sroot 3215725Sroot case DMC_OUR: 3225725Sroot /* 3235725Sroot * A read has completed. Purge input buffered 3245725Sroot * data path. Pass packet to type specific 3255725Sroot * higher-level input routine. 3265725Sroot */ 3275725Sroot sc->sc_if.if_ipackets++; 3286587Ssam if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP) 3295853Sroot UBAPURGE(sc->sc_ifuba.ifu_uba, 3305853Sroot sc->sc_ifuba.ifu_r.ifrw_bdp); 3315725Sroot len = arg & DMC_CCOUNT; 3325725Sroot printd(" read done, len %d\n", len); 3336334Ssam switch (ui->ui_flags & DMC_AF) { 3345725Sroot #ifdef INET 3356334Ssam case AF_INET: 3366260Swnj schednetisr(NETISR_IP); 3375725Sroot inq = &ipintrq; 3385725Sroot break; 3395725Sroot #endif 3405725Sroot 3415725Sroot default: 3426334Ssam printf("dmc%d: unknown address type %d\n", unit, 3436334Ssam ui->ui_flags & DMC_AF); 3445725Sroot goto setup; 3455725Sroot } 3465725Sroot m = if_rubaget(&sc->sc_ifuba, len, 0); 3475725Sroot if (m == 0) 3485725Sroot goto setup; 3496207Swnj if (IF_QFULL(inq)) { 3506207Swnj IF_DROP(inq); 3519176Ssam m_freem(m); 3526207Swnj } else 3536207Swnj IF_ENQUEUE(inq, m); 3545725Sroot 3555725Sroot setup: 3565725Sroot arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff; 3575725Sroot dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU); 3585725Sroot return; 3595725Sroot 3605725Sroot case DMC_OUX: 3615725Sroot /* 3625725Sroot * A write has completed, start another 3635725Sroot * transfer if there is more data to send. 3645725Sroot */ 3655725Sroot if (sc->sc_oactive == 0) 3665725Sroot return; /* SHOULD IT BE A FATAL ERROR? */ 3675725Sroot printd(" write done\n"); 3685725Sroot sc->sc_if.if_opackets++; 3695725Sroot sc->sc_oactive = 0; 3705725Sroot if (sc->sc_ifuba.ifu_xtofree) { 3719176Ssam m_freem(sc->sc_ifuba.ifu_xtofree); 3725725Sroot sc->sc_ifuba.ifu_xtofree = 0; 3735725Sroot } 3745725Sroot if (sc->sc_if.if_snd.ifq_head == 0) 3755725Sroot return; 3765725Sroot dmcstart(unit); 3775725Sroot return; 3785725Sroot 3795725Sroot case DMC_CNTLO: 3805725Sroot arg &= DMC_CNTMASK; 3815725Sroot if (arg&DMC_FATAL) { 3825725Sroot addr->bsel1 = DMC_MCLR; 3835725Sroot sc->sc_flag &= ~DMCRUN; 3845725Sroot /*** DO SOMETHING TO RESTART DEVICE ***/ 3855725Sroot printf("DMC FATAL ERROR 0%o\n", arg); 3865725Sroot } else { 3875725Sroot /* ACCUMULATE STATISTICS */ 3885725Sroot printf("DMC SOFT ERROR 0%o\n", arg); 3895725Sroot } 3905725Sroot return; 3915725Sroot 3925725Sroot default: 3935725Sroot printf("dmc%d: bad control %o\n", unit, cmd); 3945725Sroot } 3955725Sroot } 3965725Sroot 3975725Sroot /* 3985725Sroot * DMC output routine. 3995725Sroot * Just send the data, header was supplied by 4005725Sroot * upper level protocol routines. 4015725Sroot */ 4026334Ssam dmcoutput(ifp, m, dst) 4035725Sroot register struct ifnet *ifp; 4045725Sroot register struct mbuf *m; 4056334Ssam struct sockaddr *dst; 4065725Sroot { 4075725Sroot struct uba_device *ui = dmcinfo[ifp->if_unit]; 4085725Sroot int s; 4095725Sroot 4105725Sroot printd("dmcoutput\n"); 4116334Ssam if (dst->sa_family != (ui->ui_flags & DMC_AF)) { 4129176Ssam printf("dmc%d: af%d not supported\n", ifp->if_unit, 4139176Ssam dst->sa_family); 4146334Ssam m_freem(m); 4156502Ssam return (EAFNOSUPPORT); 4165725Sroot } 4175725Sroot s = splimp(); 4186207Swnj if (IF_QFULL(&ifp->if_snd)) { 4196207Swnj IF_DROP(&ifp->if_snd); 4206334Ssam m_freem(m); 4216207Swnj splx(s); 4226502Ssam return (ENOBUFS); 4236207Swnj } 4245725Sroot IF_ENQUEUE(&ifp->if_snd, m); 4255725Sroot if (dmc_softc[ifp->if_unit].sc_oactive == 0) 4265725Sroot dmcstart(ifp->if_unit); 4275725Sroot splx(s); 4286502Ssam return (0); 4295725Sroot } 430