1*5699Sroot /* if_accreg.h 4.1 82/02/04 */ 2*5699Sroot 3*5699Sroot /* 4*5699Sroot * ACC LH/DH-11 interface 5*5699Sroot */ 6*5699Sroot 7*5699Sroot struct accdma { 8*5699Sroot short csr; /* control and status */ 9*5699Sroot short db; /* data buffer */ 10*5699Sroot u_short ba; /* buss address */ 11*5699Sroot short wc; /* word count */ 12*5699Sroot }; 13*5699Sroot 14*5699Sroot struct accdevice { 15*5699Sroot struct accdma input; 16*5699Sroot struct accdma output; 17*5699Sroot }; 18*5699Sroot 19*5699Sroot #define icsr input.csr 20*5699Sroot #define iba input.ba 21*5699Sroot #define iwc input.wc 22*5699Sroot #define ocsr output.csr 23*5699Sroot #define oba output.ba 24*5699Sroot #define owc output.wc 25*5699Sroot 26*5699Sroot /* 27*5699Sroot * Bits Common to both input and out CSR's 28*5699Sroot */ 29*5699Sroot #define ACC_ERR 0x8000 /* error present */ 30*5699Sroot #define ACC_NXM 0x4000 /* non-existant memory */ 31*5699Sroot #define ACC_RDY 0x0080 /* ready */ 32*5699Sroot #define ACC_IE 0x0040 /* interrupt enable */ 33*5699Sroot #define ACC_RESET 0x0002 /* reset interface */ 34*5699Sroot #define ACC_GO 0x0001 /* start operation */ 35*5699Sroot 36*5699Sroot /* 37*5699Sroot * Input Control Status Register 38*5699Sroot */ 39*5699Sroot #define IN_EOM 0x2000 /* end-of-message recieved */ 40*5699Sroot #define IN_HRDY 0x0800 /* host ready */ 41*5699Sroot #define IN_IMPBSY 0x0400 /* IMP not ready */ 42*5699Sroot #define IN_RMR 0x0200 /* receive master ready error */ 43*5699Sroot #define IN_IBF 0x0100 /* input data buffer full */ 44*5699Sroot #define IN_WEN 0x0008 /* write enable */ 45*5699Sroot #define IN_MRDY 0x0004 /* master ready */ 46*5699Sroot 47*5699Sroot #define ACC_INBITS \ 48*5699Sroot "\20\20ERR\17NXM\16EOM\14HRDY\13IMPBSY\12RMR\11IBF\10RDY\7IE\ 49*5699Sroot \4WEN\3MRDY\2RESET\1GO" 50*5699Sroot 51*5699Sroot /* 52*5699Sroot * Output Control Status Register 53*5699Sroot */ 54*5699Sroot #define OUT_TMR 0x0200 /* transmit master ready error */ 55*5699Sroot #define OUT_BBACK 0x0008 /* bus back */ 56*5699Sroot #define OUT_ENLB 0x0004 /* enable last bit */ 57*5699Sroot 58*5699Sroot #define ACC_OUTBITS \ 59*5699Sroot "\20\20ERR\17NXM\12TMR\10RDY\7IE\4BBACK\3ENLB\2RESET\1GO" 60