134293Skarels /* 2*35041Sbostic * Copyright (c) 1988 Regents of the University of California. 3*35041Sbostic * All rights reserved. 4*35041Sbostic * 5*35041Sbostic * This code is derived from software contributed to Berkeley by 6*35041Sbostic * Chris Torek. 7*35041Sbostic * 8*35041Sbostic * Redistribution and use in source and binary forms are permitted 9*35041Sbostic * provided that the above copyright notice and this paragraph are 10*35041Sbostic * duplicated in all such forms and that any documentation, 11*35041Sbostic * advertising materials, and other materials related to such 12*35041Sbostic * distribution and use acknowledge that the software was developed 13*35041Sbostic * by the University of California, Berkeley. The name of the 14*35041Sbostic * University may not be used to endorse or promote products derived 15*35041Sbostic * from this software without specific prior written permission. 16*35041Sbostic * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 17*35041Sbostic * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 18*35041Sbostic * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 19*35041Sbostic * 20*35041Sbostic * @(#)nireg.h 7.2 (Berkeley) 07/09/88 21*35041Sbostic */ 22*35041Sbostic 23*35041Sbostic /* 2434293Skarels * Registers for the DEBNA and DEBNK Ethernet interfaces 2534293Skarels * (DEC calls these Network Interfaces, hence nireg.h) 2634293Skarels */ 2734293Skarels 2834293Skarels /* 2934293Skarels * this seems to be intended to be more general, but I have no details, 3034293Skarels * so it goes here for now 3134293Skarels * 3234293Skarels * BI Vax Port (BVP) stuff first: 3334293Skarels */ 3434293Skarels struct bvpregs { 3534293Skarels u_long p_pcr; /* port control register */ 3634293Skarels u_long p_psr; /* port status register */ 3734293Skarels u_long p_per; /* port error register */ 3834293Skarels u_long p_pdr; /* port data register */ 3934293Skarels }; 4034293Skarels 4134293Skarels /* 4234293Skarels * BI node space registers 4334293Skarels */ 4434293Skarels struct ni_regs { 4534293Skarels struct biiregs ni_bi; /* BIIC registers, except GPRs */ 4634293Skarels struct bvpregs ni_tkp; /* tk50 port control via BIIC GPRs */ 4734293Skarels u_long ni_xxx[64]; /* unused */ 4834293Skarels u_long ni_rxcd; /* receive console data */ 4934293Skarels struct bvpregs ni_nip; /* NI port control via BCI3 GPRs */ 5034293Skarels u_long ni_pudr; /* power-up diagnostic register */ 5134293Skarels }; 5234293Skarels 5334293Skarels /* bits in ni_pudr */ 5434293Skarels #define PUDR_TAPE 0x40000000 /* tk50 & assoc logic ok */ 5534293Skarels #define PUDR_PATCH 0x20000000 /* patch logic ok */ 5634293Skarels #define PUDR_VRAM 0x10000000 /* DEBNx onboard RAM ok */ 5734293Skarels #define PUDR_VROM1 0x08000000 /* uVax ROM 1 ok */ /* ? */ 5834293Skarels #define PUDR_VROM2 0x04000000 /* uVax ROM 2 ok */ 5934293Skarels #define PUDR_VROM3 0x02000000 /* uVax ROM 3 ok */ 6034293Skarels #define PUDR_VROM4 0x01000000 /* uVax ROM 4 ok */ 6134293Skarels #define PUDR_UVAX 0x00800000 /* uVax passes self test */ 6234293Skarels #define PUDR_BI 0x00400000 /* BIIC and BCI3 chips ok */ 6334293Skarels #define PUDR_TMR 0x00200000 /* interval timer ok */ 6434293Skarels #define PUDR_IRQ 0x00100000 /* no IRQ lines stuck */ 6534293Skarels #define PUDR_NI 0x00080000 /* Ethernet ctlr ok */ 6634293Skarels #define PUDR_TK50 0x00040000 /* tk50 present */ 6734293Skarels #define PUDR_PRES 0x00001000 /* tk50 present (again?!) */ 6834293Skarels #define PUDR_UVINT 0x00000800 /* uVax-to-80186 intr logic ok */ 6934293Skarels #define PUDR_BUSHD 0x00000400 /* no bus hold errors */ 7034293Skarels #define PUDR_II32 0x00000200 /* II32 transceivers ok */ 7134293Skarels #define PUDR_MPSC 0x00000100 /* MPSC logic ok */ 7234293Skarels #define PUDR_GAP 0x00000080 /* gap-detect logic ok */ 7334293Skarels #define PUDR_MISC 0x00000040 /* misc. registers ok */ 7434293Skarels #define PUDR_UNEXP 0x00000020 /* unexpected interrupt trapped */ 7534293Skarels #define PUDR_80186 0x00000010 /* 80186 ok */ 7634293Skarels #define PUDR_PATCH 0x00000008 /* patch logic ok (again) */ 7734293Skarels #define PUDR_8RAM 0x00000004 /* 80186 RAM ok */ 7834293Skarels #define PUDR_8ROM2 0x00000002 /* 80186 ROM1 ok */ 7934293Skarels #define PUDR_8ROM1 0x00000001 /* 80186 ROM2 ok */ 80