1*34293Skarels /* 2*34293Skarels * Registers for the DEBNA and DEBNK Ethernet interfaces 3*34293Skarels * (DEC calls these Network Interfaces, hence nireg.h) 4*34293Skarels */ 5*34293Skarels 6*34293Skarels /* 7*34293Skarels * this seems to be intended to be more general, but I have no details, 8*34293Skarels * so it goes here for now 9*34293Skarels * 10*34293Skarels * BI Vax Port (BVP) stuff first: 11*34293Skarels */ 12*34293Skarels struct bvpregs { 13*34293Skarels u_long p_pcr; /* port control register */ 14*34293Skarels u_long p_psr; /* port status register */ 15*34293Skarels u_long p_per; /* port error register */ 16*34293Skarels u_long p_pdr; /* port data register */ 17*34293Skarels }; 18*34293Skarels 19*34293Skarels /* 20*34293Skarels * BI node space registers 21*34293Skarels */ 22*34293Skarels struct ni_regs { 23*34293Skarels struct biiregs ni_bi; /* BIIC registers, except GPRs */ 24*34293Skarels struct bvpregs ni_tkp; /* tk50 port control via BIIC GPRs */ 25*34293Skarels u_long ni_xxx[64]; /* unused */ 26*34293Skarels u_long ni_rxcd; /* receive console data */ 27*34293Skarels struct bvpregs ni_nip; /* NI port control via BCI3 GPRs */ 28*34293Skarels u_long ni_pudr; /* power-up diagnostic register */ 29*34293Skarels }; 30*34293Skarels 31*34293Skarels /* bits in ni_pudr */ 32*34293Skarels #define PUDR_TAPE 0x40000000 /* tk50 & assoc logic ok */ 33*34293Skarels #define PUDR_PATCH 0x20000000 /* patch logic ok */ 34*34293Skarels #define PUDR_VRAM 0x10000000 /* DEBNx onboard RAM ok */ 35*34293Skarels #define PUDR_VROM1 0x08000000 /* uVax ROM 1 ok */ /* ? */ 36*34293Skarels #define PUDR_VROM2 0x04000000 /* uVax ROM 2 ok */ 37*34293Skarels #define PUDR_VROM3 0x02000000 /* uVax ROM 3 ok */ 38*34293Skarels #define PUDR_VROM4 0x01000000 /* uVax ROM 4 ok */ 39*34293Skarels #define PUDR_UVAX 0x00800000 /* uVax passes self test */ 40*34293Skarels #define PUDR_BI 0x00400000 /* BIIC and BCI3 chips ok */ 41*34293Skarels #define PUDR_TMR 0x00200000 /* interval timer ok */ 42*34293Skarels #define PUDR_IRQ 0x00100000 /* no IRQ lines stuck */ 43*34293Skarels #define PUDR_NI 0x00080000 /* Ethernet ctlr ok */ 44*34293Skarels #define PUDR_TK50 0x00040000 /* tk50 present */ 45*34293Skarels #define PUDR_PRES 0x00001000 /* tk50 present (again?!) */ 46*34293Skarels #define PUDR_UVINT 0x00000800 /* uVax-to-80186 intr logic ok */ 47*34293Skarels #define PUDR_BUSHD 0x00000400 /* no bus hold errors */ 48*34293Skarels #define PUDR_II32 0x00000200 /* II32 transceivers ok */ 49*34293Skarels #define PUDR_MPSC 0x00000100 /* MPSC logic ok */ 50*34293Skarels #define PUDR_GAP 0x00000080 /* gap-detect logic ok */ 51*34293Skarels #define PUDR_MISC 0x00000040 /* misc. registers ok */ 52*34293Skarels #define PUDR_UNEXP 0x00000020 /* unexpected interrupt trapped */ 53*34293Skarels #define PUDR_80186 0x00000010 /* 80186 ok */ 54*34293Skarels #define PUDR_PATCH 0x00000008 /* patch logic ok (again) */ 55*34293Skarels #define PUDR_8RAM 0x00000004 /* 80186 RAM ok */ 56*34293Skarels #define PUDR_8ROM2 0x00000002 /* 80186 ROM1 ok */ 57*34293Skarels #define PUDR_8ROM1 0x00000001 /* 80186 ROM2 ok */ 58