1 /* 2 * Copyright (c) 1988 Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms are permitted 6 * provided that this notice is preserved and that due credit is given 7 * to the University of California at Berkeley. The name of the University 8 * may not be used to endorse or promote products derived from this 9 * software without specific prior written permission. This software 10 * is provided ``as is'' without express or implied warranty. 11 * 12 * @(#)vdreg.h 7.1 (Berkeley) 05/21/88 13 */ 14 15 /* 16 * Versabus VDDC/SMDE disk controller definitions. 17 */ 18 #define VDDC_SECSIZE 512 /* sector size for VDDC */ 19 #define VD_MAXSECSIZE 1024 /* max sector size for SMD/E */ 20 21 /* 22 * Controller communications block. 23 */ 24 struct vddevice { 25 u_long vdcdr; /* controller device register */ 26 u_long vdreset; /* controller reset register */ 27 u_long vdcsr; /* control-status register */ 28 long vdrstclr; /* reset clear register */ 29 u_short vdstatus[16]; /* per-drive status register */ 30 u_short vdicf_status; /* status change interupt control format */ 31 u_short vdicf_done; /* interrupt complete control format */ 32 u_short vdicf_error; /* interrupt error control format */ 33 u_short vdicf_success; /* interrupt success control format */ 34 u_short vdtcf_mdcb; /* mdcb transfer control format */ 35 u_short vdtcf_dcb; /* dcb transfer control format */ 36 u_short vdtcf_trail; /* trail transfer control format */ 37 u_short vdtcf_data; /* data transfer control format */ 38 u_long vdccf; /* controller configuration flags */ 39 u_long vdsecsize; /* sector size */ 40 u_short vdfill0; 41 u_char vdcylskew; /* cylinder to cylinder skew factor */ 42 u_char vdtrackskew; /* track to track skew factor */ 43 u_long vdfill1; 44 u_long vddfr; /* diagnostic flag register */ 45 u_long vddda; /* diagnostic dump address */ 46 }; 47 48 /* controller types */ 49 #define VDTYPE_VDDC 1 /* old vddc controller (smd only) */ 50 #define VDTYPE_SMDE 2 /* new smde controller (smd-e) */ 51 52 /* 53 * Controller status definitions. 54 */ 55 #define CS_SCS 0xf /* status change source (drive number) */ 56 #define CS_ELC 0x10 /* error on last command */ 57 #define CS_ICC 0x60 /* interupt cause code */ 58 #define ICC_NOI 0x00 /* no interupt */ 59 #define ICC_DUN 0x20 /* no interupt */ 60 #define ICC_ERR 0x40 /* no interupt */ 61 #define ICC_SUC 0x60 /* no interupt */ 62 #define CS_GO 0x80 /* go bit (controller busy) */ 63 #define CS_BE 0x100 /* buss error */ 64 #define CS_BOK 0x4000 /* board ok */ 65 #define CS_SFL 0x8000 /* system fail */ 66 #define CS_LEC 0xff000000 /* last error code */ 67 68 /* 69 * Drive status definitions. 70 */ 71 #define STA_UR 0x1 /* unit ready */ 72 #define STA_OC 0x2 /* on cylinder */ 73 #define STA_SE 0x4 /* seek error */ 74 #define STA_DF 0x8 /* drive fault */ 75 #define STA_WP 0x10 /* write protected */ 76 #define STA_US 0x20 /* unit selected */ 77 78 /* 79 * Interupt Control Field definitions. 80 */ 81 #define ICF_IPL 0x7 /* interupt priority level */ 82 #define ICF_IEN 0x8 /* interupt enable */ 83 #define ICF_IV 0xff00 /* interupt vector */ 84 85 /* 86 * Transfer Control Format definitions. 87 */ 88 #define TCF_AM 0xff /* Address Modifier */ 89 #define AM_SNPDA 0x01 /* Standard Non-Privileged Data Access */ 90 #define AM_SASA 0x81 /* Standard Ascending Sequential Access */ 91 #define AM_ENPDA 0xf1 /* Extended Non-Privileged Data Access */ 92 #define AM_EASA 0xe1 /* Extended Ascending Sequential Access */ 93 #define TCF_BTE 0x800 /* Block Transfer Enable */ 94 95 /* 96 * Controller Configuration Flags. 97 */ 98 #define CCF_STS 0x1 /* sectors per track selectable */ 99 #define CCF_EAV 0x2 /* enable auto vector */ 100 #define CCF_ERR 0x4 /* enable reset register */ 101 #define CCF_DER 0x8 /* disable error recovery */ 102 #define CCF_XMD 0x60 /* xmd transfer mode (bus size) */ 103 #define XMD_8BIT 0x20 /* do only 8 bit transfers */ 104 #define XMD_16BIT 0x40 /* do only 16 bit transfers */ 105 #define XMD_32BIT 0x60 /* do only 32 bit transfers */ 106 #define CCF_BSZ 0x300 /* burst size */ 107 #define BSZ_16WRD 0x000 /* 16 word transfer burst */ 108 #define BSZ_12WRD 0x100 /* 12 word transfer burst */ 109 #define BSZ_8WRD 0x200 /* 8 word transfer burst */ 110 #define BSZ_4WRD 0x300 /* 4 word transfer burst */ 111 #define CCF_SEN 0x400 /* cylinder/track skew enable (for format) */ 112 #define CCF_ENP 0x1000 /* enable parity */ 113 #define CCF_EPE 0x2000 /* enable parity errors */ 114 #define CCF_EDE 0x10000 /* error detection enable */ 115 #define CCF_ECE 0x20000 /* error correction enable */ 116 117 /* 118 * Diagnostic register definitions. 119 */ 120 #define DIA_DC 0x7f /* dump count mask */ 121 #define DIA_DWR 0x80 /* dump write/read flag */ 122 #define DIA_ARE 0x100 /* auto rebuild enable */ 123 #define DIA_CEN 0x200 /* call enable flag */ 124 #define DIA_KEY 0xAA550000 /* reset enable key */ 125 126 /* 127 * Hardware interface flags, in dcb.devselect and d_devflags 128 */ 129 #define VD_ESDI 0x10 /* drive is on ESDI interface */ 130 #define d_devflags d_drivedata[0] /* in disk label */ 131 132 /* 133 * Error recovery flags. 134 */ 135 #define VDRF_RTZ 0x0001 /* return to zero */ 136 #define VDRF_OCF 0x0002 /* on cylinder false */ 137 #define VDRF_OSP 0x0004 /* offset plus */ 138 #define VDRF_OSM 0x0008 /* offset minus */ 139 #define VDRF_DSE 0x0080 /* data strobe early */ 140 #define VDRF_DSL 0x0100 /* data strobe late */ 141 142 #define VDRF_NONE 0 143 #define VDRF_NORMAL (VDRF_RTZ|VDRF_OCF|VDRF_OSP|VDRF_OSM|VDRF_DSE|VDRF_DSE) 144 145 /* 146 * Perform a reset on the controller. 147 */ 148 #define VDRESET(a,t) { \ 149 if ((t) == VDTYPE_SMDE) { \ 150 ((struct vddevice *)(a))->vddfr = DIA_KEY|DIA_CEN; \ 151 ((struct vddevice *)(a))->vdcdr = (u_long)0xffffffff; \ 152 DELAY(5000000); \ 153 } else { \ 154 ((struct vddevice *)(a))->vdreset = 0; \ 155 DELAY(1500000); \ 156 } \ 157 } 158 159 /* 160 * Abort a controller operation. 161 */ 162 #define VDABORT(a,t) { \ 163 if ((t) == VDTYPE_VDDC) { \ 164 movow((a), (VDOP_ABORT&0xffff0000)>>16) ; \ 165 movow((int)(a)+2, VDOP_ABORT&0xffff); \ 166 } else \ 167 ((struct vddevice *)(a))->vdcdr = (u_long)VDOP_ABORT; \ 168 DELAY(1000000); \ 169 } 170 171 /* 172 * Start a command. 173 */ 174 #define VDGO(a,mdcb,t) {\ 175 if ((t) == VDTYPE_VDDC) { \ 176 movow((a), ((int)(mdcb)&0xffff0000)>>16) ; \ 177 movow((int)((a))+2, (int)(mdcb)&0xffff); \ 178 } else \ 179 ((struct vddevice *)(a))->vdcdr = (mdcb); \ 180 } 181 182 /* 183 * MDCB layout. 184 */ 185 struct mdcb { 186 struct dcb *mdcb_head; /* first dcb in list */ 187 struct dcb *mdcb_busy; /* dcb being processed */ 188 struct dcb *mdcb_intr; /* dcb causing interrupt */ 189 long mdcb_status; /* status of dcb in mdcb_busy */ 190 }; 191 192 /* 193 * DCB definitions. 194 */ 195 196 /* 197 * A disk address. 198 */ 199 typedef struct { 200 u_char track; /* all 8 bits */ 201 u_char sector; /* all 8 bits */ 202 u_short cylinder; /* low order 12 bits */ 203 } dskadr; 204 205 /* 206 * DCB trailer formats. 207 */ 208 /* read/write trailer */ 209 struct trrw { 210 u_long memadr; /* memory address */ 211 u_long wcount; /* 16 bit word count */ 212 dskadr disk; /* disk address */ 213 }; 214 215 /* scatter/gather trailer */ 216 #define VDMAXPAGES (MAXPHYS / NBPG) 217 struct trsg { 218 struct trrw start_addr; 219 struct addr_chain { 220 u_long nxt_addr; 221 u_long nxt_len; 222 } addr_chain[VDMAXPAGES + 1]; 223 }; 224 225 /* seek trailer format */ 226 struct trseek { 227 dskadr skaddr; 228 }; 229 230 /* format trailer */ 231 struct trfmt { 232 char *addr; /* data buffer to be filled on sector*/ 233 long nsectors; /* # of sectors to be formatted */ 234 dskadr disk; /* disk physical address info */ 235 dskadr hdr; /* header address info */ 236 }; 237 238 /* reset/configure trailer */ 239 struct treset { 240 long ncyl; /* # cylinders */ 241 long nsurfaces; /* # surfaces */ 242 long nsectors; /* # sectors */ 243 long slip_sec; /* # of slip sectors */ 244 long recovery; /* recovery flags */ 245 }; 246 247 /* ident trailer */ 248 struct trid { 249 long name; 250 long id; 251 long date; 252 }; 253 254 /* 255 * DCB layout. 256 */ 257 struct dcb { 258 struct dcb *nxtdcb; /* next dcb */ 259 short intflg; /* interrupt settings and flags */ 260 short opcode; /* DCB command code etc... */ 261 long operrsta; /* error & status info */ 262 short fill; /* not used */ 263 char devselect; /* drive selection */ 264 char trailcnt; /* trailer Word Count */ 265 long err_memadr; /* error memory address */ 266 char err_code; /* error codes for SMD/E */ 267 char fill2; /* not used */ 268 short err_wcount; /* error word count */ 269 char err_trk; /* error track/sector */ 270 char err_sec; /* error track/sector */ 271 short err_cyl; /* error cylinder adr */ 272 union { 273 struct trid idtrail; /* ident command trailer */ 274 struct trseek sktrail; /* seek command trailer */ 275 struct trsg sgtrail; /* scatter/gather trailer */ 276 struct trrw rwtrail; /* read/write trailer */ 277 struct trfmt fmtrail; /* format trailer */ 278 struct treset rstrail; /* reset/configure trailer */ 279 } trail; 280 }; 281 282 /* 283 * smaller DCB with seek trailer only (no scatter-gather). 284 */ 285 struct skdcb { 286 struct dcb *nxtdcb; /* next dcb */ 287 short intflg; /* interrupt settings and flags */ 288 short opcode; /* DCB command code etc... */ 289 long operrsta; /* error & status info */ 290 short fill; /* not used */ 291 char devselect; /* drive selection */ 292 char trailcnt; /* trailer Word Count */ 293 long err_memadr; /* error memory address */ 294 char err_code; /* error codes for SMD/E */ 295 char fill2; /* not used */ 296 short err_wcount; /* error word count */ 297 char err_trk; /* error track/sector */ 298 char err_sec; /* error track/sector */ 299 short err_cyl; /* error cylinder adr */ 300 union { 301 struct trseek sktrail; /* seek command trailer */ 302 } trail; 303 }; 304 305 /* 306 * DCB command codes. 307 */ 308 #define VDOP_RD 0x80 /* read data */ 309 #define VDOP_FTR 0xc0 /* full track read */ 310 #define VDOP_RAS 0x90 /* read and scatter */ 311 #define VDOP_RDRAW 0x600 /* read unformatted disk sector */ 312 #define VDOP_CMP 0xa0 /* compare */ 313 #define VDOP_FTC 0xe0 /* full track compare */ 314 #define VDOP_RHDE 0x180 /* read header, data & ecc */ 315 #define VDOP_WD 0x00 /* write data */ 316 #define VDOP_FTW 0x40 /* full track write */ 317 #define VDOP_WTC 0x20 /* write then compare */ 318 #define VDOP_FTWTC 0x60 /* full track write then compare */ 319 #define VDOP_GAW 0x10 /* gather and write */ 320 #define VDOP_WDE 0x100 /* write data & ecc */ 321 #define VDOP_FSECT 0x900 /* format sector */ 322 #define VDOP_GWC 0x30 /* gather write & compare */ 323 #define VDOP_START 0x800 /* start drives */ 324 #define VDOP_RELEASE 0xa00 /* stop drives */ 325 #define VDOP_SEEK 0xb00 /* seek */ 326 #define VDOP_INIT 0xc00 /* initialize controller */ 327 #define VDOP_DIAG 0xd00 /* diagnose (self-test) controller */ 328 #define VDOP_CONFIG 0xe00 /* reset & configure drive */ 329 #define VDOP_STATUS 0xf00 /* get drive status */ 330 #define VDOP_IDENT 0x700 /* identify controller */ 331 332 #define VDOP_ABORT 0x80000000 /* abort current command */ 333 334 /* 335 * DCB status definitions. 336 */ 337 #define DCBS_HCRC 0x00000001 /* header crc error */ 338 #define DCBS_HCE 0x00000002 /* header compare error */ 339 #define DCBS_WPT 0x00000004 /* drive write protected */ 340 #define DCBS_CHE 0x00000008 /* controller hardware error */ 341 #define DCBS_SKI 0x00000010 /* seek incomplete */ 342 #define DCBS_UDE 0x00000020 /* uncorrectable data error */ 343 #define DCBS_OCYL 0x00000040 /* off cylinder */ 344 #define DCBS_NRDY 0x00000080 /* drive not ready */ 345 #define DCBS_ATA 0x00000100 /* alternate track accessed */ 346 #define DCBS_SKS 0x00000200 /* seek started */ 347 #define DCBS_IVA 0x00000400 /* invalid disk address error */ 348 #define DCBS_NEM 0x00000800 /* non-existant memory error */ 349 #define DCBS_DPE 0x00001000 /* memory data parity error */ 350 #define DCBS_DCE 0x00002000 /* data compare error */ 351 #define DCBS_DDI 0x00004000 /* ddi ready */ 352 #define DCBS_OAB 0x00008000 /* operation aborted */ 353 #define DCBS_DSE 0x00010000 /* data strobe early */ 354 #define DCBS_DSL 0x00020000 /* data strobe late */ 355 #define DCBS_TOP 0x00040000 /* track offset plus */ 356 #define DCBS_TOM 0x00080000 /* track offset minus */ 357 #define DCBS_CCD 0x00100000 /* controller corrected data */ 358 #define DCBS_HARD 0x00200000 /* hard error */ 359 #define DCBS_SOFT 0x00400000 /* soft error (retry succesful) */ 360 #define DCBS_ERR 0x00800000 /* composite error */ 361 #define DCBS_IVC 0x01000000 /* invalid command error */ 362 /* bits 24-27 unused */ 363 #define DCBS_BSY 0x10000000 /* controller busy */ 364 #define DCBS_ICC 0x60000000 /* interrupt cause code */ 365 #define DCBS_INT 0x80000000 /* interrupt generated for this dcb */ 366 367 #define VDERRBITS "\20\1HCRC\2HCE\3WPT\4CHE\5DSKI\6UDE\7OCYL\10NRDY\ 368 \11ATA\12SKS\13IVA\14NEM\15DPE\16DCE\17DDI\20OAB\21DSE\22DSL\23TOP\24TOM\ 369 \25CCD\26HARD\27SOFT\30ERR\31IVC\35ABORTED\36FAIL\37COMPLETE\40STARTED" 370 371 /* drive related errors */ 372 #define VDERR_DRIVE (DCBS_SKI|DCBS_OCYL|DCBS_NRDY|DCBS_IVA) 373 /* controller related errors */ 374 #define VDERR_CTLR (DCBS_CHE|DCBS_OAB|DCBS_IVC|DCBS_NEM) 375 /* potentially recoverable errors */ 376 #define VDERR_RETRY \ 377 (VDERR_DRIVE|VDERR_CTLR|DCBS_DCE|DCBS_DPE|DCBS_HCRC|DCBS_HCE) 378 /* uncorrected data errors */ 379 #define VDERR_HARD (VDERR_RETRY|DCBS_WPT|DCBS_UDE) 380 381 /* 382 * DCB status codes. 383 */ 384 #define DCBS_ABORT 0x10000000 /* dcb aborted */ 385 #define DCBS_FAIL 0x20000000 /* dcb unsuccesfully completed */ 386 #define DCBS_DONE 0x40000000 /* dcb complete */ 387 #define DCBS_START 0x80000000 /* dcb started */ 388 389 /* 390 * DCB interrupt control. 391 */ 392 #define DCBINT_NONE 0x0 /* don't interrupt */ 393 #define DCBINT_ERR 0x2 /* interrupt on error */ 394 #define DCBINT_SUC 0x1 /* interrupt on success */ 395 #define DCBINT_DONE (DCBINT_ERR|DCBINT_SUC) 396 #define DCBINT_PBA 0x4 /* proceed before acknowledge */ 397 398 /* 399 * Sector formats. 400 */ 401 typedef union { 402 struct { 403 dskadr hdr_addr; 404 short smd_crc; 405 } smd; 406 struct { 407 dskadr physical; 408 dskadr logical; 409 long smd_e_crc; 410 } smd_e; 411 } fmt_hdr; 412 413 /* Sector Header bit assignments */ 414 #define VDMF 0x8000 /* Manufacturer Fault 1=good sector */ 415 #define VDUF 0x4000 /* User Fault 1=good sector */ 416 #define VDALT 0x2000 /* Alternate Sector 1=alternate */ 417 #define VDWPT 0x1000 /* Write Protect 1=Read Only Sector */ 418 419 /* input register assignments for DIOCWFORMAT ioctl */ 420 #define dk_op df_reg[0] /* opcode */ 421 #define dk_althdr df_reg[1] /* alt. sect. header, in an int! */ 422 #define dk_fmtflags df_reg[2] /* header format flags */ 423 424 /* output register assignments for DIOCWFORMAT ioctl */ 425 #define dk_operrsta df_reg[0] /* dcb operrsta */ 426 #define dk_ecode df_reg[1] /* smd-e err_code */ 427