xref: /csrg-svn/sys/tahoe/vba/vdreg.h (revision 34396)
1 /*	vdreg.h	1.12	88/05/21	*/
2 
3 /*
4  * Versabus VDDC/SMDE disk controller definitions.
5  */
6 #define	VDDC_SECSIZE	512	/* sector size for VDDC */
7 #define	VD_MAXSECSIZE	1024	/* max sector size for SMD/E */
8 
9 /*
10  * Controller communications block.
11  */
12 struct vddevice {
13 	u_long	vdcdr;		/* controller device register */
14 	u_long	vdreset;	/* controller reset register */
15 	u_long	vdcsr;		/* control-status register */
16 	long	vdrstclr;	/* reset clear register */
17 	u_short	vdstatus[16];	/* per-drive status register */
18 	u_short	vdicf_status;	/* status change interupt control format */
19 	u_short	vdicf_done;	/* interrupt complete control format */
20 	u_short	vdicf_error;	/* interrupt error control format */
21 	u_short	vdicf_success;	/* interrupt success control format */
22 	u_short	vdtcf_mdcb;	/* mdcb transfer control format */
23 	u_short	vdtcf_dcb;	/* dcb transfer control format */
24 	u_short	vdtcf_trail;	/* trail transfer control format */
25 	u_short	vdtcf_data;	/* data transfer control format */
26 	u_long	vdccf;		/* controller configuration flags */
27 	u_long	vdsecsize;	/* sector size */
28 	u_short	vdfill0;
29 	u_char	vdcylskew;	/* cylinder to cylinder skew factor */
30 	u_char	vdtrackskew;	/* track to track skew factor */
31 	u_long	vdfill1;
32 	u_long	vddfr;		/* diagnostic flag register */
33 	u_long	vddda;		/* diagnostic dump address */
34 };
35 
36 /* controller types */
37 #define	VDTYPE_VDDC	1	/* old vddc controller (smd only) */
38 #define	VDTYPE_SMDE	2	/* new smde controller (smd-e) */
39 
40 /*
41  * Controller status definitions.
42  */
43 #define	CS_SCS	0xf		/* status change source (drive number) */
44 #define	CS_ELC	0x10		/* error on last command */
45 #define	CS_ICC	0x60		/* interupt cause code */
46 #define   ICC_NOI  0x00		/* no interupt */
47 #define   ICC_DUN  0x20		/* no interupt */
48 #define   ICC_ERR  0x40		/* no interupt */
49 #define   ICC_SUC  0x60		/* no interupt */
50 #define	CS_GO	0x80		/* go bit (controller busy) */
51 #define	CS_BE	0x100		/* buss error */
52 #define	CS_BOK	0x4000		/* board ok */
53 #define	CS_SFL	0x8000		/* system fail */
54 #define	CS_LEC	0xff000000	/* last error code */
55 
56 /*
57  * Drive status definitions.
58  */
59 #define	STA_UR	0x1		/* unit ready */
60 #define	STA_OC	0x2		/* on cylinder */
61 #define	STA_SE	0x4		/* seek error */
62 #define	STA_DF	0x8		/* drive fault */
63 #define	STA_WP	0x10		/* write protected */
64 #define	STA_US	0x20		/* unit selected */
65 
66 /*
67  * Interupt Control Field definitions.
68  */
69 #define	ICF_IPL	0x7		/* interupt priority level */
70 #define	ICF_IEN	0x8		/* interupt enable */
71 #define	ICF_IV	0xff00		/* interupt vector */
72 
73 /*
74  * Transfer Control Format definitions.
75  */
76 #define	TCF_AM	0xff		/* Address Modifier */
77 #define	  AM_SNPDA   0x01	/* Standard Non-Privileged Data Access */
78 #define	  AM_SASA    0x81	/* Standard Ascending Sequential Access */
79 #define	  AM_ENPDA   0xf1	/* Extended Non-Privileged Data Access */
80 #define	  AM_EASA    0xe1	/* Extended Ascending Sequential Access */
81 #define	TCF_BTE	0x800		/* Block Transfer Enable */
82 
83 /*
84  * Controller Configuration Flags.
85  */
86 #define	CCF_STS	0x1		/* sectors per track selectable */
87 #define	CCF_EAV	0x2		/* enable auto vector */
88 #define	CCF_ERR	0x4		/* enable reset register */
89 #define CCF_DER 0x8		/* disable error recovery */
90 #define	CCF_XMD	0x60		/* xmd transfer mode (bus size) */
91 #define	  XMD_8BIT  0x20	/*   do only 8 bit transfers */
92 #define	  XMD_16BIT 0x40	/*   do only 16 bit transfers */
93 #define	  XMD_32BIT 0x60	/*   do only 32 bit transfers */
94 #define	CCF_BSZ	0x300		/* burst size */
95 #define	  BSZ_16WRD 0x000	/*   16 word transfer burst */
96 #define	  BSZ_12WRD 0x100	/*   12 word transfer burst */
97 #define	  BSZ_8WRD  0x200	/*   8 word transfer burst */
98 #define	  BSZ_4WRD  0x300	/*   4 word transfer burst */
99 #define CCF_SEN	0x400		/* cylinder/track skew enable (for format) */
100 #define	CCF_ENP	0x1000		/* enable parity */
101 #define	CCF_EPE	0x2000		/* enable parity errors */
102 #define	CCF_EDE	0x10000		/* error detection enable */
103 #define	CCF_ECE	0x20000		/* error correction enable */
104 
105 /*
106  * Diagnostic register definitions.
107  */
108 #define	DIA_DC	0x7f		/* dump count mask */
109 #define	DIA_DWR	0x80		/* dump write/read flag */
110 #define	DIA_ARE	0x100		/* auto rebuild enable */
111 #define	DIA_CEN	0x200		/* call enable flag */
112 #define	DIA_KEY	0xAA550000	/* reset enable key */
113 
114 /*
115  * Hardware interface flags, in dcb.devselect and d_devflags
116  */
117 #define VD_ESDI	0x10		/* drive is on ESDI interface */
118 #define	d_devflags	d_drivedata[0]		/* in disk label */
119 
120 /*
121  * Error recovery flags.
122  */
123 #define	VDRF_RTZ	0x0001	/* return to zero */
124 #define	VDRF_OCF	0x0002	/* on cylinder false */
125 #define	VDRF_OSP	0x0004	/* offset plus */
126 #define	VDRF_OSM	0x0008	/* offset minus */
127 #define	VDRF_DSE	0x0080	/* data strobe early */
128 #define	VDRF_DSL	0x0100	/* data strobe late */
129 
130 #define	VDRF_NONE	0
131 #define	VDRF_NORMAL	(VDRF_RTZ|VDRF_OCF|VDRF_OSP|VDRF_OSM|VDRF_DSE|VDRF_DSE)
132 
133 /*
134  * Perform a reset on the controller.
135  */
136 #define	VDRESET(a,t) { \
137 	if ((t) == VDTYPE_SMDE) { \
138 		((struct vddevice *)(a))->vddfr = DIA_KEY|DIA_CEN; \
139 		((struct vddevice *)(a))->vdcdr = (u_long)0xffffffff; \
140 		DELAY(5000000); \
141 	} else { \
142 		((struct vddevice *)(a))->vdreset = 0; \
143 		DELAY(1500000); \
144 	} \
145 }
146 
147 /*
148  * Abort a controller operation.
149  */
150 #define	VDABORT(a,t) { \
151 	if ((t) == VDTYPE_VDDC) { \
152 		movow((a), (VDOP_ABORT&0xffff0000)>>16) ; \
153 		movow((int)(a)+2, VDOP_ABORT&0xffff); \
154 	} else \
155 		((struct vddevice *)(a))->vdcdr = (u_long)VDOP_ABORT; \
156 	DELAY(1000000); \
157 }
158 
159 /*
160  * Start a command.
161  */
162 #define VDGO(a,mdcb,t) {\
163 	if ((t) == VDTYPE_VDDC) { \
164 		movow((a), ((int)(mdcb)&0xffff0000)>>16) ; \
165 		movow((int)((a))+2, (int)(mdcb)&0xffff); \
166 	} else \
167 		((struct vddevice *)(a))->vdcdr = (mdcb); \
168 }
169 
170 /*
171  * MDCB layout.
172  */
173 struct mdcb {
174 	struct	dcb *mdcb_head;		/* first dcb in list */
175 	struct	dcb *mdcb_busy;		/* dcb being processed */
176 	struct	dcb *mdcb_intr;		/* dcb causing interrupt */
177 	long	mdcb_status;		/* status of dcb in mdcb_busy */
178 };
179 
180 /*
181  * DCB definitions.
182  */
183 
184 /*
185  * A disk address.
186  */
187 typedef struct {
188 	u_char	track;			/* all 8 bits */
189 	u_char	sector;			/* all 8  bits */
190 	u_short	cylinder;		/* low order 12 bits */
191 } dskadr;
192 
193 /*
194  * DCB trailer formats.
195  */
196 /* read/write trailer */
197 struct trrw {
198 	u_long	memadr;		/* memory address */
199 	u_long	wcount;		/* 16 bit word count */
200 	dskadr	disk;		/* disk address */
201 };
202 
203 /* scatter/gather trailer */
204 #define	VDMAXPAGES	(MAXPHYS / NBPG)
205 struct trsg {
206 	struct	trrw start_addr;
207 	struct addr_chain {
208 		u_long	nxt_addr;
209 		u_long	nxt_len;
210 	} addr_chain[VDMAXPAGES + 1];
211 };
212 
213 /* seek trailer format */
214 struct trseek {
215 	dskadr	skaddr;
216 };
217 
218 /* format trailer */
219 struct trfmt {
220 	char	*addr;		/* data buffer to be filled on sector*/
221 	long	nsectors;	/* # of sectors to be formatted */
222 	dskadr	disk;		/* disk physical address info */
223 	dskadr  hdr;		/* header address info */
224 };
225 
226 /* reset/configure trailer */
227 struct treset {
228 	long	ncyl;		/* # cylinders */
229 	long	nsurfaces;	/* # surfaces */
230 	long	nsectors;	/* # sectors */
231 	long	slip_sec;	/* # of slip sectors */
232 	long	recovery;	/* recovery flags */
233 };
234 
235 /* ident trailer */
236 struct trid {
237 	long	name;
238 	long	id;
239 	long	date;
240 };
241 
242 /*
243  * DCB layout.
244  */
245 struct dcb {
246 	struct	dcb *nxtdcb;	/* next dcb */
247 	short	intflg;		/* interrupt settings and flags */
248 	short	opcode;		/* DCB command code etc... */
249 	long	operrsta;	/* error & status info */
250 	short	fill;		/* not used */
251 	char	devselect;	/* drive selection */
252 	char	trailcnt;	/* trailer Word Count */
253 	long	err_memadr;	/* error memory address */
254 	char	err_code;	/* error codes for SMD/E */
255 	char	fill2;		/* not used */
256 	short	err_wcount;	/* error word count */
257 	char	err_trk;	/* error track/sector */
258 	char	err_sec;	/* error track/sector */
259 	short	err_cyl;	/* error cylinder adr */
260 	union {
261 		struct	trid idtrail;	/* ident command trailer */
262 		struct	trseek sktrail;	/* seek command trailer */
263 		struct	trsg sgtrail;	/* scatter/gather trailer */
264 		struct	trrw rwtrail;	/* read/write trailer */
265 		struct	trfmt fmtrail;	/* format trailer */
266 		struct	treset rstrail;	/* reset/configure trailer */
267 	} trail;
268 };
269 
270 /*
271  * smaller DCB with seek trailer only (no scatter-gather).
272  */
273 struct skdcb {
274 	struct	dcb *nxtdcb;	/* next dcb */
275 	short	intflg;		/* interrupt settings and flags */
276 	short	opcode;		/* DCB command code etc... */
277 	long	operrsta;	/* error & status info */
278 	short	fill;		/* not used */
279 	char	devselect;	/* drive selection */
280 	char	trailcnt;	/* trailer Word Count */
281 	long	err_memadr;	/* error memory address */
282 	char	err_code;	/* error codes for SMD/E */
283 	char	fill2;		/* not used */
284 	short	err_wcount;	/* error word count */
285 	char	err_trk;	/* error track/sector */
286 	char	err_sec;	/* error track/sector */
287 	short	err_cyl;	/* error cylinder adr */
288 	union {
289 		struct	trseek sktrail;	/* seek command trailer */
290 	} trail;
291 };
292 
293 /*
294  * DCB command codes.
295  */
296 #define	VDOP_RD		0x80		/* read data */
297 #define	VDOP_FTR	0xc0		/* full track read */
298 #define	VDOP_RAS	0x90		/* read and scatter */
299 #define	VDOP_RDRAW	0x600		/* read unformatted disk sector */
300 #define	VDOP_CMP	0xa0		/* compare */
301 #define	VDOP_FTC	0xe0		/* full track compare */
302 #define	VDOP_RHDE	0x180		/* read header, data & ecc */
303 #define	VDOP_WD		0x00		/* write data */
304 #define	VDOP_FTW	0x40		/* full track write */
305 #define	VDOP_WTC	0x20		/* write then compare */
306 #define	VDOP_FTWTC	0x60		/* full track write then compare */
307 #define	VDOP_GAW	0x10		/* gather and write */
308 #define	VDOP_WDE	0x100		/* write data & ecc */
309 #define	VDOP_FSECT	0x900		/* format sector */
310 #define	VDOP_GWC	0x30		/* gather write & compare */
311 #define	VDOP_START	0x800		/* start drives */
312 #define	VDOP_RELEASE	0xa00		/* stop drives */
313 #define	VDOP_SEEK	0xb00		/* seek */
314 #define	VDOP_INIT	0xc00		/* initialize controller */
315 #define	VDOP_DIAG	0xd00		/* diagnose (self-test) controller */
316 #define	VDOP_CONFIG	0xe00		/* reset & configure drive */
317 #define	VDOP_STATUS	0xf00		/* get drive status */
318 #define	VDOP_IDENT	0x700		/* identify controller */
319 
320 #define	VDOP_ABORT	0x80000000	/* abort current command */
321 
322 /*
323  * DCB status definitions.
324  */
325 #define	DCBS_HCRC	0x00000001	/* header crc error */
326 #define	DCBS_HCE	0x00000002	/* header compare error */
327 #define	DCBS_WPT	0x00000004	/* drive write protected */
328 #define	DCBS_CHE	0x00000008	/* controller hardware error */
329 #define	DCBS_SKI	0x00000010	/* seek incomplete */
330 #define	DCBS_UDE	0x00000020	/* uncorrectable data error */
331 #define	DCBS_OCYL	0x00000040	/* off cylinder */
332 #define	DCBS_NRDY	0x00000080	/* drive not ready */
333 #define	DCBS_ATA	0x00000100	/* alternate track accessed */
334 #define	DCBS_SKS	0x00000200	/* seek started */
335 #define	DCBS_IVA	0x00000400	/* invalid disk address error */
336 #define	DCBS_NEM	0x00000800	/* non-existant memory error */
337 #define	DCBS_DPE	0x00001000	/* memory data parity error */
338 #define	DCBS_DCE	0x00002000	/* data compare error */
339 #define	DCBS_DDI	0x00004000	/* ddi ready */
340 #define	DCBS_OAB	0x00008000	/* operation aborted */
341 #define	DCBS_DSE	0x00010000	/* data strobe early */
342 #define	DCBS_DSL	0x00020000	/* data strobe late */
343 #define	DCBS_TOP	0x00040000	/* track offset plus */
344 #define	DCBS_TOM	0x00080000	/* track offset minus */
345 #define	DCBS_CCD	0x00100000	/* controller corrected data */
346 #define	DCBS_HARD	0x00200000	/* hard error */
347 #define	DCBS_SOFT	0x00400000	/* soft error (retry succesful) */
348 #define	DCBS_ERR	0x00800000	/* composite error */
349 #define DCBS_IVC	0x01000000	/* invalid command error */
350 /* bits 24-27 unused */
351 #define	DCBS_BSY	0x10000000	/* controller busy */
352 #define	DCBS_ICC	0x60000000	/* interrupt cause code */
353 #define	DCBS_INT	0x80000000	/* interrupt generated for this dcb */
354 
355 #define	VDERRBITS	"\20\1HCRC\2HCE\3WPT\4CHE\5DSKI\6UDE\7OCYL\10NRDY\
356 \11ATA\12SKS\13IVA\14NEM\15DPE\16DCE\17DDI\20OAB\21DSE\22DSL\23TOP\24TOM\
357 \25CCD\26HARD\27SOFT\30ERR\31IVC\35ABORTED\36FAIL\37COMPLETE\40STARTED"
358 
359 /* drive related errors */
360 #define	VDERR_DRIVE	(DCBS_SKI|DCBS_OCYL|DCBS_NRDY|DCBS_IVA)
361 /* controller related errors */
362 #define	VDERR_CTLR	(DCBS_CHE|DCBS_OAB|DCBS_IVC|DCBS_NEM)
363 /* potentially recoverable errors */
364 #define	VDERR_RETRY \
365     (VDERR_DRIVE|VDERR_CTLR|DCBS_DCE|DCBS_DPE|DCBS_HCRC|DCBS_HCE)
366 /* uncorrected data errors */
367 #define	VDERR_HARD	(VDERR_RETRY|DCBS_WPT|DCBS_UDE)
368 
369 /*
370  * DCB status codes.
371  */
372 #define	DCBS_ABORT	0x10000000	/* dcb aborted */
373 #define	DCBS_FAIL	0x20000000	/* dcb unsuccesfully completed */
374 #define	DCBS_DONE	0x40000000	/* dcb complete */
375 #define	DCBS_START	0x80000000	/* dcb started */
376 
377 /*
378  * DCB interrupt control.
379  */
380 #define	DCBINT_NONE	0x0		/* don't interrupt */
381 #define	DCBINT_ERR	0x2		/* interrupt on error */
382 #define	DCBINT_SUC	0x1		/* interrupt on success */
383 #define	DCBINT_DONE	(DCBINT_ERR|DCBINT_SUC)
384 #define	DCBINT_PBA	0x4		/* proceed before acknowledge */
385 
386 /*
387  * Sector formats.
388  */
389 typedef union {
390 	struct {
391 		dskadr	hdr_addr;
392 		short	smd_crc;
393 	} smd;
394 	struct {
395 		dskadr	physical;
396 		dskadr	logical;
397 		long	smd_e_crc;
398 	} smd_e;
399 } fmt_hdr;
400 
401 /* Sector Header bit assignments */
402 #define	VDMF	0x8000		/* Manufacturer Fault 1=good sector */
403 #define	VDUF	0x4000		/* User Fault 1=good sector */
404 #define	VDALT	0x2000		/* Alternate Sector 1=alternate */
405 #define	VDWPT	0x1000		/* Write Protect 1=Read Only Sector */
406 
407 /* input register assignments for DIOCWFORMAT ioctl */
408 #define	dk_op		df_reg[0]	/* opcode */
409 #define	dk_althdr	df_reg[1]	/* alt. sect. header, in an int! */
410 #define	dk_fmtflags	df_reg[2]	/* header format flags */
411 
412 /* output register assignments for DIOCWFORMAT ioctl */
413 #define	dk_operrsta	df_reg[0]	/* dcb operrsta */
414 #define	dk_ecode	df_reg[1]	/* smd-e err_code */
415