1 /* vdreg.h 1.9 87/03/10 */ 2 3 /* 4 * Versabus VDDC/SMDE disk controller definitions. 5 */ 6 7 /* 8 * Controller communications block. 9 */ 10 struct vddevice { 11 u_long vdcdr; /* controller device register */ 12 u_long vdreset; /* controller reset register */ 13 u_long vdcsr; /* control-status register */ 14 long vdrstclr; /* reset clear register */ 15 u_short vdstatus[16]; /* per-drive status register */ 16 u_short vdicf_status; /* status change interupt control format */ 17 u_short vdicf_done; /* interrupt complete control format */ 18 u_short vdicf_error; /* interrupt error control format */ 19 u_short vdicf_success; /* interrupt success control format */ 20 u_short vdtcf_mdcb; /* mdcb transfer control format */ 21 u_short vdtcf_dcb; /* dcb transfer control format */ 22 u_short vdtcf_trail; /* trail transfer control format */ 23 u_short vdtcf_data; /* data transfer control format */ 24 u_long vdccf; /* controller configuration flags */ 25 u_long vdsecsize; /* sector size */ 26 u_short vdfill0; 27 u_char vdcylskew; /* cylinder to cylinder skew factor */ 28 u_char vdtrackskew; /* track to track skew factor */ 29 u_long vdfill1; 30 u_long vddfr; /* diagnostic flag register */ 31 u_long vddda; /* diagnostic dump address */ 32 }; 33 34 /* controller types */ 35 #define VDTYPE_VDDC 1 /* old vddc controller (smd only) */ 36 #define VDTYPE_SMDE 2 /* new smde controller (smd-e) */ 37 38 /* 39 * Controller status definitions. 40 */ 41 #define CS_SCS 0xf /* status change source (drive number) */ 42 #define CS_ELC 0x10 /* error on last command */ 43 #define CS_ICC 0x60 /* interupt cause code */ 44 #define ICC_NOI 0x00 /* no interupt */ 45 #define ICC_DUN 0x20 /* no interupt */ 46 #define ICC_ERR 0x40 /* no interupt */ 47 #define ICC_SUC 0x60 /* no interupt */ 48 #define CS_GO 0x80 /* go bit (controller busy) */ 49 #define CS_BE 0x100 /* buss error */ 50 #define CS_BOK 0x4000 /* board ok */ 51 #define CS_SFL 0x8000 /* system fail */ 52 #define CS_LEC 0xff000000 /* last error code */ 53 54 /* 55 * Drive status definitions. 56 */ 57 #define STA_UR 0x1 /* unit ready */ 58 #define STA_OC 0x2 /* on cylinder */ 59 #define STA_SE 0x4 /* seek error */ 60 #define STA_DF 0x8 /* drive fault */ 61 #define STA_WP 0x10 /* write protected */ 62 #define STA_US 0x20 /* unit selected */ 63 64 /* 65 * Interupt Control Field definitions. 66 */ 67 #define ICF_IPL 0x7 /* interupt priority level */ 68 #define ICF_IEN 0x8 /* interupt enable */ 69 #define ICF_IV 0xff00 /* interupt vector */ 70 71 /* 72 * Transfer Control Format definitions. 73 */ 74 #define TCF_AM 0xff /* Address Modifier */ 75 #define AM_SNPDA 0x01 /* Standard Non-Privileged Data Access */ 76 #define AM_SASA 0x81 /* Standard Ascending Sequential Access */ 77 #define AM_ENPDA 0xf1 /* Extended Non-Privileged Data Access */ 78 #define AM_EASA 0xe1 /* Extended Ascending Sequential Access */ 79 #define TCF_BTE 0x800 /* Block Transfer Enable */ 80 81 /* 82 * Controller Configuration Flags. 83 */ 84 #define CCF_STS 0x1 /* sectors per track selectable */ 85 #define CCF_EAV 0x2 /* enable auto vector */ 86 #define CCF_ERR 0x4 /* enable reset register */ 87 #define CCF_DER 0x8 /* disable error recovery */ 88 #define CCF_XMD 0x60 /* xmd transfer mode (bus size) */ 89 #define XMD_8BIT 0x20 /* do only 8 bit transfers */ 90 #define XMD_16BIT 0x40 /* do only 16 bit transfers */ 91 #define XMD_32BIT 0x60 /* do only 32 bit transfers */ 92 #define CCF_BSZ 0x300 /* burst size */ 93 #define BSZ_16WRD 0x000 /* 16 word transfer burst */ 94 #define BSZ_12WRD 0x100 /* 12 word transfer burst */ 95 #define BSZ_8WRD 0x200 /* 8 word transfer burst */ 96 #define BSZ_4WRD 0x300 /* 4 word transfer burst */ 97 #define CCF_SEN 0x400 /* cylinder/track skew enable (for format) */ 98 #define CCF_ENP 0x1000 /* enable parity */ 99 #define CCF_EPE 0x2000 /* enable parity errors */ 100 #define CCF_EDE 0x10000 /* error detection enable */ 101 #define CCF_ECE 0x20000 /* error correction enable */ 102 103 /* 104 * Diagnostic register definitions. 105 */ 106 #define DIA_DC 0x7f /* dump count mask */ 107 #define DIA_DWR 0x80 /* dump write/read flag */ 108 #define DIA_ARE 0x100 /* auto rebuild enable */ 109 #define DIA_CEN 0x200 /* call enable flag */ 110 #define DIA_KEY 0xAA550000 /* reset enable key */ 111 112 /* 113 * Perform a reset on the controller. 114 */ 115 #define VDRESET(a,t) { \ 116 if ((t) == VDTYPE_SMDE) { \ 117 ((struct vddevice *)(a))->vddfr = DIA_KEY|DIA_CEN; \ 118 ((struct vddevice *)(a))->vdcdr = (u_long)0xffffffff; \ 119 DELAY(5000000); \ 120 } else { \ 121 ((struct vddevice *)(a))->vdreset = 0; \ 122 DELAY(1500000); \ 123 } \ 124 } 125 126 /* 127 * Abort a controller operation. 128 */ 129 #define VDABORT(a,t) { \ 130 if ((t) == VDTYPE_VDDC) { \ 131 movow((a), (VDOP_ABORT&0xffff0000)>>16) ; \ 132 movow((int)(a)+2, VDOP_ABORT&0xffff); \ 133 } else \ 134 ((struct vddevice *)(a))->vdcdr = (u_long)VDOP_ABORT; \ 135 DELAY(1000000); \ 136 } 137 138 /* 139 * Start a command. 140 */ 141 #define VDGO(a,mdcb,t) {\ 142 if ((t) == VDTYPE_VDDC) { \ 143 movow((a), ((int)(mdcb)&0xffff0000)>>16) ; \ 144 movow((int)((a))+2, (int)(mdcb)&0xffff); \ 145 } else \ 146 ((struct vddevice *)(a))->vdcdr = (mdcb); \ 147 } 148 149 /* 150 * MDCB layout. 151 */ 152 struct mdcb { 153 struct dcb *mdcb_head; /* first dcb in list */ 154 struct dcb *mdcb_busy; /* dcb being processed */ 155 struct dcb *mdcb_intr; /* dcb causing interrupt */ 156 long mdcb_status; /* status of dcb in mdcb_busy */ 157 }; 158 159 /* 160 * DCB definitions. 161 */ 162 163 /* 164 * A disk address. 165 */ 166 typedef struct { 167 u_char track; /* all 8 bits */ 168 u_char sector; /* all 8 bits */ 169 u_short cylinder; /* low order 12 bits */ 170 } dskadr; 171 172 /* 173 * DCB trailer formats. 174 */ 175 /* read/write trailer */ 176 typedef struct { 177 u_long memadr; /* memory address */ 178 u_long wcount; /* 16 bit word count */ 179 dskadr disk; /* disk address */ 180 } trrw; 181 182 /* scatter/gather trailer */ 183 #define VDMAXPAGES 32 184 typedef struct { 185 trrw start_addr; 186 struct { 187 u_long nxt_addr; 188 u_long nxt_len; 189 } addr_chain[VDMAXPAGES+1]; 190 } trsg; 191 192 /* seek trailer format */ 193 typedef struct { 194 dskadr skaddr; 195 } trseek; 196 197 /* format trailer */ 198 typedef struct { 199 char *addr; /* data buffer to be filled on sector*/ 200 long nsectors; /* # of sectors to be formatted */ 201 dskadr disk; /* disk physical address info */ 202 dskadr hdr; /* header address info */ 203 } trfmt; 204 205 /* reset/configure trailer */ 206 typedef struct { 207 long ncyl; /* # cylinders */ 208 long nsurfaces; /* # surfaces */ 209 long nsectors; /* # sectors */ 210 long slip_sec; /* # of slip sectors */ 211 long recovery; /* recovery flags */ 212 } treset; 213 214 /* 215 * DCB layout. 216 */ 217 struct dcb { 218 struct dcb *nxtdcb; /* next dcb */ 219 short intflg; /* interrupt settings and flags */ 220 short opcode; /* DCB command code etc... */ 221 long operrsta; /* error & status info */ 222 short fill; /* not used */ 223 char devselect; /* drive selection */ 224 char trailcnt; /* trailer Word Count */ 225 long err_memadr; /* error memory address */ 226 char err_code; /* error codes for SMD/E */ 227 char fill2; /* not used */ 228 short err_wcount; /* error word count */ 229 char err_trk; /* error track/sector */ 230 char err_sec; /* error track/sector */ 231 short err_cyl; /* error cylinder adr */ 232 union { 233 trseek sktrail; /* seek command trailer */ 234 trsg sgtrail; /* scatter/gather trailer */ 235 trrw rwtrail; /* read/write trailer */ 236 trfmt fmtrail; /* format trailer */ 237 treset rstrail; /* reset/configure trailer */ 238 } trail; 239 }; 240 241 /* 242 * DCB command codes. 243 */ 244 #define VDOP_RD 0x80 /* read data */ 245 #define VDOP_FTR 0xc0 /* full track read */ 246 #define VDOP_RAS 0x90 /* read and scatter */ 247 #define VDOP_RDRAW 0x600 /* read unformatted disk sector */ 248 #define VDOP_CMP 0xa0 /* compare */ 249 #define VDOP_FTC 0xe0 /* full track compare */ 250 #define VDOP_RHDE 0x180 /* read header, data & ecc */ 251 #define VDOP_WD 0x00 /* write data */ 252 #define VDOP_FTW 0x40 /* full track write */ 253 #define VDOP_WTC 0x20 /* write then compare */ 254 #define VDOP_FTWTC 0x60 /* full track write then compare */ 255 #define VDOP_GAW 0x10 /* gather and write */ 256 #define VDOP_WDE 0x100 /* write data & ecc */ 257 #define VDOP_FSECT 0x900 /* format sector */ 258 #define VDOP_GWC 0x30 /* gather write & compare */ 259 #define VDOP_START 0x800 /* start drives */ 260 #define VDOP_RELEASE 0xa00 /* stop drives */ 261 #define VDOP_SEEK 0xb00 /* seek */ 262 #define VDOP_INIT 0xc00 /* initialize controller */ 263 #define VDOP_DIAG 0xd00 /* diagnose (self-test) controller */ 264 #define VDOP_CONFIG 0xe00 /* reset & configure drive */ 265 #define VDOP_STATUS 0xf00 /* get drive status */ 266 267 #define VDOP_ABORT 0x80000000 /* abort current command */ 268 269 /* 270 * DCB status definitions. 271 */ 272 #define DCBS_HCRC 0x00000001 /* header crc error */ 273 #define DCBS_HCE 0x00000002 /* header compare error */ 274 #define DCBS_WPT 0x00000004 /* drive write protected */ 275 #define DCBS_CHE 0x00000008 /* controller hardware error */ 276 #define DCBS_SKI 0x00000010 /* seek incomplete */ 277 #define DCBS_UDE 0x00000020 /* uncorrectable data error */ 278 #define DCBS_OCYL 0x00000040 /* off cylinder */ 279 #define DCBS_NRDY 0x00000080 /* drive not ready */ 280 #define DCBS_ATA 0x00000100 /* alternate track accessed */ 281 #define DCBS_SKS 0x00000200 /* seek started */ 282 #define DCBS_IVA 0x00000400 /* invalid disk address error */ 283 #define DCBS_NEM 0x00000800 /* non-existant memory error */ 284 #define DCBS_DPE 0x00001000 /* memory data parity error */ 285 #define DCBS_DCE 0x00002000 /* data compare error */ 286 #define DCBS_DDI 0x00004000 /* ddi ready */ 287 #define DCBS_OAB 0x00008000 /* operation aborted */ 288 #define DCBS_DSE 0x00010000 /* data strobe early */ 289 #define DCBS_DSL 0x00020000 /* data strobe late */ 290 #define DCBS_TOP 0x00040000 /* track offset plus */ 291 #define DCBS_TOM 0x00080000 /* track offset minus */ 292 #define DCBS_CCD 0x00100000 /* controller corrected data */ 293 #define DCBS_HARD 0x00200000 /* hard error */ 294 #define DCBS_SOFT 0x00400000 /* soft error (retry succesful) */ 295 #define DCBS_ERR 0x00800000 /* composite error */ 296 #define DCBS_IVC 0x01000000 /* invalid command error */ 297 /* bits 24-27 unused */ 298 #define DCBS_BSY 0x10000000 /* controller busy */ 299 #define DCBS_ICC 0x60000000 /* interrupt cause code */ 300 #define DCBS_INT 0x80000000 /* interrupt generated for this dcb */ 301 302 #define VDERRBITS "\20\1HCRC\2HCE\3WPT\4CHE\5DSKI\6UDE\7OCYL\10NRDY\ 303 \11ATA\12SKS\13IVA\14NEM\15DPE\16DCE\17DDI\20OAB\21DSE\22DSL\23TOP\24TOM\ 304 \25CCD\26HARD\27SOFT\30ERR\31IVC\35ABORTED\36FAIL\37COMPLETE\40STARTED" 305 306 /* drive related errors */ 307 #define VDERR_DRIVE (DCBS_SKI|DCBS_OCYL|DCBS_NRDY|DCBS_IVA) 308 /* controller related errors */ 309 #define VDERR_CTLR (DCBS_CHE|DCBS_OAB|DCBS_IVC|DCBS_NEM) 310 /* potentially recoverable errors */ 311 #define VDERR_RETRY \ 312 (VDERR_DRIVE|VDERR_CTLR|DCBS_DCE|DCBS_DPE|DCBS_HCRC|DCBS_HCE) 313 /* uncorrected data errors */ 314 #define VDERR_HARD (VDERR_RETRY|DCBS_WPT|DCBS_UDE) 315 316 /* 317 * DCB status codes. 318 */ 319 #define DCBS_ABORT 0x10000000 /* dcb aborted */ 320 #define DCBS_FAIL 0x20000000 /* dcb unsuccesfully completed */ 321 #define DCBS_DONE 0x40000000 /* dcb complete */ 322 #define DCBS_START 0x80000000 /* dcb started */ 323 324 /* 325 * DCB interrupt control. 326 */ 327 #define DCBINT_NONE 0x0 /* don't interrupt */ 328 #define DCBINT_ERR 0x2 /* interrupt on error */ 329 #define DCBINT_SUC 0x1 /* interrupt on success */ 330 #define DCBINT_DONE (DCBINT_ERR|DCBINT_SUC) 331 #define DCBINT_PBA 0x4 /* proceed before acknowledge */ 332 333 /* 334 * Sector formats. 335 */ 336 typedef union { 337 struct { 338 dskadr hdr_addr; 339 short smd_crc; 340 } smd; 341 struct { 342 dskadr physical; 343 dskadr logical; 344 long smd_e_crc; 345 } smd_e; 346 } fmt_hdr; 347 348 /* Sector Header bit assignments */ 349 #define VDMF 0x8000 /* Manufacturer Fault 1=good sector */ 350 #define VDUF 0x4000 /* User Fault 1=good sector */ 351 #define VDALT 0x2000 /* Alternate Sector 1=alternate */ 352 #define VDWPT 0x1000 /* Write Protect 1=Read Only Sector */ 353