xref: /csrg-svn/sys/tahoe/vba/vd.c (revision 25928)
1*25928Ssam /*	vd.c	1.7	86/01/21	*/
224004Ssam 
324004Ssam #include "fsd.h"
424004Ssam #if NVD > 0
524004Ssam /*
625675Ssam  * VDDC - Versabus SMD/ESMD driver.
725675Ssam  */
825877Ssam #ifdef VDDCPERF
925877Ssam #define	DOSCOPE
1025877Ssam #endif
1125877Ssam 
1225675Ssam #include "../tahoe/mtpr.h"
1325675Ssam #include "../tahoe/pte.h"
1424004Ssam 
1525675Ssam #include "param.h"
1625675Ssam #include "buf.h"
1725675Ssam #include "cmap.h"
1825675Ssam #include "conf.h"
1925675Ssam #include "dir.h"
2025675Ssam #include "dk.h"
2125675Ssam #include "map.h"
2225675Ssam #include "systm.h"
2325675Ssam #include "user.h"
2425675Ssam #include "vmmac.h"
2525675Ssam #include "proc.h"
2625675Ssam #include "uio.h"
2724004Ssam 
2825675Ssam #include "../tahoevba/vbavar.h"
2925675Ssam #define	VDGENDATA
30*25928Ssam #include "../tahoevba/vdreg.h"
3125675Ssam #undef VDGENDATA
3225877Ssam #include "../tahoevba/scope.h"
3324004Ssam 
3425925Ssam #define	VDMAXIO		(MAXBPTE*NBPG)
3525675Ssam #define	DUMPSIZE	64	/* controller limit */
3624004Ssam 
3724004Ssam #define VDUNIT(x)	(minor(x) >> 3)
3825675Ssam #define FILSYS(x)	(minor(x) & 0x07)
3925675Ssam #define PHYS(x)		(vtoph((struct proc *)0, (unsigned)(x)))
4025675Ssam #define TRUE		1
4125675Ssam #define	FALSE		0
4224004Ssam 
4325675Ssam #define CTLR_ERROR	1
4425675Ssam #define DRIVE_ERROR	2
4525675Ssam #define HARD_DATA_ERROR	3
4625675Ssam #define SOFT_DATA_ERROR	4
4724004Ssam 
4825675Ssam #define b_cylin	b_resid
4925675Ssam #define b_daddr	b_error
5024004Ssam 
5124004Ssam struct	vba_ctlr *vdminfo[NVD];
5224004Ssam struct  vba_device *vddinfo[NFSD];
5325675Ssam int	vdprobe(), vdslave(), vdattach(), vddgo();
5425675Ssam struct	vba_driver vddriver =
5525675Ssam     { vdprobe, vdslave, vdattach, vddgo, vddcaddr, "smd/fsd",
5625675Ssam       vddinfo, "vd", vdminfo };
5724004Ssam 
5824004Ssam /*
5925675Ssam  * Per-drive state.
6025675Ssam  */
6125675Ssam typedef struct {
6225675Ssam 	struct	buf raw_q_element;
6325675Ssam 	short	sec_per_blk;
6425675Ssam 	short	sec_per_cyl;
6525675Ssam 	char	status;
6625675Ssam 	struct	buf xfer_queue;
6725675Ssam 	int	drive_type;
6825675Ssam 	fs_tab	info;
6925675Ssam } unit_tab;
7024004Ssam 
7124004Ssam /*
7225675Ssam  * Per-controller state.
7325675Ssam  */
7425675Ssam typedef struct {
7525675Ssam 	char	ctlr_type;	/* controller type */
7625925Ssam 	struct	pte *map;	/* i/o page map */
7725925Ssam 	caddr_t	utl;		/* mapped i/o space */
7825675Ssam 	u_int	cur_slave:8;	/* last active unit number */
7925675Ssam 	u_int	int_expected:1;	/* expect an interupt */
8025675Ssam 	u_int	ctlr_started:1;	/* start command was issued */
8125675Ssam 	u_int	overlap_seeks:1;/* should overlap seeks */
8225925Ssam 	u_int	initdone:1;	/* controller initialization completed */
8325675Ssam 	u_int	off_cylinder:16;/* off cylinder bit map */
8425675Ssam 	u_int	unit_type[16];	/* slave types */
8525675Ssam 	u_int	cur_cyl[16];	/* cylinder last selected */
8625675Ssam 	long	cur_trk[16];	/* track last selected */
8725675Ssam 	fmt_mdcb ctlr_mdcb;	/* controller mdcb */
8825675Ssam 	fmt_dcb	ctlr_dcb;	/* r/w dcb */
8925675Ssam 	fmt_dcb	seek_dcb[4];	/* dcbs for overlapped seeks */
9025675Ssam 	/* buffer for raw/swap i/o */
9125925Ssam 	char	rawbuf[VDMAXIO];
9225675Ssam } ctlr_tab;
9324004Ssam 
9425925Ssam ctlr_tab vdctlr_info[NVD];
9525675Ssam unit_tab vdunit_info[NFSD];
9624004Ssam 
9724004Ssam /*
9825675Ssam  * See if the controller is really there; if so, initialize it.
9925675Ssam  */
10025857Ssam vdprobe(reg, vm)
10125857Ssam 	caddr_t reg;
10225857Ssam 	struct vba_ctlr *vm;
10325675Ssam {
10425857Ssam 	register br, cvec;		/* must be r12, r11 */
10525925Ssam 	register cdr *addr = (cdr *)reg;
10625925Ssam 	register ctlr_tab *ci;
10725925Ssam 	int i;
10825857Ssam 
10925857Ssam 	if (badaddr((caddr_t)reg, 2))
11025675Ssam 		return (0);
11125925Ssam 	ci = &vdctlr_info[vm->um_ctlr];
11225925Ssam 	addr->cdr_reset = 0xffffffff;
11325675Ssam 	DELAY(1000000);
11425925Ssam 	if (addr->cdr_reset != (unsigned)0xffffffff) {
11525925Ssam 		ci->ctlr_type = SMDCTLR;
11625925Ssam 		ci->overlap_seeks = 0;
11725675Ssam 		DELAY(1000000);
11825675Ssam 	} else {
11925925Ssam 		ci->overlap_seeks = 1;
12025925Ssam 		ci->ctlr_type = SMD_ECTLR;
12125925Ssam 		addr->cdr_reserved = 0x0;
12225675Ssam 		DELAY(3000000);
12325925Ssam 		addr->cdr_csr = 0;
12425925Ssam 		addr->mdcb_tcf = AM_ENPDA;
12525925Ssam 		addr->dcb_tcf = AM_ENPDA;
12625925Ssam 		addr->trail_tcf = AM_ENPDA;
12725925Ssam 		addr->data_tcf = AM_ENPDA;
12825925Ssam 		addr->cdr_ccf = CCF_STS | XMD_32BIT | BSZ_16WRD |
12925925Ssam 		    CCF_ENP | CCF_EPE | CCF_EDE | CCF_ECE | CCF_ERR;
13025675Ssam 	}
13125925Ssam 	/*
13225925Ssam 	 * Allocate page tables.
13325925Ssam 	 */
13425925Ssam 	vbmapalloc(btoc(VDMAXIO)+1, &ci->map, &ci->utl);
13525925Ssam 	/*
13625925Ssam 	 * Initialize all the drives to be of an unknown type.
13725925Ssam 	 */
13825925Ssam 	for (i = 0; i < 15; i++)
13925925Ssam 		ci->unit_type[i] = UNKNOWN;
14025857Ssam 	br = 0x17, cvec = 0xe0 + vm->um_ctlr;	/* XXX */
14125925Ssam 	return (sizeof (*addr));
14225675Ssam }
14324004Ssam 
14424004Ssam /*
14525675Ssam  * See if a drive is really there
14625675Ssam  * Try to reset/configure the drive, then test its status.
14725675Ssam  */
14825675Ssam vdslave(vi, addr)
14925675Ssam 	register struct vba_device *vi;
15025675Ssam 	register cdr *addr;
15125675Ssam {
15225675Ssam 	register ctlr_tab *ci = &vdctlr_info[vi->ui_ctlr];
15325675Ssam 	register unit_tab *ui = &vdunit_info[vi->ui_unit];
15425675Ssam 	register fmt_mdcb *mdcb = &ci->ctlr_mdcb;
15525675Ssam 	register fmt_dcb *dcb = &ci->ctlr_dcb;
15625675Ssam 	register int type;
15724004Ssam 
15825925Ssam 	if (!ci->initdone) {
15925925Ssam 		printf("vd%d: %s controller\n", vi->ui_ctlr,
16025860Ssam 		    ci->ctlr_type == SMDCTLR ? "smd" : "xsmd");
16125925Ssam 		if (vdnotrailer(addr, vi->ui_ctlr, vi->ui_slave, INIT, 10) &
16225925Ssam 		    HRDERR) {
16325925Ssam 			printf("vd%d: init error\n", vi->ui_ctlr);
16425675Ssam 			return (0);
16525675Ssam 		}
16625925Ssam 		if (vdnotrailer(addr, vi->ui_ctlr, vi->ui_slave, DIAG, 10) &
16725925Ssam 		    HRDERR) {
16825925Ssam 			printf("vd%d: diagnostic error\n", vi->ui_ctlr);
16925675Ssam 			return (0);
17025675Ssam 		}
17125925Ssam 		ci->initdone = 1;
17225675Ssam 	}
17325675Ssam 	/*
17425675Ssam 	 * Seek on all drive types starting from the largest one.
17525675Ssam 	 * a successful seek to the last sector/cylinder/track verifies
17625675Ssam 	 * the drive type connected to this port.
17725675Ssam 	 */
17825675Ssam 	for (type = 0; type < nvddrv; type++) {
17925675Ssam 		/* XXX */
18025675Ssam 		if (ci->ctlr_type == SMDCTLR && vdst[type].nsec != 32)
18125675Ssam 			continue;
18225675Ssam 		/* XXX */
18325675Ssam 		if (!vdconfigure_drive(addr, vi->ui_ctlr, vi->ui_slave, type,0))
18425675Ssam 			return (0);
18525675Ssam 		dcb->opcode = (short)RD;
18625675Ssam 		dcb->intflg = NOINT;
18725675Ssam 		dcb->nxtdcb = (fmt_dcb *)0;	/* end of chain */
18825675Ssam 		dcb->operrsta = 0;
18925675Ssam 		dcb->devselect = (char)(vi->ui_slave);
19025675Ssam 		dcb->trailcnt = (char)(sizeof (trrw) / sizeof (long));
19125675Ssam 		dcb->trail.rwtrail.memadr = (char *)PHYS(ci->rawbuf);
19225675Ssam 		dcb->trail.rwtrail.wcount = vdst[type].secsize/sizeof(short);
19325675Ssam 		dcb->trail.rwtrail.disk.cylinder = vdst[type].ncyl - 2;
19425675Ssam 		dcb->trail.rwtrail.disk.track = vdst[type].ntrak - 1;
19525675Ssam 		dcb->trail.rwtrail.disk.sector = vdst[type].nsec - 1;
19625675Ssam 		mdcb->firstdcb = (fmt_dcb *)(PHYS(dcb));
19725675Ssam 		mdcb->vddcstat = 0;
19825675Ssam 		VDDC_ATTENTION(addr, (fmt_mdcb *)(PHYS(mdcb)), ci->ctlr_type);
19925925Ssam 		if (!vdpoll(ci, addr, 60))
20025675Ssam 			printf(" during probe\n");
20125675Ssam 		if ((dcb->operrsta&HRDERR) == 0)
20225675Ssam 			break;
20325675Ssam 	}
20425675Ssam 	if (type >= nvddrv) {
20525675Ssam 		/*
20625675Ssam 		 * If reached here, a drive which is not defined in the
20725675Ssam 		 * 'vdst' tables is connected. Cannot set it's type.
20825675Ssam 		 */
20925675Ssam 		printf("vd%d: unknown drive type\n", vi->ui_unit);
21025675Ssam 		return (0);
21125675Ssam 	}
21225675Ssam 	ui->drive_type = type;
21325675Ssam 	ui->info = vdst[type];
21425675Ssam 	ui->sec_per_blk = DEV_BSIZE / ui->info.secsize;
21525675Ssam 	vi->ui_type = type;
21625675Ssam  	vi->ui_dk = 1;
21725675Ssam 	vddriver.ud_dname = ui->info.type_name;
21825675Ssam 	return (1);
21924004Ssam }
22024004Ssam 
22125675Ssam vdconfigure_drive(addr, ctlr, slave, type, pass)
22225675Ssam 	register cdr *addr;
22325675Ssam 	int ctlr, slave, type, pass;
22424004Ssam {
22525675Ssam 	register ctlr_tab *ci = &vdctlr_info[ctlr];
22625675Ssam 
22725675Ssam 	ci->ctlr_dcb.opcode = RSTCFG;		/* command */
22825675Ssam 	ci->ctlr_dcb.intflg = NOINT;
22925675Ssam 	ci->ctlr_dcb.nxtdcb = (fmt_dcb *)0;	/* end of chain */
23025675Ssam 	ci->ctlr_dcb.operrsta = 0;
23125675Ssam 	ci->ctlr_dcb.devselect = (char)slave;
23225675Ssam 	ci->ctlr_dcb.trail.rstrail.ncyl = vdst[type].ncyl;
23325675Ssam 	ci->ctlr_dcb.trail.rstrail.nsurfaces = vdst[type].ntrak;
23425675Ssam 	if (ci->ctlr_type == SMD_ECTLR) {
23525675Ssam 		ci->ctlr_dcb.trailcnt = (char)4;
23625675Ssam 		ci->ctlr_dcb.trail.rstrail.nsectors = vdst[type].nsec;
23725675Ssam 		ci->ctlr_dcb.trail.rstrail.slip_sec = vdst[type].nslip;
23825675Ssam 	} else
23925675Ssam 		ci->ctlr_dcb.trailcnt = (char)2;
24025675Ssam 	ci->ctlr_mdcb.firstdcb = (fmt_dcb *)(PHYS(&ci->ctlr_dcb));
24125675Ssam 	ci->ctlr_mdcb.vddcstat = 0;
24225675Ssam 	VDDC_ATTENTION(addr, (fmt_mdcb *)(PHYS(&ci->ctlr_mdcb)), ci->ctlr_type);
24325925Ssam 	if (!vdpoll(ci, addr, 5)) {
24425675Ssam 		printf(" during config\n");
24525675Ssam 		return (0);
24625675Ssam 	}
24725675Ssam 	if (ci->ctlr_dcb.operrsta & HRDERR) {
24825675Ssam 		if ((ci->ctlr_dcb.operrsta & (NOTCYLERR|DRVNRDY)) == 0)
24925675Ssam 			printf("vd%d: drive %d: config error\n", ctlr, slave);
25025675Ssam 		else if (pass == 0) {
25125675Ssam 			vdstart_drive(addr, ctlr, slave);
25225675Ssam 			return (vdconfigure_drive(addr, ctlr, slave, type, 1));
25325675Ssam 		} else if (pass == 2)
25425675Ssam 			return (vdconfigure_drive(addr, ctlr, slave, type, 3));
25525675Ssam 		return (0);
25625675Ssam 	}
25725675Ssam 	return (1);
25824004Ssam }
25924004Ssam 
26025675Ssam vdstart_drive(addr, ctlr, slave)
26125675Ssam 	cdr *addr;
26225675Ssam 	register int ctlr, slave;
26324004Ssam {
26425675Ssam 	int error = 0;
26524004Ssam 
26625675Ssam 	printf("vd%d: starting drive %d, wait...", ctlr, slave);
26725675Ssam 	if (vdctlr_info[ctlr].ctlr_started) {
26825675Ssam printf("DELAY(5500000)...");
26925675Ssam 		DELAY(5500000);
27025675Ssam 		goto done;
27124004Ssam 	}
27225675Ssam 	vdctlr_info[ctlr].ctlr_started = 1;
27325675Ssam 	error = vdnotrailer(addr, ctlr, 0, VDSTART, (slave*6)+62) & HRDERR;
27425675Ssam 	if (!error) {
27525675Ssam printf("DELAY(%d)...", (slave * 5500000) + 62000000);
27625675Ssam 		DELAY((slave * 5500000) + 62000000);
27724004Ssam 	}
27825675Ssam done:
27925675Ssam 	printf("\n");
28025675Ssam 	return (error == 0);
28125675Ssam }
28224004Ssam 
28325675Ssam vdnotrailer(addr, ctlr, unit, function, time)
28425675Ssam 	register cdr *addr;
28525675Ssam 	int ctlr, unit, function, time;
28624004Ssam {
28725925Ssam 	register ctlr_tab *ci = &vdctlr_info[ctlr];
28825925Ssam 	fmt_mdcb *mdcb = &ci->ctlr_mdcb;
28925925Ssam 	fmt_dcb *dcb = &ci->ctlr_dcb;
29024004Ssam 
29125675Ssam 	dcb->opcode = function;		/* command */
29224004Ssam 	dcb->intflg = NOINT;
29325675Ssam 	dcb->nxtdcb = (fmt_dcb *)0;	/* end of chain */
29425675Ssam 	dcb->operrsta = 0;
29525675Ssam 	dcb->devselect = (char)unit;
29624004Ssam 	dcb->trailcnt = (char)0;
29725675Ssam 	mdcb->firstdcb = (fmt_dcb *)(PHYS(dcb));
29824004Ssam 	mdcb->vddcstat = 0;
29925925Ssam 	VDDC_ATTENTION(addr, (fmt_mdcb *)(PHYS(mdcb)), ci->ctlr_type);
30025925Ssam 	if (!vdpoll(ci, addr, time)) {
30125675Ssam 		printf(" during init\n");
30225675Ssam 		return (DCBCMP|ANYERR|HRDERR|OPABRT);
30324004Ssam 	}
30425675Ssam 	return (dcb->operrsta);
30525675Ssam }
30624004Ssam 
30725675Ssam vdattach(vi)
30825675Ssam 	register struct vba_device *vi;
30925675Ssam {
31025675Ssam 	register unit_tab *ui = &vdunit_info[vi->ui_unit];
31125675Ssam 	register ctlr_tab *ci = &vdctlr_info[vi->ui_ctlr];
31225675Ssam 	register struct buf *cq = &vi->ui_mi->um_tab;
31325675Ssam 	register struct buf *uq = cq->b_forw;
31425675Ssam 	register struct buf *start_queue = uq;
31525675Ssam 	register fs_tab	*fs = &ui->info;
31625675Ssam 
31725675Ssam 	ui->info = vdst[vi->ui_type];
31825675Ssam 	ui->sec_per_blk = DEV_BSIZE / ui->info.secsize;
31925675Ssam 	ui->sec_per_cyl = ui->info.nsec * ui->info.ntrak;
32025675Ssam 	ui->xfer_queue.b_dev = vi->ui_slave;
32125675Ssam 	ci->unit_type[vi->ui_slave] = vi->ui_type;
32225675Ssam 	/* load unit into controller's active unit list */
32325675Ssam 	if (uq == NULL) {
32425675Ssam 		cq->b_forw = &ui->xfer_queue;
32525675Ssam 		ui->xfer_queue.b_forw = &ui->xfer_queue;
32625675Ssam 		ui->xfer_queue.b_back = &ui->xfer_queue;
32725675Ssam 	} else {
32825675Ssam 		while (uq->b_forw != start_queue)
32925675Ssam 			uq = uq->b_forw;
33025675Ssam 		ui->xfer_queue.b_forw = start_queue;
33125675Ssam 		ui->xfer_queue.b_back = uq;
33225675Ssam 		uq->b_forw = &ui->xfer_queue;
33325675Ssam 		start_queue->b_back = &ui->xfer_queue;
33425675Ssam 	}
33524004Ssam 	/*
33625675Ssam 	 * (60 / rpm) / (number of sectors per track * (bytes per sector / 2))
33724004Ssam 	 */
33825675Ssam 	dk_mspw[vi->ui_unit] = 120.0 / (fs->rpm * fs->nsec * fs->secsize);
33924004Ssam }
34024004Ssam 
34125675Ssam /*ARGSUSED*/
34225675Ssam vddgo(um)
34325675Ssam 	struct vba_ctlr *um;
34424004Ssam {
34524004Ssam 
34624004Ssam }
34724004Ssam 
34824004Ssam vdstrategy(bp)
34925675Ssam 	register struct buf *bp;
35024004Ssam {
35125675Ssam 	register int unit = VDUNIT(bp->b_dev);
35225675Ssam 	register struct vba_device *vi = vddinfo[unit];
35325675Ssam 	register par_tab *par;
35425675Ssam 	register unit_tab *ui;
35525675Ssam 	register fs_tab *fs;
35625675Ssam 	register int blks, bn, s;
35724004Ssam 
35825675Ssam 	if (bp->b_bcount == 0 || vi == 0 || vi->ui_alive == 0)
35925675Ssam 		goto bad;
36025675Ssam 	ui = &vdunit_info[unit];
36125675Ssam 	fs = &ui->info;
36225675Ssam 	par = &fs->partition[FILSYS(bp->b_dev)];
36325675Ssam 	blks = (bp->b_bcount + DEV_BSIZE-1) >> DEV_BSHIFT;
36425675Ssam 	if (bp->b_blkno + blks >= par->par_len) {
36525675Ssam 		blks = par->par_len - bp->b_blkno;
36625675Ssam 		if (blks <= 0)
36725675Ssam 			goto bad;
36825675Ssam 		bp->b_bcount = blks * DEV_BSIZE;
36925675Ssam 	}
37025675Ssam 	bn = bp->b_blkno + par->par_start;
37125675Ssam 	bn *= ui->sec_per_blk;
37225675Ssam 	bp->b_daddr = (bn / fs->nsec) % fs->ntrak;
37325675Ssam 	bp->b_cylin = bn / ui->sec_per_cyl;
37425675Ssam 	vbasetup(bp, ui->info.secsize);
37525675Ssam 	s = spl7();
37625675Ssam 	if (ui->xfer_queue.av_forw == NULL) {
37725675Ssam 		register ctlr_tab *ci = &vdctlr_info[vi->ui_ctlr];
37825675Ssam 		int slave = vi->ui_slave;
37924004Ssam 
38025675Ssam 		if (bp->b_cylin != ci->cur_cyl[slave] ||
38125675Ssam 		    bp->b_daddr != ci->cur_trk[slave])
38225675Ssam 			ci->off_cylinder |= 1 << slave;
38324004Ssam 	}
38425675Ssam 	bp->b_daddr |= (bn % fs->nsec) << 8;
38525675Ssam 	disksort(&ui->xfer_queue, bp);
38625675Ssam 	if (!vddinfo[unit]->ui_mi->um_tab.b_active++) {
38725675Ssam 		splx(s);
38825675Ssam 		vdstart(vddinfo[unit]->ui_mi);
38925675Ssam 	} else
39025675Ssam 		splx(s);
39124004Ssam 	return;
39225675Ssam bad:
39325675Ssam 	bp->b_flags |= B_ERROR, bp->b_error = ENXIO;
39425675Ssam 	bp->b_resid = bp->b_bcount;
39524004Ssam 	iodone(bp);
39624004Ssam }
39724004Ssam 
39824004Ssam /*
39924004Ssam  * Start up a transfer on a drive.
40024004Ssam  */
40125675Ssam vdstart(ci)
40225675Ssam 	register struct vba_ctlr *ci;
40324004Ssam {
40425675Ssam 	register struct buf *cq = &ci->um_tab;
40525675Ssam 	register struct buf *uq = cq->b_forw;
40624004Ssam 
40725675Ssam 	/* search for next ready unit */
40825675Ssam 	cq->b_forw = cq->b_forw->b_forw;
40925675Ssam 	uq = cq->b_forw;
41025675Ssam 	do {
41125675Ssam 		if (uq->av_forw != NULL) {
41225675Ssam 			cq->b_forw = uq;
41325675Ssam 			vdexecute(ci, uq);
41425675Ssam 			return;
41525675Ssam 		}
41625675Ssam 		uq = uq->b_forw;
41725675Ssam 	} while (uq != cq->b_forw);
41825675Ssam }
41925675Ssam 
42025675Ssam /*
42125675Ssam  * Initiate seeks for all drives off-cylinder.
42225675Ssam  */
42325675Ssam vdload_seeks(ci, uq)
42425675Ssam 	register ctlr_tab *ci;
42525675Ssam 	register struct buf *uq;
42625675Ssam {
42725675Ssam 	register int unit, slave, nseeks;
42825675Ssam 	register fmt_dcb *dcb;
42925675Ssam 	register struct buf *bp;
43025675Ssam 	register struct buf *start_queue = uq;
43125675Ssam 
43225675Ssam 	nseeks = 0;
43325675Ssam 	do {
43425675Ssam 		bp = uq->av_forw;
43525675Ssam 		if (bp != NULL) {
43625675Ssam 			unit = VDUNIT(bp->b_dev);
43725675Ssam 			slave = vddinfo[unit]->ui_slave;
43825675Ssam 			if (ci->off_cylinder & (1 << slave)) {
43925675Ssam 				ci->off_cylinder &= ~(1 << slave);
44025675Ssam 				if (ci->cur_cyl[slave] != bp->b_cylin) {
44125675Ssam 					ci->cur_cyl[slave] = bp->b_cylin;
44225675Ssam 					dk_seek[unit]++;
44325675Ssam 				}
44425675Ssam 				ci->cur_trk[slave] = bp->b_daddr&0xff;
44525675Ssam 				dcb = &ci->seek_dcb[nseeks++];
44625675Ssam 				dcb->opcode = SEEK;
44725675Ssam 				dcb->intflg = NOINT | INT_PBA;
44825675Ssam 				dcb->operrsta = 0;
44925675Ssam 				dcb->devselect = (char)slave;
45025675Ssam 				dcb->trailcnt = (char)1;
45125675Ssam 				dcb->trail.sktrail.skaddr.cylinder =
45225675Ssam 				    bp->b_cylin;
45325675Ssam 				dcb->trail.sktrail.skaddr.track =
45425675Ssam 				    bp->b_daddr & 0xff;
45525675Ssam 				dcb->trail.sktrail.skaddr.sector = 0;
45625675Ssam 			}
45725675Ssam 		}
45825675Ssam 		uq = uq->b_forw;
45925675Ssam 	} while (uq != start_queue && nseeks < 4);
46025675Ssam 	return (nseeks);
46125675Ssam }
46225675Ssam 
46325675Ssam extern	vd_int_timeout();
46425675Ssam /*
46525675Ssam  * Execute the next command on the unit queue uq.
46625675Ssam  */
46725675Ssam vdexecute(controller_info, uq)
46825675Ssam 	register struct vba_ctlr *controller_info;
46925675Ssam 	register struct buf *uq;
47025675Ssam {
47125675Ssam 	register struct	buf *bp = uq->av_forw;
47225675Ssam 	register int ctlr = controller_info->um_ctlr;
47325675Ssam 	register ctlr_tab *ci = &vdctlr_info[ctlr];
47425675Ssam 	register int unit = VDUNIT(bp->b_dev);
47525675Ssam 	register int slave = vddinfo[unit]->ui_slave;
47625675Ssam 	register fmt_mdcb *mdcb = &ci->ctlr_mdcb;
47725675Ssam 	register fmt_dcb *dcb = &ci->ctlr_dcb;
47825675Ssam 
47924004Ssam 	/*
48025675Ssam 	 * If there are overlapped seeks to perform, shuffle
48125675Ssam 	 * them to the front of the queue and get them started
48225675Ssam 	 * before any data transfers (to get some parallelism).
48324004Ssam 	 */
48425675Ssam 	if ((ci->off_cylinder & ~(1<<slave)) && ci->overlap_seeks) {
48525675Ssam 		register int i, nseeks;
48625675Ssam 
48725675Ssam 		/* setup seek requests in seek-q */
48825675Ssam 		nseeks = vdload_seeks(ci, uq);
48925675Ssam 		/* place at the front of the master q */
49025675Ssam 		mdcb->firstdcb = (fmt_dcb *)PHYS(&ci->seek_dcb[0]);
49125675Ssam 		/* shuffle any remaining seeks up in the seek-q */
49225675Ssam 		for (i = 1; i < nseeks; i++)
49325675Ssam 			ci->seek_dcb[i-1].nxtdcb =
49425675Ssam 			    (fmt_dcb *)PHYS(&ci->seek_dcb[i]);
49525675Ssam 		ci->seek_dcb[nseeks-1].nxtdcb = (fmt_dcb *)PHYS(dcb);
49625675Ssam 	} else {
49725675Ssam 		if (bp->b_cylin != ci->cur_cyl[slave]) {
49825675Ssam 			ci->cur_cyl[slave] = bp->b_cylin;
49925675Ssam 			dk_seek[unit]++;
50025675Ssam 		}
50125675Ssam 		ci->cur_trk[slave] = bp->b_daddr & 0xff;
50225675Ssam 		ci->off_cylinder = 0;
50325675Ssam 		mdcb->firstdcb = (fmt_dcb *)(PHYS(dcb));
50424004Ssam 	}
50524004Ssam 	dcb->opcode = (bp->b_flags & B_READ) ? RD : WD;
50625675Ssam 	dcb->intflg = INTDONE;
50725675Ssam 	dcb->nxtdcb = (fmt_dcb *)0;	/* end of chain */
50824004Ssam 	dcb->operrsta = 0;
50925675Ssam 	dcb->devselect = (char)slave;
51025675Ssam 	dcb->trailcnt = (char)(sizeof (trrw) / sizeof (long));
51125675Ssam 	dcb->trail.rwtrail.memadr = (char *)
51225675Ssam 	    vbastart(bp, ci->rawbuf, (long *)ci->map, ci->utl);
51325675Ssam 	dcb->trail.rwtrail.wcount = (short)((bp->b_bcount+1) / sizeof (short));
51425675Ssam 	dcb->trail.rwtrail.disk.cylinder = bp->b_cylin;
51525675Ssam 	dcb->trail.rwtrail.disk.track = bp->b_daddr & 0xff;
51625675Ssam 	dcb->trail.rwtrail.disk.sector = bp->b_daddr >> 8;
51725675Ssam 	mdcb->vddcstat = 0;
51825675Ssam    	dk_wds[unit] += bp->b_bcount / 32;
51925675Ssam 	ci->int_expected = 1;
52025675Ssam 	timeout(vd_int_timeout, (caddr_t)ctlr, 20*60);
52125675Ssam   	dk_busy |= 1 << unit;
52225675Ssam 	scope_out(1);
52325675Ssam 	VDDC_ATTENTION((cdr *)(vdminfo[ctlr]->um_addr),
52425675Ssam 	    (fmt_mdcb *)(PHYS(mdcb)), ci->ctlr_type);
52525675Ssam }
52624004Ssam 
52724004Ssam /*
52825675Ssam  * Watch for lost interrupts.
52925675Ssam  */
53025675Ssam vd_int_timeout(ctlr)
53125675Ssam 	register int ctlr;
53225675Ssam {
53325675Ssam 	register ctlr_tab *ci = &vdctlr_info[ctlr];
53425675Ssam 	register fmt_dcb *dcb = &ci->ctlr_dcb;
53524004Ssam 
53625675Ssam 	uncache(&dcb->operrsta);
53725675Ssam 	printf("vd%d: lost interupt, status %x", ctlr, dcb->operrsta);
53825675Ssam 	if (ci->ctlr_type == SMD_ECTLR) {
53925675Ssam 		uncache(&dcb->err_code);
54025675Ssam 		printf(", error code %x", dcb->err_code);
54124004Ssam 	}
54225675Ssam 	printf("\n");
54325675Ssam 	if ((dcb->operrsta&DCBCMP) == 0) {
54425675Ssam 		VDDC_ABORT((cdr *)(vdminfo[ctlr]->um_addr), ci->ctlr_type);
54525675Ssam 		dcb->operrsta |= DCBUSC | DCBABT | ANYERR | HRDERR | CTLRERR;
54625675Ssam 	}
54725675Ssam 	vdintr(ctlr);
54824004Ssam }
54924004Ssam 
55024004Ssam /*
55124004Ssam  * Handle a disk interrupt.
55224004Ssam  */
55325675Ssam vdintr(ctlr)
55425675Ssam 	register int ctlr;
55524004Ssam {
55625675Ssam 	register ctlr_tab *ci;
55725675Ssam 	register struct buf *cq, *uq, *bp;
55825675Ssam 	register int slave, unit;
55925675Ssam 	register fmt_mdcb  *mdcb;
56025675Ssam 	register fmt_dcb *dcb;
56125675Ssam 	int code, s;
56224004Ssam 
56325675Ssam 	untimeout(vd_int_timeout, (caddr_t)ctlr);
56424004Ssam 	scope_out(2);
56525675Ssam 	ci = &vdctlr_info[ctlr];
56625675Ssam 	if (!ci->int_expected) {
56725675Ssam 		printf("vd%d: stray interrupt\n", ctlr);
56824004Ssam 		return;
56924004Ssam 	}
57025675Ssam 	/*
57125675Ssam 	 * Take first request off controller's queue.
57225675Ssam 	 */
57325675Ssam 	cq = &vdminfo[ctlr]->um_tab;
57425675Ssam 	uq = cq->b_forw;
57525675Ssam 	bp = uq->av_forw;
57624004Ssam 	unit = VDUNIT(bp->b_dev);
57725675Ssam 	dk_busy &= ~(1 << unit);
57825675Ssam 	dk_xfer[unit]++;
57925675Ssam 	ci->int_expected = 0;
58025675Ssam 	/* find associated control blocks */
58125675Ssam 	mdcb = &ci->ctlr_mdcb, uncache(&mdcb->intdcb);
58225675Ssam 	dcb = &ci->ctlr_dcb, uncache(&dcb->operrsta);
58325675Ssam 	if (ci->ctlr_type == SMD_ECTLR)
58425675Ssam 		uncache(&dcb->err_code);
58525675Ssam 	slave = uq->b_dev;
58625675Ssam 	switch (code = vddecode_error(dcb)) {
58724004Ssam 
58825675Ssam 	case CTLR_ERROR:
58925675Ssam 	case DRIVE_ERROR:
59025675Ssam 		if (cq->b_errcnt >= 2)
59125675Ssam 			vdhard_error(ci, bp, dcb);
59225675Ssam 		if (code == CTLR_ERROR)
59325675Ssam 			vdreset_ctlr((cdr *)vdminfo[ctlr]->um_addr, ctlr);
59425675Ssam 		else
59525675Ssam 			reset_drive((cdr *)vdminfo[ctlr]->um_addr, ctlr,
59625675Ssam 			    slave, 2);
59725675Ssam 		if (cq->b_errcnt++ < 2) {	/* retry error */
59825675Ssam 			cq->b_forw = uq->b_back;
59925675Ssam 			vdstart(vdminfo[ctlr]);
60025675Ssam 			return;
60125675Ssam 		}
60225675Ssam 		bp->b_resid = bp->b_bcount;
60325675Ssam 		break;
60425675Ssam 
60525675Ssam 	case HARD_DATA_ERROR:
60625675Ssam 		vdhard_error(ci, bp, dcb);
60725675Ssam 		bp->b_resid = 0;
60825675Ssam 		break;
60925675Ssam 
61025675Ssam 	case SOFT_DATA_ERROR:
61125675Ssam 		vdsoft_error(ci, bp, dcb);
61225675Ssam 		/* fall thru... */
61325675Ssam 
61425675Ssam 	default:			/* operation completed */
61525675Ssam 		bp->b_error = 0;
61625675Ssam 		bp->b_resid = 0;
61725675Ssam 		break;
61824004Ssam 	}
61925675Ssam 	vbadone(bp, ci->rawbuf, (long *)ci->map, ci->utl);
62025675Ssam 	/*
62125675Ssam 	 * Take next request on this unit q, or, if none,
62225675Ssam 	 * the next request on the next active unit q.
62325675Ssam 	 */
62425675Ssam 	s = spl7();
62525675Ssam 	uq->av_forw = bp->av_forw;
62625675Ssam 	if (uq->av_back != bp) {
62725675Ssam 		register struct buf *next;
62824004Ssam 
62925675Ssam 		unit = VDUNIT(uq->av_forw->b_dev);
63025675Ssam 		slave = vddinfo[unit]->ui_slave;
63125675Ssam 		next = uq->av_forw;
63225675Ssam 		if (next->b_cylin != ci->cur_cyl[slave] ||
63325675Ssam 		    (next->b_daddr & 0xff) != ci->cur_trk[slave])
63425675Ssam 			ci->off_cylinder |= 1 << slave;
63525675Ssam 	} else
63625675Ssam 		uq->av_back = NULL;
63725675Ssam 	splx(s);
63825675Ssam 	/* reset controller state */
63925675Ssam 	cq->b_errcnt = 0;
64025675Ssam 	cq->b_active--;
64124004Ssam 	scope_out(3);
64225675Ssam 	if (bp->b_flags & B_ERROR)
64325675Ssam 		bp->b_error = EIO;
64424004Ssam 	iodone(bp);
64525675Ssam 	vdstart(vdminfo[ctlr]);
64624004Ssam }
64724004Ssam 
64825675Ssam /*
64925675Ssam  * Convert controller status to internal operation/error code.
65025675Ssam  */
65125675Ssam vddecode_error(dcb)
65225675Ssam 	register fmt_dcb *dcb;
65325675Ssam {
65424004Ssam 
65525675Ssam 	if (dcb->operrsta & HRDERR) {
65625675Ssam 		if (dcb->operrsta & (HCRCERR | HCMPERR | UCDATERR | WPTERR |
65725675Ssam 		    DSEEKERR | NOTCYLERR |DRVNRDY | INVDADR))
65825675Ssam 			return (DRIVE_ERROR);
65925675Ssam 		if (dcb->operrsta & (CTLRERR | OPABRT | INVCMD | DNEMEM))
66025675Ssam 			return (CTLR_ERROR);
66125675Ssam 		return (HARD_DATA_ERROR);
66225675Ssam 	}
66325675Ssam 	if (dcb->operrsta & SFTERR)
66425675Ssam 		return (SOFT_DATA_ERROR);
66525675Ssam 	return (0);
66625675Ssam }
66725675Ssam 
66825675Ssam /*
66925675Ssam  * Report a hard error.
67025675Ssam  */
67125675Ssam vdhard_error(ci, bp, dcb)
67225675Ssam 	ctlr_tab *ci;
67325675Ssam 	register struct buf *bp;
67425675Ssam 	register fmt_dcb *dcb;
67525675Ssam {
67625675Ssam 	unit_tab *ui = &vdunit_info[VDUNIT(bp->b_dev)];
67725675Ssam 
67825675Ssam 	bp->b_flags |= B_ERROR;
67925675Ssam 	harderr(bp, ui->info.type_name);
68025675Ssam 	printf("status %x", dcb->operrsta);
68125675Ssam 	if (ci->ctlr_type == SMD_ECTLR)
68225675Ssam 		printf(" ecode %x", dcb->err_code);
68325675Ssam 	printf("\n");
68425675Ssam }
68525675Ssam 
68625675Ssam /*
68725675Ssam  * Report a soft error.
68825675Ssam  */
68925675Ssam vdsoft_error(ci, bp, dcb)
69025675Ssam 	ctlr_tab *ci;
69125675Ssam 	register struct buf *bp;
69225675Ssam 	register fmt_dcb *dcb;
69325675Ssam {
69425675Ssam 	unit_tab *ui = &vdunit_info[VDUNIT(bp->b_dev)];
69525675Ssam 
69625675Ssam 	printf("%s%d%c: soft error sn%d status %x", ui->info.type_name,
69725857Ssam 	    minor(bp->b_dev) >> 3, 'a'+(minor(bp->b_dev)&07), bp->b_blkno,
69825675Ssam 	    dcb->operrsta);
69925675Ssam 	if (ci->ctlr_type == SMD_ECTLR)
70025675Ssam 		printf(" ecode %x", dcb->err_code);
70125675Ssam 	printf("\n");
70225675Ssam }
70325675Ssam 
70425675Ssam /*ARGSUSED*/
70525675Ssam vdopen(dev, flag)
70625675Ssam 	dev_t dev;
70725675Ssam 	int flag;
70825675Ssam {
70925675Ssam 	register unit = VDUNIT(dev);
71025675Ssam 	register struct vba_device *vi = vddinfo[unit];
71125675Ssam 
71225675Ssam 	if (vi == 0 || vi->ui_alive == 0 || vi->ui_type >= nvddrv)
71325675Ssam 		return (ENXIO);
71425675Ssam 	if (vdunit_info[unit].info.partition[FILSYS(dev)].par_len == 0)
71525675Ssam 		return (ENXIO);
71625675Ssam 	return (0);
71725675Ssam }
71825675Ssam 
71924004Ssam vdread(dev, uio)
72025675Ssam 	dev_t dev;
72125675Ssam 	struct uio *uio;
72224004Ssam {
72324004Ssam 	register int unit = VDUNIT(dev);
72425675Ssam 	register unit_tab *ui = &vdunit_info[unit];
72524004Ssam 
72624004Ssam 	if (unit >= NFSD)
72725675Ssam 		return (ENXIO);
72825675Ssam 	return (physio(vdstrategy, &ui->raw_q_element, dev, B_READ,
72925675Ssam 	    minphys, uio));
73024004Ssam }
73124004Ssam 
73224004Ssam vdwrite(dev, uio)
73325675Ssam 	dev_t dev;
73425675Ssam 	struct uio *uio;
73524004Ssam {
73624004Ssam 	register int unit = VDUNIT(dev);
73725675Ssam 	register unit_tab *ui = &vdunit_info[unit];
73824004Ssam 
73924004Ssam 	if (unit >= NFSD)
74025675Ssam 		return (ENXIO);
74125675Ssam 	return (physio(vdstrategy, &ui->raw_q_element, dev, B_WRITE,
74225675Ssam 	    minphys, uio));
74324004Ssam }
74424004Ssam 
74524004Ssam /*
74625675Ssam  * Crash dump.
74724004Ssam  */
74825675Ssam vddump(dev)
74925675Ssam 	dev_t dev;
75024004Ssam {
75125675Ssam 	register int unit = VDUNIT(dev);
75225675Ssam 	register unit_tab *ui = &vdunit_info[unit];
75325675Ssam 	register fs_tab *fs = &ui->info;
75425675Ssam 	register int ctlr = vddinfo[unit]->ui_ctlr;
75525675Ssam 	register struct vba_ctlr *vba_vdctlr_info = vdminfo[ctlr];
75625675Ssam 	register int filsys = FILSYS(dev);
75725675Ssam 	register cdr *addr = (cdr *)(vba_vdctlr_info->um_addr);
75825675Ssam 	register int cur_blk, blkcount, blocks;
75925675Ssam 	caddr_t memaddr;
76024004Ssam 
76125675Ssam 	vdreset_ctlr(addr, ctlr);
76224004Ssam 	blkcount = maxfree - 2;		/* In 1k byte pages */
76325675Ssam 	if (dumplo + blkcount > fs->partition[filsys].par_len) {
76425675Ssam 		blkcount = fs->partition[filsys].par_len - dumplo;
76525675Ssam 		printf("vd%d: Dump truncated to %dMB\n", unit, blkcount/1024);
76625675Ssam 	}
76725675Ssam 	cur_blk = fs->partition[filsys].par_start + dumplo;
76825675Ssam 	memaddr = 0;
76924004Ssam 	while (blkcount > 0) {
77025675Ssam 		blocks = MIN(blkcount, DUMPSIZE);
77125675Ssam 		if (!vdwrite_block(addr, ctlr, unit, memaddr, cur_blk, blocks))
77225675Ssam 			return (EIO);
77325675Ssam 		blkcount -= blocks;
77425675Ssam 		memaddr += blocks * NBPG;
77525675Ssam 		cur_blk += blocks;
77624004Ssam 	}
77725675Ssam 	return (0);
77824004Ssam }
77924004Ssam 
78025675Ssam /*
78125675Ssam  * Write a block to disk during a crash dump.
78225675Ssam  */
78325675Ssam vdwrite_block(caddr, ctlr, unit, addr, block, blocks)
78425675Ssam 	register cdr *caddr;
78525675Ssam 	register int ctlr, unit;
78625675Ssam 	register caddr_t addr;
78725675Ssam 	register int block, blocks;
78824004Ssam {
78925925Ssam 	register ctlr_tab *ci = &vdctlr_info[ctlr];
79025925Ssam 	register fmt_mdcb *mdcb = &ci->ctlr_mdcb;
79125925Ssam 	register fmt_dcb *dcb = &ci->ctlr_dcb;
79225675Ssam 	register unit_tab *ui = &vdunit_info[unit];
79325675Ssam 	register fs_tab	 *fs = &ui->info;
79424004Ssam 
79525675Ssam 	block *= (int)ui->sec_per_blk;
79625675Ssam 	blocks *= (int)ui->sec_per_blk;
79725675Ssam 	mdcb->firstdcb = (fmt_dcb *)(PHYS(dcb));
79825675Ssam 	dcb->intflg = NOINT;
79925675Ssam 	dcb->opcode = WD;
80025675Ssam 	dcb->operrsta = 0;
80125675Ssam 	dcb->devselect = (char)(vddinfo[unit])->ui_slave;
80225675Ssam 	dcb->trailcnt = (char)(sizeof (trrw) / sizeof (long));
80325675Ssam 	dcb->trail.rwtrail.memadr = addr;
80425675Ssam 	dcb->trail.rwtrail.wcount = (short)
80525675Ssam 	    ((blocks * fs->secsize)/ sizeof (short));
80625675Ssam 	dcb->trail.rwtrail.disk.cylinder = (short)(block / ui->sec_per_cyl);
80725675Ssam 	dcb->trail.rwtrail.disk.track = (char)((block / fs->nsec) % fs->ntrak);
80825675Ssam 	dcb->trail.rwtrail.disk.sector = (char)(block % fs->nsec);
80925925Ssam 	VDDC_ATTENTION(caddr, (fmt_mdcb *)(PHYS(mdcb)), ci->ctlr_type);
81025925Ssam 	if (!vdpoll(ci, caddr, 5)) {
81125675Ssam 		printf(" during dump\n");
81225675Ssam 		return (0);
81325675Ssam 	}
81425675Ssam 	if (dcb->operrsta & HRDERR) {
81525675Ssam 		printf("vd%d: hard error, status %x\n", unit, dcb->operrsta);
81625675Ssam 		return (0);
81725675Ssam 	}
81825675Ssam 	return (1);
81924004Ssam }
82024004Ssam 
82124004Ssam vdsize(dev)
82225675Ssam 	dev_t dev;
82324004Ssam {
82425675Ssam 	struct vba_device *vi = vddinfo[VDUNIT(dev)];
82524004Ssam 
82625675Ssam 	if (vi == 0 || vi->ui_alive == 0 || vi->ui_type >= nvddrv)
82725675Ssam 		return (-1);
82825675Ssam 	return (vdunit_info[VDUNIT(dev)].info.partition[FILSYS(dev)].par_len);
82924004Ssam }
83024004Ssam 
83125675Ssam /*
83225675Ssam  * Perform a controller reset.
83325675Ssam  */
83425675Ssam vdreset_ctlr(addr, ctlr)
83525675Ssam 	register cdr *addr;
83625675Ssam 	register int ctlr;
83724004Ssam {
83825675Ssam 	register struct buf *cq = &vdminfo[ctlr]->um_tab;
83925675Ssam 	register struct buf *uq = cq->b_forw;
84025675Ssam 	register ctlr_tab *ci = &vdctlr_info[ctlr];
84125675Ssam 
84225675Ssam 	VDDC_RESET(addr, ci->ctlr_type);
84325675Ssam 	ci->ctlr_started = 0;
84425675Ssam 	if (ci->ctlr_type == SMD_ECTLR) {
84525675Ssam 		addr->cdr_csr = 0;
84625675Ssam 		addr->mdcb_tcf = AM_ENPDA;
84725675Ssam 		addr->dcb_tcf = AM_ENPDA;
84825675Ssam 		addr->trail_tcf = AM_ENPDA;
84925675Ssam 		addr->data_tcf = AM_ENPDA;
85025675Ssam 		addr->cdr_ccf = CCF_STS | XMD_32BIT | BSZ_16WRD |
85125675Ssam 		    CCF_ENP | CCF_EPE | CCF_EDE | CCF_ECE | CCF_ERR;
85225675Ssam 	}
85325675Ssam 	if (vdnotrailer(addr, ctlr, 0, INIT, 10) & HRDERR) {
85425675Ssam 		printf("failed to init\n");
85525675Ssam 		return (0);
85625675Ssam 	}
85725675Ssam 	if (vdnotrailer(addr, ctlr, 0, DIAG, 10) & HRDERR) {
85825675Ssam 		printf("diagnostic error\n");
85925675Ssam 		return (0);
86025675Ssam 	}
86125675Ssam 	/*  reset all units attached to controller */
86225675Ssam 	uq = cq->b_forw;
86325675Ssam 	do {
86425675Ssam 		reset_drive(addr, ctlr, uq->b_dev, 0);
86525675Ssam 		uq = uq->b_forw;
86625675Ssam 	} while (uq != cq->b_forw);
86725675Ssam 	return (1);
86825675Ssam }
86924004Ssam 
87025675Ssam /*
87125675Ssam  * Perform a reset on a drive.
87225675Ssam  */
87325675Ssam reset_drive(addr, ctlr, slave, start)
87425675Ssam 	register cdr *addr;
87525675Ssam 	register int ctlr, slave, start;
87625675Ssam {
87725675Ssam 	register int type = vdctlr_info[ctlr].unit_type[slave];
87825675Ssam 
87925675Ssam 	if (type == UNKNOWN)
88025675Ssam 		return;
88125675Ssam 	if (!vdconfigure_drive(addr, ctlr, slave, type, start))
88225675Ssam 		printf("vd%d: drive %d: couldn't reset\n", ctlr, slave);
88325675Ssam }
88425675Ssam 
88525925Ssam /*
88625925Ssam  * Poll controller until operation completes
88725925Ssam  * or timeout expires.
88825925Ssam  */
88925925Ssam vdpoll(ci, addr, t)
89025925Ssam 	register ctlr_tab *ci;
89125925Ssam 	register cdr *addr;
89225925Ssam 	register int t;
89325925Ssam {
89425925Ssam 	register fmt_dcb *dcb = &ci->ctlr_dcb;
89525925Ssam 
89625925Ssam 	t *= 1000;
89725925Ssam 	uncache(&dcb->operrsta);
89825925Ssam 	while ((dcb->operrsta&(DCBCMP|DCBABT)) == 0) {
89925925Ssam 		DELAY(1000);
90025925Ssam 		uncache(&dcb->operrsta);
90125925Ssam 		if (--t <= 0) {
90225925Ssam 			printf("vd%d: controller timeout", ci-vdctlr_info);
90325925Ssam 			VDDC_ABORT(addr, ci->ctlr_type);
90425925Ssam 			DELAY(30000);
90525925Ssam 			uncache(&dcb->operrsta);
90625925Ssam 			return (0);
90725925Ssam 		}
90825925Ssam 	}
90925925Ssam 	if (ci->ctlr_type == SMD_ECTLR) {
91025925Ssam 		uncache(&addr->cdr_csr);
91125925Ssam 		while (addr->cdr_csr&CS_GO) {
91225925Ssam 			DELAY(50);
91325925Ssam 			uncache(&addr->cdr_csr);
91425925Ssam 		}
91525925Ssam 		DELAY(300);
91625925Ssam 	}
91725925Ssam 	DELAY(200);
91825925Ssam 	uncache(&dcb->operrsta);
91925925Ssam 	return (1);
92025925Ssam }
92125925Ssam 
92225675Ssam #ifdef notdef
92325675Ssam /*
92425675Ssam  * Dump the mdcb and DCB for diagnostic purposes.
92525675Ssam  */
92625675Ssam vdprintdcb(lp)
92725675Ssam 	register long *lp;
92825675Ssam {
92925675Ssam 	register int i, dcb, tc;
93025675Ssam 
93125675Ssam 	for (dcb = 0; lp; lp = (long *)(*lp), dcb++) {
93225675Ssam 		lp = (long *)((long)lp | 0xc0000000);
93325675Ssam 		printf("\nDump of dcb%d@%x:", dcb, lp);
93425675Ssam 		for (i = 0, tc = lp[3] & 0xff; i < tc+7; i++)
93525675Ssam 			printf(" %lx", lp[i]);
93625675Ssam 		printf("\n");
93724004Ssam 	}
93825675Ssam 	DELAY(1750000);
93924004Ssam }
94024004Ssam #endif
94125675Ssam #endif
942