1*34408Skarels /* 2*34408Skarels * @(#)psl.h 7.1 (Berkeley) 05/21/88 3*34408Skarels */ 424027Ssam 524027Ssam /* 625678Ssam * TAHOE processor status longword. 724027Ssam */ 824027Ssam #define PSL_C 0x00000001 /* carry bit */ 924027Ssam #define PSL_V 0x00000002 /* overflow bit */ 1024027Ssam #define PSL_Z 0x00000004 /* zero bit */ 1124027Ssam #define PSL_N 0x00000008 /* negative bit */ 1224027Ssam #define PSL_ALLCC 0x0000000f /* all cc bits - unlikely */ 1324027Ssam #define PSL_T 0x00000010 /* trace enable bit */ 1424027Ssam #define PSL_IV 0x00000020 /* integer overflow enable bit */ 1524027Ssam #define PSL_FU 0x00000040 /* float underflow enable */ 1624027Ssam #define PSL_DBL 0x00000080 /* f.p. prescision indicator */ 1724027Ssam #define PSL_SFE 0x00000100 /* system-forced-exception */ 1824027Ssam #define PSL_IPL 0x001f0000 /* interrupt priority level */ 1925678Ssam #define PSL_PRVMOD 0x00000000 /* previous mode (kernel mode) */ 2024027Ssam #define PSL_CURMOD 0x01000000 /* current mode (all on is user) */ 2124027Ssam #define PSL_IS 0x04000000 /* interrupt stack */ 2224027Ssam #define PSL_TP 0x40000000 /* trace pending */ 2324027Ssam 2425678Ssam #define PSL_MBZ 0xbae0fe00 /* must be zero bits */ 2524027Ssam 2624027Ssam #define PSL_USERSET (PSL_CURMOD) 2725678Ssam #define PSL_USERCLR (PSL_IS|PSL_IPL|PSL_MBZ|PSL_SFE|PSL_DBL|PSL_FU) 28