1*24027Ssam 2*24027Ssam /* psl.h 4.4 84/01/31 */ 3*24027Ssam 4*24027Ssam /* 5*24027Ssam * TAHOE program status longword 6*24027Ssam */ 7*24027Ssam 8*24027Ssam #define PSL_C 0x00000001 /* carry bit */ 9*24027Ssam #define PSL_V 0x00000002 /* overflow bit */ 10*24027Ssam #define PSL_Z 0x00000004 /* zero bit */ 11*24027Ssam #define PSL_N 0x00000008 /* negative bit */ 12*24027Ssam #define PSL_ALLCC 0x0000000f /* all cc bits - unlikely */ 13*24027Ssam #define PSL_T 0x00000010 /* trace enable bit */ 14*24027Ssam #define PSL_IV 0x00000020 /* integer overflow enable bit */ 15*24027Ssam #define PSL_FU 0x00000040 /* float underflow enable */ 16*24027Ssam #define PSL_DBL 0x00000080 /* f.p. prescision indicator */ 17*24027Ssam #define PSL_SFE 0x00000100 /* system-forced-exception */ 18*24027Ssam #define PSL_IPL 0x001f0000 /* interrupt priority level */ 19*24027Ssam #define PSL_CURMOD 0x01000000 /* current mode (all on is user) */ 20*24027Ssam #define PSL_IS 0x04000000 /* interrupt stack */ 21*24027Ssam #define PSL_TP 0x40000000 /* trace pending */ 22*24027Ssam 23*24027Ssam #define PSL_MBZ 0xbae0ffc0 /* must be zero bits */ 24*24027Ssam 25*24027Ssam #define PSL_USERSET (PSL_CURMOD) 26*24027Ssam #define PSL_USERCLR (PSL_IS|PSL_IPL|PSL_MBZ) 27