xref: /csrg-svn/sys/tahoe/include/pcb.h (revision 24126)
1*24126Ssam /*
2*24126Ssam  * TAHOE process control block
3*24126Ssam  */
4*24126Ssam 
5*24126Ssam struct pcb
6*24126Ssam {
7*24126Ssam 	int	pcb_ksp; 	/* kernel stack pointer */
8*24126Ssam 	int	pcb_usp; 	/* user stack pointer */
9*24126Ssam 	int	pcb_r0;
10*24126Ssam 	int	pcb_r1;
11*24126Ssam 	int	pcb_r2;
12*24126Ssam 	int	pcb_r3;
13*24126Ssam 	int	pcb_r4;
14*24126Ssam 	int	pcb_r5;
15*24126Ssam 	int	pcb_r6;
16*24126Ssam 	int	pcb_r7;
17*24126Ssam 	int	pcb_r8;
18*24126Ssam 	int	pcb_r9;
19*24126Ssam 	int	pcb_r10;
20*24126Ssam 	int	pcb_r11;
21*24126Ssam 	int	pcb_r12;
22*24126Ssam 	int	pcb_r13;
23*24126Ssam #define	pcb_fp pcb_r13
24*24126Ssam 	int	pcb_pc; 	/* program counter */
25*24126Ssam 	int	pcb_psl; 	/* program status longword */
26*24126Ssam 	struct  pte *pcb_p0br; 	/* seg 0 base register */
27*24126Ssam 	int	pcb_p0lr; 	/* seg 0 length register and astlevel */
28*24126Ssam 	struct  pte *pcb_p1br; 	/* seg 1 base register */
29*24126Ssam 	int	pcb_p1lr; 	/* seg 1 length register and pme */
30*24126Ssam 	struct  pte *pcb_p2br; 	/* seg 2 base register */
31*24126Ssam 	int	pcb_p2lr; 	/* seg 2 length register and pme */
32*24126Ssam 	int	pcb_ach;	/* accumulator - high order longword */
33*24126Ssam 	int	pcb_acl;	/* accumulator - low order longword */
34*24126Ssam #define ACH	pcb_ach
35*24126Ssam #define ACL	pcb_acl
36*24126Ssam 	int	pcb_hfs;	/* f.p. status register.	*/
37*24126Ssam /*
38*24126Ssam  * Software pcb (extension)
39*24126Ssam  */
40*24126Ssam 	union {
41*24126Ssam 		float 	*faddr;	/* address of single precision accumulator */
42*24126Ssam 		double	*daddr; /* address of double precision accumulator */
43*24126Ssam 	} pcb_savacc;
44*24126Ssam #define FSAVACC	pcb_savacc.faddr
45*24126Ssam #define DSAVACC pcb_savacc.daddr
46*24126Ssam 	int	pcb_szpt; 	/* number of pages of user page table */
47*24126Ssam 	int	pcb_cmap2;
48*24126Ssam 	int	*pcb_sswap;
49*24126Ssam 	short	pcb_ckey;	/* cache code key (proc index if NPROC<255) */
50*24126Ssam 	short	pcb_dkey;	/* cache data key */
51*24126Ssam 	int	pcb_sigc[4];
52*24126Ssam };
53*24126Ssam 
54*24126Ssam extern long	*user_psl;
55*24126Ssam 
56*24126Ssam #define	aston() \
57*24126Ssam 	{ \
58*24126Ssam 		u.u_pcb.pcb_psl |= PSL_SFE; \
59*24126Ssam 		if ((int)user_psl != 0) *user_psl |= PSL_SFE; \
60*24126Ssam 	}
61*24126Ssam 
62*24126Ssam #define	astoff() \
63*24126Ssam 	{ \
64*24126Ssam 		u.u_pcb.pcb_psl &= ~ PSL_SFE; \
65*24126Ssam 		if ((int)user_psl != 0) *user_psl &= ~PSL_SFE; \
66*24126Ssam 	}
67