1 /* param.h 1.1 86/01/05 */ 2 3 /* 4 * Machine dependent constants for TAHOE. 5 */ 6 #define NBPG 1024 /* bytes/page */ 7 #define PGOFSET (NBPG-1) /* byte offset into page */ 8 #define PGSHIFT 10 /* LOG2(NBPG) */ 9 10 #define CLSIZE 1 11 #define CLSIZELOG2 0 12 13 #define SSIZE 2 /* initial stack size/NBPG */ 14 #define SINCR 2 /* increment of stack/NBPG */ 15 #define UPAGES 6 /* pages of u-area (2 stack pages) */ 16 #define IOBASE ((caddr_t)0xfff00000) /* base of Versabus address space */ 17 18 #define MAXCKEY 255 /* maximal allowed code key */ 19 #define MAXDKEY 255 /* maximal allowed data key */ 20 #define NCKEY (MAXCKEY+1) /* # code keys, including 0 (reserved) */ 21 #define NDKEY (MAXDKEY+1) /* # data keys, including 0 (reserved) */ 22 23 /* 24 * Some macros for units conversion 25 */ 26 /* Core clicks (1024 bytes) to segments and vice versa */ 27 #define ctos(x) (x) 28 #define stoc(x) (x) 29 30 /* Core clicks (1024 bytes) to disk blocks */ 31 #define ctod(x) (x) 32 #define dtoc(x) (x) 33 #define dtob(x) ((x)<<PGSHIFT) 34 35 /* clicks to bytes */ 36 #define ctob(x) ((x)<<PGSHIFT) 37 38 /* bytes to clicks */ 39 #define btoc(x) ((((unsigned)(x)+NBPG-1) >> PGSHIFT)) 40 41 /* 42 * Macros to decode processor status word. 43 */ 44 #define USERMODE(ps) (((ps) & PSL_CURMOD) == PSL_CURMOD) 45 #define BASEPRI(ps) (((ps) & PSL_IPL) == 0) 46 47 #define DELAY(n) { register int N = 3*(n); while (--N > 0); } 48