1 /* 2 * Copyright (c) 1989 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Excelan Inc. 7 * 8 * Redistribution and use in source and binary forms are permitted 9 * provided that the above copyright notice and this paragraph are 10 * duplicated in all such forms and that any documentation, 11 * advertising materials, and other materials related to such 12 * distribution and use acknowledge that the software was developed 13 * by the University of California, Berkeley. The name of the 14 * University may not be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. 19 * 20 * @(#)if_exreg.h 7.1 (Berkeley) 03/09/89 21 */ 22 23 struct exdevice { 24 ushort ex_porta; /* write on porta resets EXOS */ 25 ushort ex_portb; /* write on portb interrupts EXOS */ 26 }; 27 28 /* EXOS I/O PORT A write definitions */ 29 #define EX_RESET 0 /* value doesn't really matter... */ 30 31 /* EXOS I/O PORT B write definitions */ 32 #define EX_NTRUPT 0 33 34 /* EXOS I/O PORT B read definitions */ 35 #define EX_TESTOK 1 /* set when self-diagnostics passed */ 36 #define EX_UNREADY (1<<3) /* set until EXOS ready to read from B */ 37 38 /* message buffer status field definitions */ 39 #define MH_OWNER 1 /* mask for status bit for owner */ 40 #define MH_HOST 0 /* if 0, the host owns the buffer */ 41 #define MH_EXOS 1 /* if 1, the EXOS owns the buffer */ 42 43 /* EXOS Link Level request codes */ 44 #define LLTRANSMIT 0xC /* send a packet */ 45 #define LLRTRANSMIT 0xE /* send a packet, and self-receive */ 46 #define LLRECEIVE 0xD /* receive a packet */ 47 #define LLNET_MODE 0x8 /* read/write mode control objects */ 48 #define LLNET_ADDRS 0x9 /* read/write receive address slots */ 49 #define LLNET_RECV 0xA /* read/alter receive slot enable bit */ 50 #define LLNET_STSTCS 0xB /* read/reset network statistics objects */ 51 52 /* Link Level return codes common to all requests */ 53 #define LL_OK 0 /* successful completion */ 54 #define LLX_MODE 0xA1 /* EXOS not in link level mode (impossible) */ 55 56 /* LLTRANSMIT unique return codes */ 57 #define LLXM_1RTRY 0x1 /* successful xmission, 1 retry */ 58 #define LLXM_RTRYS 0x2 /* successful xmission, more than 1 retry */ 59 #define LLXM_NSQE 0x8 /* successful xmission, no SQE TEST signal */ 60 #define LLXM_CLSN 0x10 /* xmission failed, excess retries */ 61 #define LLXM_NCS 0x20 /* xmission failed, no carrier sense */ 62 #define LLXM_LNGTH 0x40 /* xmission failed, bad packet length */ 63 #define XMIT_BITS "\7\7LENGTH\6CARRIER\5XCLSNS\4SQETST" 64 #define LLXM_ERROR (LLXM_NSQE|LLXM_CLSN|LLXM_NCS|LLXM_LNGTH) 65 66 /* LLRECEIVE unique return codes */ 67 #define LLRC_TRUNC 0x4 /* pkt received, but truncated to fit buffer */ 68 #define LLRC_ALIGN 0x10 /* pkt received, but with alignment error */ 69 #define LLRC_CRC 0x20 /* pkt received, but with CRC error */ 70 #define LLRC_BUFLEN 0x40 /* no pkt received, buffer less than 64 bytes */ 71 /* this should never happen here */ 72 #define RECV_BITS "\7\7BUFLEN\6CRC\5ALIGN\3TRUNC" 73 74 /* LLNET_ADDRS unique return codes */ 75 #define LLNA_BADSLOT 0xD1 /* slot doesn't exist or can't be accessed */ 76 #define LLNA_BADADDR 0xD3 /* invalid address for designated slot */ 77 78 /* LLNET_RECV unique return codes */ 79 #define LLNR_BADSLOT 0xD1 /* slot doesn't exist or can't be accessed */ 80 #define LLNR_BADADDR 0xD2 /* designated slot was empty */ 81 82 /* address slot object indices */ 83 #define NULLSLOT 0 /* the null slot */ 84 #define MINMCSLOT 1 /* minimum multicast slot index */ 85 #define MAXMCSLOT 8 /* default maximum multicast slot index */ 86 #define PHYSSLOT 253 /* physical slot index */ 87 #define UNVRSSLOT 254 /* universal slot index */ 88 #define BROADSLOT 255 /* broadcast slot index */ 89 90 /* request mask bit definitions */ 91 #define WRITE_OBJ 1 /* write the object */ 92 #define READ_OBJ 2 /* read the object */ 93 #define ENABLE_RCV 4 /* enable reception on designated slot */ 94 95 /* NET_MODE options mask bit definitions */ 96 #define OPT_ALIGN 0x10 /* receive packets with alignment errors */ 97 #define OPT_CRC 0x20 /* receive packets with CRC errors */ 98 #define OPT_DSABLE 0x80 /* disconnect controller hardware */ 99 100 /* NET_MODE mode field value definitions */ 101 #define MODE_OFF 0 /* stop transmission and reception */ 102 #define MODE_PERF 1 /* perfect multicast address filtering */ 103 #define MODE_HW 2 /* hardware-only multicast address filtering */ 104 #define MODE_PROM 3 /* promiscuous reception */ 105 106 #ifdef NEWEX 107 #define NFRAGMENTS 8 /* number fragments that the EXOS will scatter/gather */ 108 #else NEWEX 109 #define NFRAGMENTS 1 /* number fragments that the EXOS will scatter/gather */ 110 #endif NEWEX 111 #define EXMAXRBUF 1518 /* per EXOS 202 manual 5.3.7 (maybe 1518 would do) */ 112 113 /* 114 * N.B. Structures below are carefully constructed so that 115 * they correspond to the message formats that NX firmware 116 * defines. None of them should contain any compiler-instigated 117 * padding. Be especially careful about VAX C longword alignment! 118 */ 119 120 struct stat_array { 121 u_long sa_fsent; /* frames sent without errors */ 122 u_long sa_xsclsn; /* frames aborted excess collisions */ 123 u_long sa_nsqe; /* frames subject to heartbeat failure */ 124 u_long sa_undef; /* undefined (TDR on EXOS 101) */ 125 u_long sa_frcvd; /* frames received no errors */ 126 u_long sa_align; /* frames received alignment error */ 127 u_long sa_crc; /* frames received crc error */ 128 u_long sa_flost; /* frames lost */ 129 }; 130 131 struct buf_blk { /* packet/buffer block descriptor */ 132 u_short bb_len; /* length of block, in bytes */ 133 struct i86_long { 134 u_short realaddr[2]; /* address of block */ 135 } bb_addr; 136 /* 137 * Array above is really a single u_long field. 138 * We kludge its definition to defeat word-alignment. 139 */ 140 }; 141 142 struct net_mode { /* read/write mode control objects */ 143 /*12*/ u_char nm_rqst; /* request code */ 144 /*13*/ u_char nm_rply; /* reply code */ 145 /*14*/ u_char nm_mask; /* bit-wise switches for read, write */ 146 /*15*/ u_char nm_optn; /* acceptable packet reception errors */ 147 /*16*/ u_char nm_mode; /* EXOS filtering mode */ 148 /*17*/ 149 }; 150 151 struct net_addrs { /* read/write receive address slots */ 152 /*12*/ u_char na_rqst; /* request code */ 153 /*13*/ u_char na_rply; /* reply code */ 154 /*14*/ u_char na_mask; /* bit-wise switches for read, write */ 155 /*15*/ u_char na_slot; /* index of address slot */ 156 /*16*/ u_char na_addrs[6]; /* address read and/or written */ 157 /*22*/ 158 }; 159 160 struct net_recv { /* read/alter receive slot enable bit */ 161 /*12*/ u_char nr_rqst; /* request code */ 162 /*13*/ u_char nr_rply; /* reply code */ 163 /*14*/ u_char nr_mask; /* bit-wise switches for read, write */ 164 /*15*/ u_char nr_slot; /* index of address slot */ 165 /*16*/ 166 }; 167 168 struct net_ststcs { /* read/reset network statistics objects */ 169 /*12*/ u_char ns_rqst; /* request code */ 170 /*13*/ u_char ns_rply; /* reply code */ 171 /*14*/ u_char ns_mask; /* bit-wise switches for read, write */ 172 /*15*/ u_char ns_rsrv; /* reserved for EXOS */ 173 /*16*/ u_short ns_nobj; /* number of objects to work on */ 174 /*18*/ u_short ns_xobj; /* index of first object to work on */ 175 /*20*/ u_long ns_bufp; /* pointer to statistics buffer */ 176 /*24*/ 177 }; 178 179 struct enet_xmit { /* send a packet on the Ethernet */ 180 /*12*/ u_char et_rqst; /* request code */ 181 /*13*/ u_char et_rply; /* reply code */ 182 /*14*/ u_char et_slot; /* address slot matching dest address */ 183 /*15*/ u_char et_nblock; /* number of blocks composing packet */ 184 /*16*/ struct buf_blk et_blks[NFRAGMENTS]; /* array of block descriptors */ 185 /*22-64*/ 186 }; 187 188 struct enet_recv { /* receive a packet on the Ethernet */ 189 /*12*/ u_char er_rqst; /* request code */ 190 /*13*/ u_char er_rply; /* reply code */ 191 /*14*/ u_char er_slot; /* address slot matching dest address */ 192 /*15*/ u_char er_nblock; /* number of blocks composing buffer */ 193 /*16*/ struct buf_blk er_blks[NFRAGMENTS]; /* array of block descriptors */ 194 /*22-64*/ 195 }; 196 197 /* we send requests and receive replys with the EXOS using this structure */ 198 struct ex_msg { 199 /*00*/ u_short mb_link; /* address of next message buffer */ 200 /*02*/ u_char mb_rsrv; /* reserved for use by EXOS */ 201 /*03*/ u_char mb_status; /* used bit-wise for message protocol */ 202 /*04*/ u_short mb_length; /* length, in bytes, of the rest */ 203 /*06*/ short mb_1rsrv; /* reserved for used by EXOS */ 204 /*08*/ struct ifvba *mb_pkb; /* available to user */ 205 /*12*/ union mb_all { 206 struct net_mode mb_net_mode; 207 struct net_addrs mb_net_addrs; 208 struct net_recv mb_net_recv; 209 struct net_ststcs mb_net_ststcs; 210 struct enet_xmit mb_enet_xmit; 211 struct enet_recv mb_enet_recv; 212 } mb_all; 213 /* following field is used only by host, not read by board */ 214 struct ex_msg *mb_next; /* host's pointer to next message */ 215 }; 216 #define mb_nm mb_all.mb_net_mode 217 #define mb_na mb_all.mb_net_addrs 218 #define mb_nr mb_all.mb_net_recv 219 #define mb_ns mb_all.mb_net_ststcs 220 #define mb_et mb_all.mb_enet_xmit 221 #define mb_er mb_all.mb_enet_recv 222 #define mb_rqst mb_nm.nm_rqst 223 #define mb_rply mb_nm.nm_rply 224 #define MBDATALEN (sizeof(union mb_all)+6) 225 226 struct confmsg { 227 /*00*/ u_short cm_1rsrv; /* reserved, must be 1 */ 228 /*02*/ char cm_vc[4]; /* returns ASCII version code */ 229 /*06*/ u_char cm_cc; /* returns config completion code */ 230 /*07*/ u_char cm_opmode; /* specifies operation mode */ 231 /*08*/ u_short cm_dfo; /* specifies host data format option */ 232 /*00*/ u_char cm_dcn1; /* reserved, must be 1 */ 233 /*11*/ u_char cm_2rsrv[2]; /* reserved, must be 0 */ 234 /*13*/ u_char cm_ham; /* specifies host address mode */ 235 /*14*/ u_char cm_3rsrv; /* reserved, must be 0 */ 236 /*15*/ u_char cm_mapsiz; /* reserved, must be 0 */ 237 /*16*/ u_char cm_byteptrn[4]; /* host data format option test pattern */ 238 /*20*/ u_short cm_wordptrn[2]; 239 /*24*/ u_long cm_lwordptrn; 240 /*28*/ u_char cm_rsrvd[20]; 241 /*48*/ u_long cm_mba; /* use 0xFFFFFFFF in link level mode */ 242 /*52*/ u_char cm_nproc; /* use 0xFF in link level mode */ 243 /*53*/ u_char cm_nmbox; /* use 0xFF in link level mode */ 244 /*54*/ u_char cm_nmcast; /* use 0xFF in link level mode */ 245 /*55*/ u_char cm_nhost; /* use 1 in link level mode */ 246 247 /* the next five parameters define the request message queue */ 248 /*56*/ u_long cm_h2xba; /* base address of message queue */ 249 /*60*/ u_short cm_h2xhdr; /* address offset of msg Q header */ 250 /*62*/ u_char cm_h2xtyp; /* interrupt type */ 251 /*63*/ u_char cm_h2xval; /* interrupt value (not used) */ 252 /*64*/ u_short cm_h2xaddr; /* interrupt vector */ 253 /*66*/ u_short cm_h2xpad; /* pad out unused portion of vector */ 254 255 /* the next five parameters define the reply message queue */ 256 /*68*/ u_long cm_x2hba; /* base address of message queue */ 257 /*72*/ u_short cm_x2hhdr; /* address offset of msg Q header */ 258 /*74*/ u_char cm_x2htyp; /* interrupt type */ 259 /*75*/ u_char cm_x2hval; /* interrupt value (not used) */ 260 /*76*/ u_short cm_x2haddr; /* interrupt vector */ 261 /*78*/ u_short cm_x2hpad; /* pad out unused portion of vector */ 262 /*80*/ 263 }; 264