1*34508Skarels /* 2*34508Skarels * @(#)if_enpreg.h 1.5 (Berkeley) 05/26/88 3*34508Skarels */ 429649Ssam 529649Ssam /* Copyright (c) 1984 by Communication Machinery Corporation 629649Ssam * 729649Ssam * This file contains material which is proprietary to 829649Ssam * Communication Machinery Corporation (CMC) and which 929649Ssam * may not be divulged without the written permission 1029649Ssam * of CMC. 1129649Ssam * 1229649Ssam * ENP-10 Ram Definition 1329649Ssam * 1429649Ssam * 3/15/85 Jon Phares 1529649Ssam * Update 7/10/85 S. Holmgren 1629649Ssam * ENP-10 update 7/21/85 J. Mullen 1729649Ssam * ENP-20 update 8/11/85 J. Mullen 1829649Ssam * Mods for CCI TAHOE system 8/14/85 J. Mullen 1929649Ssam */ 2029649Ssam 2129649Ssam #define K *1024 2229649Ssam 2330230Ssam struct ether_addr { 2429649Ssam u_char ea_addr[6]; 2529649Ssam }; 2629649Ssam 2730230Ssam typedef struct ethlist { 2829649Ssam int e_listsize; /* active addr entries */ 2930230Ssam struct ether_addr e_baseaddr; /* addr lance is working with */ 3030230Ssam struct ether_addr e_addrs[16]; /* possible addresses */ 3129649Ssam } ETHLIST; 3229649Ssam 3330230Ssam typedef struct { 3430230Ssam u_long e_xmit_successful; /* Successful transmissions */ 3530230Ssam u_long e_mult_retry; /* multiple retries on xmit */ 3630230Ssam u_long e_one_retry; /* single retries */ 3730230Ssam u_long e_fail_retry; /* too many retries */ 3830230Ssam u_long e_deferrals; /* xmit delayed 'cuz cable busy */ 3930230Ssam u_long e_xmit_buff_err; /* xmit data chaining failed -- 4029649Ssam "can't happen" */ 4130230Ssam u_long e_silo_underrun; /* transmit data fetch failed */ 4230230Ssam u_long e_late_coll; /* collision after xmit */ 4330230Ssam u_long e_lost_carrier; 4430230Ssam u_long e_babble; /* xmit length > 1518 */ 4530230Ssam u_long e_collision; 4630230Ssam u_long e_xmit_mem_err; 4730230Ssam u_long e_rcv_successful; /* good receptions */ 4830230Ssam u_long e_rcv_missed; /* no recv buff available */ 4930230Ssam u_long e_crc_err; /* checksum failed */ 5030230Ssam u_long e_frame_err; /* crc error & data length != 0 mod 8 */ 5130230Ssam u_long e_rcv_buff_err; /* rcv data chain failure -- 5229649Ssam "can't happen" */ 5330230Ssam u_long e_silo_overrun; /* receive data store failed */ 5430230Ssam u_long e_rcv_mem_err; 5529649Ssam } ENPSTAT; 5629649Ssam 5730230Ssam typedef struct RING { 5829649Ssam short r_rdidx; 5929649Ssam short r_wrtidx; 6029649Ssam short r_size; 6129649Ssam short r_pad; 6229649Ssam int r_slot[1]; 6329649Ssam } RING; 6429649Ssam 6530230Ssam typedef struct RING32 { 6629649Ssam short r_rdidx; 6729649Ssam short r_wrtidx; 6829649Ssam short r_size; 6929649Ssam short r_pad; /* to make VAXen happy */ 7030230Ssam int r_slot[32]; 7129649Ssam } RING32; 7229649Ssam 7329649Ssam /* 7430230Ssam * ENP Ram data layout 7529649Ssam */ 7629649Ssam 7730230Ssam /* 7830230Ssam * Note: paged window (4 K) is identity mapped by ENP kernel to provide 7930230Ssam * 124 K contiguous RAM (as reflected in RAM_SIZE) 8030230Ssam */ 8130230Ssam #define RAM_WINDOW (128 K) 8230230Ssam #define IOACCESS_WINDOW (512) 8330230Ssam #define FIXED_WINDOW (RAM_WINDOW - IOACCESS_WINDOW) 8430230Ssam #define RAMROM_SWAP (4 K) 8530230Ssam #define RAM_SIZE (FIXED_WINDOW - RAMROM_SWAP) 8630230Ssam 8730230Ssam #define HOST_RAMSIZE (48 K) 8830230Ssam #define ENP_RAMSIZE (20 K) 8930230Ssam 9030230Ssam typedef struct iow20 { 9130230Ssam char pad0; 9230230Ssam char hst2enp_interrupt; 9330230Ssam char pad1[510]; 9430230Ssam } iow20; 9530230Ssam 9630230Ssam struct enpdevice { 9729649Ssam #ifdef notdef 9829649Ssam char enp_ram_rom[4 K]; 9929649Ssam #endif notdef 10029649Ssam union { 10129649Ssam char all_ram[RAM_SIZE]; 10229649Ssam struct { 10330230Ssam u_int t_go; 10430230Ssam u_int t_pstart; 10529649Ssam } t; 10629649Ssam struct { 10729649Ssam char nram[RAM_SIZE - (HOST_RAMSIZE + ENP_RAMSIZE)]; 10829649Ssam char hram[HOST_RAMSIZE]; 10929649Ssam char kram[ENP_RAMSIZE]; 11029649Ssam } u_ram; 11130230Ssam struct { 11230230Ssam char pad7[0x100]; /* starts 0x1100 - 0x2000 */ 11329649Ssam short e_enpstate; /* 1102 */ 11429649Ssam short e_enpmode; /* 1104 */ 11529649Ssam int e_enpbase; /* 1104 */ 11629649Ssam int e_enprun; /* 1108 */ 11730230Ssam u_short e_intrvec; 11830230Ssam u_short e_dummy[3]; 11929649Ssam RING32 h_toenp; /* 110C */ 12029649Ssam RING32 h_hostfree; 12129649Ssam RING32 e_tohost; 12229649Ssam RING32 e_enpfree; 12329649Ssam ENPSTAT e_stat; 12429649Ssam ETHLIST e_netaddr; 12529649Ssam } iface; 12629649Ssam } enp_u; 12729649Ssam iow20 enp_iow; 12830230Ssam }; 12929649Ssam 13029649Ssam #define enp_ram enp_u.all_ram 13129649Ssam #define enp_nram enp_u.u_ram.nram 13229649Ssam #define enp_hram enp_u.u_ram.hram 13329649Ssam #define enp_kram enp_u.u_ram.kram 13429649Ssam #define enp_go enp_u.t.t_go 13529649Ssam #define enp_prog_start enp_u.t.t_pstart 13629649Ssam #define enp_intrvec enp_u.iface.e_intrvec 13729649Ssam #define enp_state enp_u.iface.e_enpstate 13829649Ssam #define enp_mode enp_u.iface.e_enpmode 13929649Ssam #define enp_base enp_u.iface.e_enpbase 14029649Ssam #define enp_enprun enp_u.iface.e_enprun 14129649Ssam #define enp_toenp enp_u.iface.h_toenp 14229649Ssam #define enp_hostfree enp_u.iface.h_hostfree 14329649Ssam #define enp_tohost enp_u.iface.e_tohost 14429649Ssam #define enp_enpfree enp_u.iface.e_enpfree 14529649Ssam #define enp_freembuf enp_u.iface.h_freembuf 14629649Ssam #define enp_stat enp_u.iface.e_stat 14729649Ssam #define enp_addr enp_u.iface.e_netaddr 14829649Ssam 14930230Ssam #define ENPVAL 0xff /* enp_iow.hst2enp_interrupt poke value */ 15030230Ssam #define RESETVAL 0x00 /* enp_iow.enp2hst_clear_intr poke value */ 15129649Ssam 15230230Ssam #define INTR_ENP(addr) (addr->enp_iow.hst2enp_interrupt = ENPVAL) 15329649Ssam 15429649Ssam #if ENP == 30 15530230Ssam #define ACK_ENP_INTR(addr) (addr->enp_iow.enp2hst_clear_intr = RESETVAL) 15629649Ssam #define IS_ENP_INTR(addr) (addr->enp_iow.enp2hst_clear_intr&0x80) 15730295Ssam #endif 15829649Ssam 15929649Ssam #ifdef notdef 16030230Ssam #define RESET_ENP(addr) (addr->enp_iow.hst2enp_reset = 01) 16130230Ssam #else 162*34508Skarels #ifdef lint 163*34508Skarels #define RESET_ENP(addr) ((addr) = (addr)) 164*34508Skarels #else 16529649Ssam #define RESET_ENP(addr) 166*34508Skarels #endif lint 16729649Ssam #endif notdef 16829649Ssam 169*34508Skarels #ifdef tahoe 17030230Ssam #define ENP_GO(addr,start) { \ 17130230Ssam int v = start; \ 17230295Ssam enpcopy((u_char *)&v, (u_char *)&addr->enp_prog_start, sizeof(v) ); \ 17330230Ssam v = 0x80800000; \ 17430295Ssam enpcopy((u_char *)&v, (u_char *)&addr->enp_go, sizeof(v) ); \ 17530230Ssam } 17629649Ssam #else 17730230Ssam #define ENP_GO(addr,start,intvec ) { \ 17830230Ssam addr->enp_prog_start = (u_int)(start); \ 17930230Ssam addr->enp_intrvec = (u_short) intvec; \ 18030230Ssam addr->enp_go = 0x80800000; \ 18130230Ssam } 182*34508Skarels #endif tahoe 18329649Ssam 18429649Ssam /* 18530230Ssam * State bits 18629649Ssam */ 18729649Ssam #define S_ENPRESET 01 /* enp is in reset state */ 18829649Ssam #define S_ENPRUN 02 /* enp is in run state */ 18929649Ssam 19029649Ssam /* 19130230Ssam * Mode bits 19229649Ssam */ 19330230Ssam #define E_SWAP16 0x1 /* swap two octets within 16 */ 19430230Ssam #define E_SWAP32 0x2 /* swap 16s within 32 */ 19530230Ssam #define E_SWAPRD 0x4 /* swap on read */ 19630230Ssam #define E_SWAPWRT 0x8 /* swap on write */ 19730230Ssam #define E_DMA 0x10 /* enp does data moving */ 19829649Ssam 19930230Ssam #define E_EXAM_LIST 0x80000000 /* enp should examine addrlist */ 20030230Ssam #define E_ADDR_SUPP 0x40000000 /* enp should use supplied addr */ 20129649Ssam 20229649Ssam /* 20330230Ssam * Download ioctl definitions 20429649Ssam */ 20533091Sbostic #define ENPIOGO _IO('S',1) /* start the enp */ 20633091Sbostic #define ENPIORESET _IO('S',2) /* reset the enp */ 20729649Ssam 20829649Ssam /* 20930230Ssam * The ENP Data Buffer Structure 21029649Ssam */ 21130230Ssam typedef struct BCB { 21230230Ssam struct BCB *b_link; 21329649Ssam short b_stat; 21429649Ssam short b_len; 21530295Ssam u_char *b_addr; 21629649Ssam short b_msglen; 21729649Ssam short b_reserved; 21830230Ssam } BCB; 219