xref: /csrg-svn/sys/sparc/sbus/cgsixreg.h (revision 65111)
1 /*
2  * Copyright (c) 1993 The Regents of the University of California.
3  * All rights reserved.
4  *
5  * This software was developed by the Computer Systems Engineering group
6  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7  * contributed to Berkeley.
8  *
9  * All advertising materials mentioning features or use of this software
10  * must display the following acknowledgement:
11  *	This product includes software developed by the University of
12  *	California, Lawrence Berkeley Laboratory.
13  *
14  * %sccs.include.redist.c%
15  *
16  *	@(#)cgsixreg.h	8.2 (Berkeley) 12/12/93
17  *
18  * from: $Header: cgsixreg.h,v 1.1 93/10/12 15:29:24 torek Exp $
19  */
20 
21 /*
22  * CG6 display registers.  (Note, I got tired of writing `cgsix' about
23  * halfway through and changed everything to cg6, but I probably missed
24  * some.  Unfortunately, the way config works, we need to spell out `six'
25  * in some places anyway.)
26  *
27  * The cg6 is a complicated beastie.  We have been unable to extract any
28  * documentation and most of the following are guesses based on a limited
29  * amount of reverse engineering.
30  *
31  * A cg6 is composed of numerous groups of control registers, all with TLAs:
32  *	FBC - frame buffer control?
33  *	FHC - fbc hardware configuration / control? register (32 bits)
34  *	DHC - ???
35  *	TEC - transform engine control?
36  *	THC - TEC Hardware Configuration (this is where our action goes)
37  *	ROM - a 64Kbyte ROM with who knows what in it.
38  *	colormap - see below
39  *	frame buffer memory (video RAM)
40  *	possible other stuff
41  *
42  * Like the cg3, the cg6 uses a Brooktree Video DAC (see btreg.h).
43  *
44  * Various revisions of the cgsix have various hardware bugs.  So far,
45  * we have only seen rev 1 & 2.
46  */
47 
48 /* bits in FHC register */
49 #define	FHC_FBID_MASK	0xff000000	/* bits 24..31 are frame buffer ID */
50 #define	FHC_FBID_SHIFT	24
51 #define	FHC_REV_MASK	0x00f00000	/* bits 20..23 are revision */
52 #define	FHC_REV_SHIFT	20
53 #define	FHC_FROP_DISABLE 0x00080000	/* disable fast/font? rasterops */
54 #define	FHC_ROW_DISABLE	0x00040000	/* ??? */
55 #define	FHC_SRC_DISABLE	0x00020000	/* ??? */
56 #define	FHC_DST_DISABLE	0x00010000	/* disable destination cache */
57 #define	FHC_RESET	0x00008000	/* ??? */
58 #define	FHC_XXX0	0x00004000	/* ??? */
59 #define	FHC_LEBO	0x00002000	/* set little endian byte order? */
60 #define	FHC_RES_MASK	0x00001800	/* bits 11&12 are resolution */
61 #define	FHC_RES_1024	 0x00000000		/* res = 1024x768 */
62 #define	FHC_RES_1152	 0x00000800		/* res = 1152x900 */
63 #define	FHC_RES_1280	 0x00001000		/* res = 1280x1024 */
64 #define	FHC_RES_1600	 0x00001800		/* res = 1600x1200 */
65 #define	FHC_CPU_MASK	0x00000600	/* bits 9&10 are cpu type */
66 #define	FHC_CPU_SPARC	 0x00000000		/* cpu = sparc */
67 #define	FHC_CPU_68020	 0x00000200		/* cpu = 68020 */
68 #define	FHC_CPU_386	 0x00000400		/* cpu = 80386 */
69 #define	FHC_CPU_XXX	 0x00000600		/* ??? */
70 #define	FHC_TEST	0x00000100	/* ??? test window ??? */
71 #define	FHC_TESTX_MASK	0x000000f0	/* bits 4..7 are test window X */
72 #define	FHC_TESTX_SHIFT	4
73 #define	FHC_TESTY_MASK	0x0000000f	/* bits 0..3 are test window Y */
74 #define	FHC_TESTY_SHIFT	0
75 
76 /*
77  * The layout of the THC.
78  */
79 struct cg6_thc {
80 	u_int	thc_xxx0[512];	/* ??? */
81 	u_int	thc_hsync1;	/* horizontal sync timing */
82 	u_int	thc_hsync2;	/* more hsync timing */
83 	u_int	thc_hsync3;	/* yet more hsync timing */
84 	u_int	thc_vsync1;	/* vertical sync timing */
85 	u_int	thc_vsync2;	/* only two of these */
86 	u_int	thc_refresh;	/* refresh counter */
87 	u_int	thc_misc;	/* miscellaneous control & status */
88 	u_int	thc_xxx1[56];	/* ??? */
89 	u_int	thc_cursxy;	/* cursor x,y position (16 bits each) */
90 	u_int	thc_cursmask[32];	/* cursor mask bits */
91 	u_int	thc_cursbits[32];	/* what to show where mask enabled */
92 };
93 
94 /* bits in thc_misc */
95 #define	THC_MISC_XXX0		0xfff00000	/* unused */
96 #define	THC_MISC_REVMASK	0x000f0000	/* cg6 revision? */
97 #define	THC_MISC_REVSHIFT	16
98 #define	THC_MISC_XXX1		0x0000e000	/* unused */
99 #define	THC_MISC_RESET		0x00001000	/* ??? */
100 #define	THC_MISC_XXX2		0x00000800	/* unused */
101 #define	THC_MISC_VIDEN		0x00000400	/* video enable */
102 #define	THC_MISC_SYNC		0x00000200	/* not sure what ... */
103 #define	THC_MISC_VSYNC		0x00000100	/* ... these really are */
104 #define	THC_MISC_SYNCEN		0x00000080	/* sync enable */
105 #define	THC_MISC_CURSRES	0x00000040	/* cursor resolution */
106 #define	THC_MISC_INTEN		0x00000020	/* v.retrace intr enable */
107 #define	THC_MISC_INTR		0x00000010	/* intr pending / ack bit */
108 #define	THC_MISC_XXX		0x0000000f	/* ??? */
109 
110 /* cursor x / y position value for `off' */
111 #define	THC_CURSOFF	(65536-32)	/* i.e., USHRT_MAX+1-32 */
112 
113 /*
114  * This structure exists only to compute the layout of the CG6
115  * hardware.  Each of the individual substructures lives on a
116  * separate `page' (where a `page' is at least 4K), and many are
117  * very far apart.  We avoid large offsets (which make for lousy
118  * code) by using pointers to the individual interesting pieces,
119  * and map them in independently (to avoid using up PTEs unnecessarily).
120  */
121 struct cg6_layout {
122 	/* ROM at 0 */
123 	union {
124 		long un_id;		/* ID = ?? */
125 		char un_rom[65536];	/* 64K rom */
126 		char un_pad[0x200000];
127 	} cg6_rom_un;
128 
129 	/* Brooktree DAC at 0x200000 */
130 	union {
131 		struct bt_regs un_btregs;
132 		char un_pad[0x040000];
133 	} cg6_bt_un;
134 
135 	/* DHC, whatever that is, at 0x240000 */
136 	union {
137 		char un_pad[0x40000];
138 	} cg6_dhc_un;
139 
140 	/* ALT, whatever that is, at 0x280000 */
141 	union {
142 		char un_pad[0x80000];
143 	} cg6_alt_un;
144 
145 	/* FHC register at 0x300000 */
146 	union {
147 		int un_fhc;
148 		char un_pad[0x1000];
149 	} cg6_fhc_un;
150 
151 	/* THC at 0x301000 */
152 	union {
153 		struct cg6_thc un_thc;
154 		char un_pad[0x400000 - 0x1000];
155 	} cg6_thc_un;
156 
157 	/* FBC at 0x700000 */
158 	union {
159 		char un_pad[0x1000];
160 	} cg6_fbc_un;
161 
162 	/* TEC at 0x701000 */
163 	union {
164 		char un_pad[0x100000 - 0x1000];
165 	} cg6_tec_un;
166 
167 	/* Video RAM at 0x800000 */
168 	char	cg6_ram[1024 * 1024];	/* approx.? */
169 };
170