xref: /csrg-svn/sys/sparc/sbus/btreg.h (revision 64775)
1*64775Storek /*
2*64775Storek  * Copyright (c) 1993 The Regents of the University of California.
3*64775Storek  * All rights reserved.
4*64775Storek  *
5*64775Storek  * This software was developed by the Computer Systems Engineering group
6*64775Storek  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7*64775Storek  * contributed to Berkeley.
8*64775Storek  *
9*64775Storek  * All advertising materials mentioning features or use of this software
10*64775Storek  * must display the following acknowledgement:
11*64775Storek  *	This product includes software developed by the University of
12*64775Storek  *	California, Lawrence Berkeley Laboratory.
13*64775Storek  *
14*64775Storek  * %sccs.include.redist.c%
15*64775Storek  *
16*64775Storek  *	@(#)btreg.h	8.1 (Berkeley) 10/30/93
17*64775Storek  *
18*64775Storek  * from: $Header: btreg.h,v 1.1 93/10/12 15:28:52 torek Exp $
19*64775Storek  */
20*64775Storek 
21*64775Storek /*
22*64775Storek  * Several Sun color frame buffers use some kind of Brooktree video
23*64775Storek  * DAC (e.g., the Bt458, -- in any case, Brooktree make the only
24*64775Storek  * decent color frame buffer chips).
25*64775Storek  *
26*64775Storek  * Color map control on these is a bit funky in a SPARCstation.
27*64775Storek  * To update the color map one would normally do byte writes, but
28*64775Storek  * the hardware takes longword writes.  Since there are three
29*64775Storek  * registers for each color map entry (R, then G, then B), we have
30*64775Storek  * to set color 1 with a write to address 0 (setting 0's R/G/B and
31*64775Storek  * color 1's R) followed by a second write to address 1 (setting
32*64775Storek  * color 1's G/B and color 2's R/G).  Software must therefore keep
33*64775Storek  * a copy of the current map.
34*64775Storek  *
35*64775Storek  * The colormap address register increments automatically, so the
36*64775Storek  * above write is done as:
37*64775Storek  *
38*64775Storek  *	bt->bt_addr = 0;
39*64775Storek  *	bt->bt_cmap = R0G0B0R1;
40*64775Storek  *	bt->bt_cmap = G1B1R2G2;
41*64775Storek  *	...
42*64775Storek  *
43*64775Storek  * Yow!
44*64775Storek  *
45*64775Storek  * Bonus complication: on the cg6, only the top 8 bits of each 32 bit
46*64775Storek  * register matter, even though the cg3 takes all the bits from all
47*64775Storek  * bytes written to it.
48*64775Storek  */
49*64775Storek struct bt_regs {
50*64775Storek 	u_int	bt_addr;		/* map address register */
51*64775Storek 	u_int	bt_cmap;		/* colormap data register */
52*64775Storek 	u_int	bt_ctrl;		/* control register */
53*64775Storek 	u_int	bt_omap;		/* overlay (cursor) map register */
54*64775Storek };
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