1 /* 2 * Copyright (c) 1992 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This software was developed by the Computer Systems Engineering group 6 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 7 * contributed to Berkeley. 8 * 9 * %sccs.include.redist.c% 10 * 11 * @(#)fpu_mul.c 7.1 (Berkeley) 07/13/92 12 * 13 * from: $Header: fpu_mul.c,v 1.2 92/06/17 05:41:34 torek Exp $ 14 */ 15 16 /* 17 * Perform an FPU multiply (return x * y). 18 */ 19 20 #include "sys/types.h" 21 22 #include "machine/reg.h" 23 24 #include "fpu_arith.h" 25 #include "fpu_emu.h" 26 27 /* 28 * The multiplication algorithm for normal numbers is as follows: 29 * 30 * The fraction of the product is built in the usual stepwise fashion. 31 * Each step consists of shifting the accumulator right one bit 32 * (maintaining any guard bits) and, if the next bit in y is set, 33 * adding the multiplicand (x) to the accumulator. Then, in any case, 34 * we advance one bit leftward in y. Algorithmically: 35 * 36 * A = 0; 37 * for (bit = 0; bit < FP_NMANT; bit++) { 38 * sticky |= A & 1, A >>= 1; 39 * if (Y & (1 << bit)) 40 * A += X; 41 * } 42 * 43 * (X and Y here represent the mantissas of x and y respectively.) 44 * The resultant accumulator (A) is the product's mantissa. It may 45 * be as large as 11.11111... in binary and hence may need to be 46 * shifted right, but at most one bit. 47 * 48 * Since we do not have efficient multiword arithmetic, we code the 49 * accumulator as four separate words, just like any other mantissa. 50 * We use local `register' variables in the hope that this is faster 51 * than memory. We keep x->fp_mant in locals for the same reason. 52 * 53 * In the algorithm above, the bits in y are inspected one at a time. 54 * We will pick them up 32 at a time and then deal with those 32, one 55 * at a time. Note, however, that we know several things about y: 56 * 57 * - the guard and round bits at the bottom are sure to be zero; 58 * 59 * - often many low bits are zero (y is often from a single or double 60 * precision source); 61 * 62 * - bit FP_NMANT-1 is set, and FP_1*2 fits in a word. 63 * 64 * We can also test for 32-zero-bits swiftly. In this case, the center 65 * part of the loop---setting sticky, shifting A, and not adding---will 66 * run 32 times without adding X to A. We can do a 32-bit shift faster 67 * by simply moving words. Since zeros are common, we optimize this case. 68 * Furthermore, since A is initially zero, we can omit the shift as well 69 * until we reach a nonzero word. 70 */ 71 struct fpn * 72 fpu_mul(fe) 73 register struct fpemu *fe; 74 { 75 register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2; 76 register u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m; 77 register int sticky; 78 FPU_DECL_CARRY 79 80 /* 81 * Put the `heavier' operand on the right (see fpu_emu.h). 82 * Then we will have one of the following cases, taken in the 83 * following order: 84 * 85 * - y = NaN. Implied: if only one is a signalling NaN, y is. 86 * The result is y. 87 * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN 88 * case was taken care of earlier). 89 * If x = 0, the result is NaN. Otherwise the result 90 * is y, with its sign reversed if x is negative. 91 * - x = 0. Implied: y is 0 or number. 92 * The result is 0 (with XORed sign as usual). 93 * - other. Implied: both x and y are numbers. 94 * The result is x * y (XOR sign, multiply bits, add exponents). 95 */ 96 ORDER(x, y); 97 if (ISNAN(y)) { 98 y->fp_sign ^= x->fp_sign; 99 return (y); 100 } 101 if (ISINF(y)) { 102 if (ISZERO(x)) 103 return (fpu_newnan(fe)); 104 y->fp_sign ^= x->fp_sign; 105 return (y); 106 } 107 if (ISZERO(x)) { 108 x->fp_sign ^= y->fp_sign; 109 return (x); 110 } 111 112 /* 113 * Setup. In the code below, the mask `m' will hold the current 114 * mantissa byte from y. The variable `bit' denotes the bit 115 * within m. We also define some macros to deal with everything. 116 */ 117 x3 = x->fp_mant[3]; 118 x2 = x->fp_mant[2]; 119 x1 = x->fp_mant[1]; 120 x0 = x->fp_mant[0]; 121 sticky = a3 = a2 = a1 = a0 = 0; 122 123 #define ADD /* A += X */ \ 124 FPU_ADDS(a3, a3, x3); \ 125 FPU_ADDCS(a2, a2, x2); \ 126 FPU_ADDCS(a1, a1, x1); \ 127 FPU_ADDC(a0, a0, x0) 128 129 #define SHR1 /* A >>= 1, with sticky */ \ 130 sticky |= a3 & 1, a3 = (a3 >> 1) | (a2 << 31), \ 131 a2 = (a2 >> 1) | (a1 << 31), a1 = (a1 >> 1) | (a0 << 31), a0 >>= 1 132 133 #define SHR32 /* A >>= 32, with sticky */ \ 134 sticky |= a3, a3 = a2, a2 = a1, a1 = a0, a0 = 0 135 136 #define STEP /* each 1-bit step of the multiplication */ \ 137 SHR1; if (bit & m) { ADD; }; bit <<= 1 138 139 /* 140 * We are ready to begin. The multiply loop runs once for each 141 * of the four 32-bit words. Some words, however, are special. 142 * As noted above, the low order bits of Y are often zero. Even 143 * if not, the first loop can certainly skip the guard bits. 144 * The last word of y has its highest 1-bit in position FP_NMANT-1, 145 * so we stop the loop when we move past that bit. 146 */ 147 if ((m = y->fp_mant[3]) == 0) { 148 /* SHR32; */ /* unneeded since A==0 */ 149 } else { 150 bit = 1 << FP_NG; 151 do { 152 STEP; 153 } while (bit != 0); 154 } 155 if ((m = y->fp_mant[2]) == 0) { 156 SHR32; 157 } else { 158 bit = 1; 159 do { 160 STEP; 161 } while (bit != 0); 162 } 163 if ((m = y->fp_mant[1]) == 0) { 164 SHR32; 165 } else { 166 bit = 1; 167 do { 168 STEP; 169 } while (bit != 0); 170 } 171 m = y->fp_mant[0]; /* definitely != 0 */ 172 bit = 1; 173 do { 174 STEP; 175 } while (bit <= m); 176 177 /* 178 * Done with mantissa calculation. Get exponent and handle 179 * 11.111...1 case, then put result in place. We reuse x since 180 * it already has the right class (FP_NUM). 181 */ 182 m = x->fp_exp + y->fp_exp; 183 if (a0 >= FP_2) { 184 SHR1; 185 m++; 186 } 187 x->fp_sign ^= y->fp_sign; 188 x->fp_exp = m; 189 x->fp_sticky = sticky; 190 x->fp_mant[3] = a3; 191 x->fp_mant[2] = a2; 192 x->fp_mant[1] = a1; 193 x->fp_mant[0] = a0; 194 return (x); 195 } 196