xref: /csrg-svn/sys/pmax/include/reg.h (revision 52131)
1*52131Smckusick /*
2*52131Smckusick  * Copyright (c) 1988 University of Utah.
3*52131Smckusick  * Copyright (c) 1992 The Regents of the University of California.
4*52131Smckusick  * All rights reserved.
5*52131Smckusick  *
6*52131Smckusick  * This code is derived from software contributed to Berkeley by
7*52131Smckusick  * the Systems Programming Group of the University of Utah Computer
8*52131Smckusick  * Science Department and Ralph Campbell.
9*52131Smckusick  *
10*52131Smckusick  * %sccs.include.redist.c%
11*52131Smckusick  *
12*52131Smckusick  * from: Utah $Hdr: reg.h 1.1 90/07/09$
13*52131Smckusick  *
14*52131Smckusick  *	@(#)reg.h	7.1 (Berkeley) 01/07/92
15*52131Smckusick  */
16*52131Smckusick 
17*52131Smckusick /*
18*52131Smckusick  * Location of the users' stored
19*52131Smckusick  * registers relative to ZERO.
20*52131Smckusick  * Usage is p->p_regs[XX].
21*52131Smckusick  */
22*52131Smckusick #define ZERO	0
23*52131Smckusick #define AST	1
24*52131Smckusick #define V0	2
25*52131Smckusick #define V1	3
26*52131Smckusick #define A0	4
27*52131Smckusick #define A1	5
28*52131Smckusick #define A2	6
29*52131Smckusick #define A3	7
30*52131Smckusick #define T0	8
31*52131Smckusick #define T1	9
32*52131Smckusick #define T2	10
33*52131Smckusick #define T3	11
34*52131Smckusick #define T4	12
35*52131Smckusick #define T5	13
36*52131Smckusick #define T6	14
37*52131Smckusick #define T7	15
38*52131Smckusick #define S0	16
39*52131Smckusick #define S1	17
40*52131Smckusick #define S2	18
41*52131Smckusick #define S3	19
42*52131Smckusick #define S4	20
43*52131Smckusick #define S5	21
44*52131Smckusick #define S6	22
45*52131Smckusick #define S7	23
46*52131Smckusick #define T8	24
47*52131Smckusick #define T9	25
48*52131Smckusick #define K0	26
49*52131Smckusick #define K1	27
50*52131Smckusick #define GP	28
51*52131Smckusick #define SP	29
52*52131Smckusick #define S8	30
53*52131Smckusick #define RA	31
54*52131Smckusick #define MULLO	32
55*52131Smckusick #define MULHI	33
56*52131Smckusick #define	PC	34
57*52131Smckusick #define	SR	35
58*52131Smckusick #define	PS	35	/* alias for SR */
59*52131Smckusick #define	F0	36
60*52131Smckusick #define	F1	37
61*52131Smckusick #define	F2	38
62*52131Smckusick #define	F3	39
63*52131Smckusick #define	F4	40
64*52131Smckusick #define	F5	41
65*52131Smckusick #define	F6	42
66*52131Smckusick #define	F7	43
67*52131Smckusick #define	F8	44
68*52131Smckusick #define	F9	45
69*52131Smckusick #define	F10	46
70*52131Smckusick #define	F11	47
71*52131Smckusick #define	F12	48
72*52131Smckusick #define	F13	49
73*52131Smckusick #define	F14	50
74*52131Smckusick #define	F15	51
75*52131Smckusick #define	F16	52
76*52131Smckusick #define	F17	53
77*52131Smckusick #define	F18	54
78*52131Smckusick #define	F19	55
79*52131Smckusick #define	F20	56
80*52131Smckusick #define	F21	57
81*52131Smckusick #define	F22	58
82*52131Smckusick #define	F23	59
83*52131Smckusick #define	F24	60
84*52131Smckusick #define	F25	61
85*52131Smckusick #define	F26	62
86*52131Smckusick #define	F27	63
87*52131Smckusick #define	F28	64
88*52131Smckusick #define	F29	65
89*52131Smckusick #define	F30	66
90*52131Smckusick #define	F31	67
91*52131Smckusick #define	FSR	68
92*52131Smckusick 
93*52131Smckusick #ifdef IPCREG
94*52131Smckusick #define	NIPCREG 69
95*52131Smckusick int ipcreg[NIPCREG] = {
96*52131Smckusick 	ZERO, AST, V0, V1, A0, A1, A2, A3, T0, T1, T2, T3, T4, T5, T6, T7,
97*52131Smckusick 	S0, S1, S2, S3, S4, S5, S6, S7, T8, T9, K0, K1, GP, SP, S8, RA,
98*52131Smckusick 	MULLO, MULHI, PC,
99*52131Smckusick 	F0, F1, F2, F3, F4, F5, F6, F7,
100*52131Smckusick 	F8, F9, F10, F11, F12, F13, F14, F15,
101*52131Smckusick 	F16, F17, F18, F19, F20, F21, F22, F23,
102*52131Smckusick 	F24, F25, F26, F27, F28, F29, F30, F31, FSR,
103*52131Smckusick };
104*52131Smckusick #endif
105