153895Smckusick /* 2*63304Sbostic * Copyright (c) 1992, 1993 3*63304Sbostic * The Regents of the University of California. All rights reserved. 453895Smckusick * 553895Smckusick * This code is derived from software contributed to Berkeley by 653895Smckusick * Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc. 753895Smckusick * 853895Smckusick * %sccs.include.redist.c% 953895Smckusick * 1053895Smckusick * from: $Hdr: dmac_0448.h,v 4.300 91/06/09 06:21:36 root Rel41 $ SONY 1153895Smckusick * 12*63304Sbostic * @(#)dmac_0448.h 8.1 (Berkeley) 06/11/93 1353895Smckusick */ 1453895Smckusick 1553895Smckusick /* 1653895Smckusick * Copyright (c) 1989- by SONY Corporation. 1753895Smckusick */ 1853895Smckusick /* 1953895Smckusick * dmac_0448.h 2053895Smckusick * DMAC L7A0448 2153895Smckusick */ 2253895Smckusick 2353895Smckusick /* dmac register base address */ 2453895Smckusick #define DMAC_BASE 0xbfe00000 2553895Smckusick 2653895Smckusick /* register definition */ 2753895Smckusick #define DMAC_GSTAT (DMAC_BASE + 0xf) 2853895Smckusick #define DMAC_GSEL (DMAC_BASE + 0xe) 2953895Smckusick 3053895Smckusick #define DMAC_CSTAT (DMAC_BASE + 0x2) 3153895Smckusick #define DMAC_CCTL (DMAC_BASE + 0x3) 3253895Smckusick #define DMAC_CTRCL (DMAC_BASE + 0x4) 3353895Smckusick #define DMAC_CTRCM (DMAC_BASE + 0x5) 3453895Smckusick #define DMAC_CTRCH (DMAC_BASE + 0x6) 3553895Smckusick #define DMAC_CTAG (DMAC_BASE + 0x7) 3653895Smckusick #define DMAC_CWID (DMAC_BASE + 0x8) 3753895Smckusick #define DMAC_COFSL (DMAC_BASE + 0x9) 3853895Smckusick #define DMAC_COFSH (DMAC_BASE + 0xa) 3953895Smckusick #define DMAC_CMAP (DMAC_BASE + 0xc) 4053895Smckusick #define DMAC_CMAPH (DMAC_BASE + 0xc) 4153895Smckusick #define DMAC_CMAPL (DMAC_BASE + 0xd) 4253895Smckusick 4353895Smckusick #ifdef mips 4453895Smckusick #define VOLATILE volatile 4553895Smckusick #else 4653895Smckusick #define VOLATILE 4753895Smckusick #endif 4853895Smckusick 4953895Smckusick #ifndef U_CHAR 5053895Smckusick #define U_CHAR unsigned VOLATILE char 5153895Smckusick #endif 5253895Smckusick 5353895Smckusick #ifndef U_SHORT 5453895Smckusick #define U_SHORT unsigned VOLATILE short 5553895Smckusick #endif 5653895Smckusick 5753895Smckusick #define dmac_gstat *(U_CHAR *)DMAC_GSTAT 5853895Smckusick #define dmac_gsel *(U_CHAR *)DMAC_GSEL 5953895Smckusick 6053895Smckusick #define dmac_cstat *(U_CHAR *)DMAC_CSTAT 6153895Smckusick #define dmac_cctl *(U_CHAR *)DMAC_CCTL 6253895Smckusick #define dmac_ctrcl *(U_CHAR *)DMAC_CTRCL 6353895Smckusick #define dmac_ctrcm *(U_CHAR *)DMAC_CTRCM 6453895Smckusick #define dmac_ctrch *(U_CHAR *)DMAC_CTRCH 6553895Smckusick #define dmac_ctag *(U_CHAR *)DMAC_CTAG 6653895Smckusick #define dmac_cwid *(U_CHAR *)DMAC_CWID 6753895Smckusick #define dmac_cofsl *(U_CHAR *)DMAC_COFSL 6853895Smckusick #define dmac_cofsh *(U_CHAR *)DMAC_COFSH 6953895Smckusick #define dmac_cmap *(U_SHORT *)DMAC_CMAP 7053895Smckusick #define dmac_cmaph *(U_CHAR *)DMAC_CMAPH 7153895Smckusick #define dmac_cmapl *(U_CHAR *)DMAC_CMAPL 7253895Smckusick 7353895Smckusick /* status/control bit definition */ 7453895Smckusick #define DM_TCZ 0x80 7553895Smckusick #define DM_A28 0x40 7653895Smckusick #define DM_AFIX 0x20 7753895Smckusick #define DM_APAD 0x10 7853895Smckusick #define DM_ZINTEN 0x8 7953895Smckusick #define DM_RST 0x4 8053895Smckusick #define DM_MODE 0x2 8153895Smckusick #define DM_ENABLE 1 8253895Smckusick 8353895Smckusick /* general status bit definition */ 8453895Smckusick #define CH_INT(x) (u_char)(1 << (2 * x)) 8553895Smckusick #define CH0_INT 1 8653895Smckusick #define CH1_INT 4 8753895Smckusick #define CH2_INT 0x10 8853895Smckusick #define CH3_INT 0x40 8953895Smckusick 9053895Smckusick #define CH_MRQ(x) (u_char)(1 << (2 * x + 1)) 9153895Smckusick #define CH0_MRQ 2 9253895Smckusick #define CH1_MRQ 8 9353895Smckusick #define CH2_MRQ 0x20 9453895Smckusick #define CH3_MRQ 0x80 9553895Smckusick 9653895Smckusick /* channel definition */ 9753895Smckusick #define CH_SCSI 0 9853895Smckusick #define CH_FDC 1 9953895Smckusick #define CH_AUDIO 2 10053895Smckusick #define CH_VIDEO 3 10153895Smckusick 10253895Smckusick /* dma status */ 10353895Smckusick 10453895Smckusick struct dm_stat { 10553895Smckusick unsigned int dm_gstat; 10653895Smckusick unsigned int dm_cstat; 10753895Smckusick unsigned int dm_cctl; 10853895Smckusick unsigned int dm_tcnt; 10953895Smckusick unsigned int dm_offset; 11053895Smckusick unsigned int dm_tag; 11153895Smckusick unsigned int dm_width; 11253895Smckusick } ; 11353895Smckusick 11453895Smckusick #define DMAC_WAIT nops(10) 11553895Smckusick 11653895Smckusick #define PINTEN 0xbfc80001 11753895Smckusick # define DMA_INTEN 0x10 11853895Smckusick #define PINTSTAT 0xbfc80003 119