141051Swilliam /*- 2*63364Sbostic * Copyright (c) 1990, 1993 3*63364Sbostic * The Regents of the University of California. All rights reserved. 441051Swilliam * 541051Swilliam * This code is derived from software contributed to Berkeley by 641051Swilliam * William Jolitz. 741051Swilliam * 849573Swilliam * %sccs.include.redist.c% 941051Swilliam * 10*63364Sbostic * @(#)isa.h 8.1 (Berkeley) 06/11/93 1141051Swilliam */ 1241051Swilliam 1341051Swilliam /* 1445527Sbill * ISA Bus conventions 1541051Swilliam */ 1645527Sbill 1763179Scgd #ifndef LOCORE 1845543Sbill unsigned char inb(), rtcin(); 1945543Sbill void outb(); 2063179Scgd #endif 2141051Swilliam 2245527Sbill /* 2345527Sbill * Input / Output Port Assignments 2445527Sbill */ 2541051Swilliam 2645527Sbill #ifndef IO_BEGIN 2745527Sbill #define IO_ISABEGIN 0x000 /* 0x000 - Beginning of I/O Registers */ 2841051Swilliam 2945527Sbill /* CPU Board */ 3045624Sbill #define IO_DMA1 0x000 /* 8237A DMA Controller #1 */ 3145624Sbill #define IO_ICU1 0x020 /* 8259A Interrupt Controller #1 */ 3245624Sbill #define IO_TIMER1 0x040 /* 8252 Timer #1 */ 3345624Sbill #define IO_TIMER2 0x048 /* 8252 Timer #2 */ 3445527Sbill #define IO_KBD 0x060 /* 8042 Keyboard */ 3545527Sbill #define IO_RTC 0x070 /* RTC */ 3645527Sbill #define IO_NMI IO_RTC /* NMI Control */ 3745527Sbill #define IO_DMAPG 0x080 /* DMA Page Registers */ 3845624Sbill #define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */ 3945624Sbill #define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */ 4045527Sbill #define IO_NPX 0x0F0 /* Numeric Coprocessor */ 4141051Swilliam 4245527Sbill /* Cards */ 4345527Sbill /* 0x100 - 0x16F Open */ 4441051Swilliam 4545624Sbill #define IO_WD2 0x170 /* Secondary Fixed Disk Controller */ 4641051Swilliam 4745527Sbill /* 0x178 - 0x1EF Open */ 4841051Swilliam 4945624Sbill #define IO_WD1 0x1f0 /* Primary Fixed Disk Controller */ 5045527Sbill #define IO_GAME 0x200 /* Game Controller */ 5141051Swilliam 5245527Sbill /* 0x208 - 0x277 Open */ 5345526Sbill 5445624Sbill #define IO_LPT2 0x278 /* Parallel Port #2 */ 5545526Sbill 5645527Sbill /* 0x280 - 0x2F7 Open */ 5745527Sbill 5845624Sbill #define IO_COM2 0x2f8 /* COM2 i/o address */ 5945527Sbill 6045527Sbill /* 0x300 - 0x36F Open */ 6145527Sbill 6245624Sbill #define IO_FD2 0x370 /* secondary base i/o address */ 6345624Sbill #define IO_LPT1 0x378 /* Parallel Port #1 */ 6445527Sbill 6545527Sbill /* 0x380 - 0x3AF Open */ 6645527Sbill 6745527Sbill #define IO_MDA 0x3B0 /* Monochome Adapter */ 6845624Sbill #define IO_LPT3 0x3BC /* Monochome Adapter Printer Port */ 6945527Sbill #define IO_VGA 0x3C0 /* E/VGA Ports */ 7045527Sbill #define IO_CGA 0x3D0 /* CGA Ports */ 7145527Sbill 7245527Sbill /* 0x3E0 - 0x3EF Open */ 7345527Sbill 7445624Sbill #define IO_FD1 0x3f0 /* primary base i/o address */ 7545624Sbill #define IO_COM1 0x3f8 /* COM1 i/o address */ 7645527Sbill 7745527Sbill #define IO_ISAEND 0x3FF /* - 0x3FF End of I/O Registers */ 7845527Sbill #endif IO_ISABEGIN 7945527Sbill 8045527Sbill /* 8145527Sbill * Input / Output Memory Physical Addresses 8245527Sbill */ 8345527Sbill 8445624Sbill #ifndef IOM_BEGIN 8555647Sbostic #define IOM_BEGIN 0xa0000 /* Start of I/O Memory "hole" */ 8655647Sbostic #define IOM_END 0xFFFFF /* End of I/O Memory "hole" */ 8745527Sbill #endif IOM_BEGIN 8845527Sbill 8945527Sbill /* 9045527Sbill * RAM Physical Address Space (ignoring the above mentioned "hole") 9145527Sbill */ 9245527Sbill 9345624Sbill #ifndef RAM_BEGIN 9455647Sbostic #define RAM_BEGIN 0x000000 /* Start of RAM Memory */ 9555647Sbostic #define RAM_END 0xFFFFFF /* End of RAM Memory */ 9655647Sbostic #endif IOM_BEGIN 9745527Sbill 9845527Sbill /* 9945527Sbill * Oddball Physical Memory Addresses 10045527Sbill */ 10145624Sbill #ifndef COMPAQ_RAMRELOC 10245527Sbill #define COMPAQ_RAMRELOC 0x80c00000 /* Compaq RAM relocation/diag */ 10345527Sbill #define COMPAQ_RAMSETUP 0x80c00002 /* Compaq RAM setup */ 10445527Sbill #define WEITEK_FPU 0xC0000000 /* WTL 2167 */ 10545527Sbill #define CYRIX_EMC 0xC0000000 /* Cyrix EMC */ 10645624Sbill #endif COMPAQ_RAMRELOC 107