141054Swilliam /*- 241054Swilliam * Copyright (c) 1990 The Regents of the University of California. 341054Swilliam * All rights reserved. 441054Swilliam * 541054Swilliam * This code is derived from software contributed to Berkeley by 641054Swilliam * William Jolitz. 741054Swilliam * 851730Swilliam * %sccs.include.386.c% 941054Swilliam * 10*53415Sbostic * @(#)icu.h 5.8 (Berkeley) 05/11/92 1141054Swilliam */ 1241054Swilliam 1341054Swilliam /* 1441054Swilliam * AT/386 Interrupt Control constants 1541054Swilliam * W. Jolitz 8/89 1641054Swilliam */ 1741054Swilliam 1843593Sdonahn #ifndef __ICU__ 1943593Sdonahn #define __ICU__ 2043593Sdonahn 2141054Swilliam #ifndef LOCORE 2245624Sbill 2345624Sbill /* 2445624Sbill * Interrupt "level" mechanism variables, masks, and macros 2545624Sbill */ 2641054Swilliam extern unsigned short imen; /* interrupt mask enable */ 2745624Sbill extern unsigned short cpl; /* current priority level mask */ 2841054Swilliam 2945624Sbill extern unsigned short highmask; /* group of interrupts masked with splhigh() */ 3045624Sbill extern unsigned short ttymask; /* group of interrupts masked with spltty() */ 3145624Sbill extern unsigned short biomask; /* group of interrupts masked with splbio() */ 3245624Sbill extern unsigned short netmask; /* group of interrupts masked with splimp() */ 3343593Sdonahn 3441054Swilliam #define INTREN(s) imen &= ~(s) 3541054Swilliam #define INTRDIS(s) imen |= (s) 3645544Sbill #define INTRMASK(msk,s) msk |= (s) 3745624Sbill 3845624Sbill #else 3945624Sbill 4045624Sbill /* 4145624Sbill * Macro's for interrupt level priority masks (used in interrupt vector entry) 4245624Sbill */ 4345624Sbill 4445624Sbill /* Mask a group of interrupts atomically */ 45*53415Sbostic #define INTR_HEAD(unit,mask,offst) \ 46*53415Sbostic pushl $ offst ; \ 4745624Sbill pushl $ T_ASTFLT ; \ 4845624Sbill pushal ; \ 4951730Swilliam movb $0x20,%al ; \ 50*53415Sbostic 51*53415Sbostic #define INTR_TAIL(unit,mask,offst) \ 5251730Swilliam outb %al,$ IO_ICU1 ; \ 5351730Swilliam pushl %ds ; \ 5451730Swilliam pushl %es ; \ 5545624Sbill movw $0x10, %ax ; \ 5645624Sbill movw %ax, %ds ; \ 5745624Sbill movw %ax,%es ; \ 5845624Sbill incl _cnt+V_INTR ; \ 5949597Swilliam incl _isa_intr + offst * 4 ; \ 6045624Sbill movzwl _cpl,%eax ; \ 6145624Sbill pushl %eax ; \ 6249597Swilliam pushl $ unit ; \ 6349597Swilliam orw mask ,%ax ; \ 6445624Sbill movw %ax,_cpl ; \ 6545624Sbill orw _imen,%ax ; \ 6645624Sbill outb %al,$ IO_ICU1+1 ; \ 6745624Sbill movb %ah,%al ; \ 6845624Sbill outb %al,$ IO_ICU2+1 ; \ 6951730Swilliam sti ; 7045624Sbill 71*53415Sbostic #define INTR1(unit,mask,offst) \ 72*53415Sbostic INTR_HEAD(unit,mask,offst) \ 73*53415Sbostic INTR_TAIL(unit,mask,offst) 74*53415Sbostic 75*53415Sbostic #define INTR2(unit,mask,offst) \ 76*53415Sbostic INTR_HEAD(unit,mask,offst) \ 77*53415Sbostic outb %al,$ IO_ICU2 ; \ 78*53415Sbostic INTR_TAIL(unit,mask,offst) 79*53415Sbostic 80*53415Sbostic 81*53415Sbostic 8245624Sbill /* Interrupt vector exit macros */ 8345624Sbill 8445624Sbill /* First eight interrupts (ICU1) */ 8549597Swilliam #define INTREXIT1 \ 8645624Sbill jmp doreti 8745624Sbill 8845624Sbill /* Second eight interrupts (ICU2) */ 8949597Swilliam #define INTREXIT2 \ 9045624Sbill jmp doreti 9145624Sbill 9241054Swilliam #endif 9341054Swilliam 9445624Sbill /* 9545624Sbill * Interrupt enable bits -- in order of priority 9645624Sbill */ 9745544Sbill #define IRQ0 0x0001 /* highest priority - timer */ 9845544Sbill #define IRQ1 0x0002 9945544Sbill #define IRQ_SLAVE 0x0004 10045544Sbill #define IRQ8 0x0100 10145544Sbill #define IRQ9 0x0200 10245544Sbill #define IRQ2 IRQ9 10345544Sbill #define IRQ10 0x0400 10445544Sbill #define IRQ11 0x0800 10545544Sbill #define IRQ12 0x1000 10645544Sbill #define IRQ13 0x2000 10745544Sbill #define IRQ14 0x4000 10845544Sbill #define IRQ15 0x8000 10945544Sbill #define IRQ3 0x0008 11045544Sbill #define IRQ4 0x0010 11145544Sbill #define IRQ5 0x0020 11245544Sbill #define IRQ6 0x0040 11345544Sbill #define IRQ7 0x0080 /* lowest - parallel printer */ 11441054Swilliam 11545624Sbill /* 11645624Sbill * Interrupt Control offset into Interrupt descriptor table (IDT) 11745624Sbill */ 11845624Sbill #define ICU_OFFSET 32 /* 0-31 are processor exceptions */ 11945624Sbill #define ICU_LEN 16 /* 32-47 are ISA interrupts */ 12045624Sbill 12143593Sdonahn #endif __ICU__ 122