1*46018Swilliam /* 2*46018Swilliam * Copyright (c) 1987 Carnegie-Mellon University 3*46018Swilliam * Copyright (c) 1991 Regents of the University of California. 4*46018Swilliam * All rights reserved. 5*46018Swilliam * 6*46018Swilliam * This code is derived from software contributed to Berkeley by 7*46018Swilliam * The Mach Operating System project at Carnegie-Mellon University. 8*46018Swilliam * 9*46018Swilliam * The CMU software License Agreement specifies the terms and conditions 10*46018Swilliam * for use and redistribution. 11*46018Swilliam * 12*46018Swilliam * from hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90 13*46018Swilliam * 14*46018Swilliam * @(#)pmap.h 1.1 (Berkeley) 01/18/91 15*46018Swilliam */ 16*46018Swilliam 17*46018Swilliam #ifndef _PMAP_MACHINE_ 18*46018Swilliam #define _PMAP_MACHINE_ 1 19*46018Swilliam 20*46018Swilliam #include "sys/lock.h" 21*46018Swilliam #include "machine/vmparam.h" 22*46018Swilliam #include "vm/vm_statistics.h" 23*46018Swilliam 24*46018Swilliam /* 25*46018Swilliam * 386 page table entry and page table directory 26*46018Swilliam * W.Jolitz, 8/89 27*46018Swilliam */ 28*46018Swilliam 29*46018Swilliam struct pde 30*46018Swilliam { 31*46018Swilliam unsigned int 32*46018Swilliam pd_v:1, /* valid bit */ 33*46018Swilliam pd_prot:2, /* access control */ 34*46018Swilliam pd_mbz1:2, /* reserved, must be zero */ 35*46018Swilliam pd_u:1, /* hardware maintained 'used' bit */ 36*46018Swilliam :1, /* not used */ 37*46018Swilliam pd_mbz2:2, /* reserved, must be zero */ 38*46018Swilliam :3, /* reserved for software */ 39*46018Swilliam pd_pfnum:20; /* physical page frame number of pte's*/ 40*46018Swilliam }; 41*46018Swilliam 42*46018Swilliam #define PD_MASK 0xffc00000 /* page directory address bits */ 43*46018Swilliam #define PD_SHIFT 22 /* page directory address bits */ 44*46018Swilliam 45*46018Swilliam struct pte 46*46018Swilliam { 47*46018Swilliam unsigned int 48*46018Swilliam pg_v:1, /* valid bit */ 49*46018Swilliam pg_prot:2, /* access control */ 50*46018Swilliam pg_mbz1:2, /* reserved, must be zero */ 51*46018Swilliam pg_u:1, /* hardware maintained 'used' bit */ 52*46018Swilliam pg_m:1, /* hardware maintained modified bit */ 53*46018Swilliam pg_mbz2:2, /* reserved, must be zero */ 54*46018Swilliam pg_w:1, /* software, wired down page */ 55*46018Swilliam :1, /* software (unused) */ 56*46018Swilliam pg_nc:1, /* 'uncacheable page' bit */ 57*46018Swilliam pg_pfnum:20; /* physical page frame number */ 58*46018Swilliam }; 59*46018Swilliam 60*46018Swilliam #define PG_V 0x00000001 61*46018Swilliam #define PG_PROT 0x00000006 /* all protection bits . */ 62*46018Swilliam #define PG_W 0x00000200 63*46018Swilliam #define PG_N 0x00000800 /* Non-cacheable */ 64*46018Swilliam #define PG_M 0x00000040 65*46018Swilliam #define PG_U 0x00000020 66*46018Swilliam #define PG_FRAME 0xfffff000 67*46018Swilliam 68*46018Swilliam #define PG_NOACC 0 69*46018Swilliam #define PG_KR 0x00000000 70*46018Swilliam #define PG_KW 0x00000002 71*46018Swilliam #define PG_URKR 0x00000004 72*46018Swilliam #define PG_URKW 0x00000004 73*46018Swilliam #define PG_UW 0x00000006 74*46018Swilliam 75*46018Swilliam /* 76*46018Swilliam * Page Protection Exception bits 77*46018Swilliam */ 78*46018Swilliam 79*46018Swilliam #define PGEX_P 0x01 /* Protection violation vs. not present */ 80*46018Swilliam #define PGEX_W 0x02 /* during a Write cycle */ 81*46018Swilliam #define PGEX_U 0x04 /* access from User mode (UPL) */ 82*46018Swilliam 83*46018Swilliam typedef struct pde pd_entry_t; /* page directory entry */ 84*46018Swilliam typedef struct pte pt_entry_t; /* Mach page table entry */ 85*46018Swilliam 86*46018Swilliam #define PD_ENTRY_NULL ((pd_entry_t *) 0) 87*46018Swilliam #define PT_ENTRY_NULL ((pt_entry_t *) 0) 88*46018Swilliam 89*46018Swilliam /* 90*46018Swilliam * One page directory, shared between 91*46018Swilliam * kernel and user modes. 92*46018Swilliam */ 93*46018Swilliam #define I386_PAGE_SIZE NBPG 94*46018Swilliam #define I386_PDR_SIZE NBPDR 95*46018Swilliam 96*46018Swilliam #define I386_KPDES 8 /* KPT page directory size */ 97*46018Swilliam #define I386_UPDES NBPDR/sizeof(struct pde)-8 /* UPT page directory size */ 98*46018Swilliam 99*46018Swilliam #define I386_MAX_PTSIZE I386_UPDES*NBPG /* max size of UPT */ 100*46018Swilliam #define I386_MAX_KPTSIZE I386_KPDES*NBPG /* max memory to allocate to KPT */ 101*46018Swilliam 102*46018Swilliam /* 103*46018Swilliam * Kernel virtual address to page table entry and to physical address. 104*46018Swilliam */ 105*46018Swilliam #define kvtopte(va) \ 106*46018Swilliam (&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT]) 107*46018Swilliam #define ptetokv(pt) \ 108*46018Swilliam ((((pt_entry_t *)(pt) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS) 109*46018Swilliam #define kvtophys(va) \ 110*46018Swilliam ((kvtopte(va)->pg_pfnum << PGSHIFT) | ((int)(va) & PGOFSET)) 111*46018Swilliam 112*46018Swilliam /* 113*46018Swilliam * Pmap stuff 114*46018Swilliam */ 115*46018Swilliam #define PMAP_NULL ((pmap_t) 0) 116*46018Swilliam 117*46018Swilliam struct pmap { 118*46018Swilliam pt_entry_t *pm_ptab; /* KVA of page table */ 119*46018Swilliam pd_entry_t *pm_pdir; /* KVA of page directory */ 120*46018Swilliam boolean_t pm_pdchanged; /* pdir changed */ 121*46018Swilliam short pm_dref; /* page directory ref count */ 122*46018Swilliam short pm_count; /* pmap reference count */ 123*46018Swilliam simple_lock_data_t pm_lock; /* lock on pmap */ 124*46018Swilliam struct pmap_statistics pm_stats; /* pmap statistics */ 125*46018Swilliam long pm_ptpages; /* more stats: PT pages */ 126*46018Swilliam }; 127*46018Swilliam 128*46018Swilliam typedef struct pmap *pmap_t; 129*46018Swilliam 130*46018Swilliam extern pmap_t kernel_pmap; 131*46018Swilliam 132*46018Swilliam /* 133*46018Swilliam * Macros for speed 134*46018Swilliam */ 135*46018Swilliam #define PMAP_ACTIVATE(pmapp, pcbp) \ 136*46018Swilliam if ((pmapp) != PMAP_NULL && (pmapp)->pm_pdchanged) { \ 137*46018Swilliam (pcbp)->pcb_cr3 = \ 138*46018Swilliam i386_btop(pmap_extract(kernel_pmap, (pmapp)->pm_pdir)); \ 139*46018Swilliam if ((pmapp) == u.u_procp->p_map->pmap) \ 140*46018Swilliam load_cr3((pcbp)->pcb_cr3); \ 141*46018Swilliam (pmapp)->pm_pdchanged = FALSE; \ 142*46018Swilliam } 143*46018Swilliam #define PMAP_DEACTIVATE(pmapp, pcbp) 144*46018Swilliam 145*46018Swilliam /* 146*46018Swilliam * For each vm_page_t, there is a list of all currently valid virtual 147*46018Swilliam * mappings of that page. An entry is a pv_entry_t, the list is pv_table. 148*46018Swilliam */ 149*46018Swilliam typedef struct pv_entry { 150*46018Swilliam struct pv_entry *pv_next; /* next pv_entry */ 151*46018Swilliam pmap_t pv_pmap; /* pmap where mapping lies */ 152*46018Swilliam vm_offset_t pv_va; /* virtual address for mapping */ 153*46018Swilliam pd_entry_t *pv_ptpde; /* non-zero if VA maps a PT page */ 154*46018Swilliam pmap_t pv_ptpmap; /* if pv_ptpde, pmap for PT page */ 155*46018Swilliam int pv_flags; /* flags */ 156*46018Swilliam } *pv_entry_t; 157*46018Swilliam 158*46018Swilliam #define PV_ENTRY_NULL ((pv_entry_t) 0) 159*46018Swilliam 160*46018Swilliam #define PV_CI 0x01 /* all entries must be cache inhibited */ 161*46018Swilliam #define PV_PTPAGE 0x02 /* entry maps a page table page */ 162*46018Swilliam 163*46018Swilliam #ifdef KERNEL 164*46018Swilliam 165*46018Swilliam pv_entry_t pv_table; /* array of entries, one per page */ 166*46018Swilliam 167*46018Swilliam #define pa_index(pa) atop(pa - vm_first_phys) 168*46018Swilliam #define pa_to_pvh(pa) (&pv_table[pa_index(pa)]) 169*46018Swilliam 170*46018Swilliam #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 171*46018Swilliam 172*46018Swilliam extern pt_entry_t *Sysmap; 173*46018Swilliam #endif KERNEL 174*46018Swilliam 175*46018Swilliam #endif _PMAP_MACHINE_ 176