1*41488Smckusick /* 2*41488Smckusick * Copyright (c) 1988 University of Utah. 3*41488Smckusick * Copyright (c) 1990 The Regents of the University of California. 4*41488Smckusick * All rights reserved. 5*41488Smckusick * 6*41488Smckusick * This code is derived from software contributed to Berkeley by 7*41488Smckusick * the Systems Programming Group of the University of Utah Computer 8*41488Smckusick * Science Department. 9*41488Smckusick * 10*41488Smckusick * %sccs.include.redist.c% 11*41488Smckusick * 12*41488Smckusick * @(#)dca.c 7.1 (Berkeley) 05/08/90 13*41488Smckusick */ 14*41488Smckusick 15*41488Smckusick #ifdef DCACONSOLE 16*41488Smckusick #include "../sys/param.h" 17*41488Smckusick #include "../hpdev/dcareg.h" 18*41488Smckusick #include "machine/cpu.h" 19*41488Smckusick #include "machine/cons.h" 20*41488Smckusick 21*41488Smckusick #define CONSDEV (0) 22*41488Smckusick #define CONSOLE ((struct dcadevice *)(EXTIOBASE + (9 * IOCARDSIZE))) 23*41488Smckusick 24*41488Smckusick dcaprobe(cp) 25*41488Smckusick struct consdev *cp; 26*41488Smckusick { 27*41488Smckusick register struct dcadevice *dca = CONSOLE; 28*41488Smckusick 29*41488Smckusick if (badaddr((char *)CONSOLE)) { 30*41488Smckusick cp->cn_pri = CN_DEAD; 31*41488Smckusick return; 32*41488Smckusick } 33*41488Smckusick switch (dca->dca_irid) { 34*41488Smckusick case DCAID0: 35*41488Smckusick case DCAID1: 36*41488Smckusick cp->cn_pri = CN_NORMAL; 37*41488Smckusick break; 38*41488Smckusick case DCAREMID0: 39*41488Smckusick case DCAREMID1: 40*41488Smckusick cp->cn_pri = CN_REMOTE; 41*41488Smckusick break; 42*41488Smckusick default: 43*41488Smckusick cp->cn_pri = CN_DEAD; 44*41488Smckusick break; 45*41488Smckusick } 46*41488Smckusick } 47*41488Smckusick 48*41488Smckusick dcainit(cp) 49*41488Smckusick struct consdev *cp; 50*41488Smckusick { 51*41488Smckusick register struct dcadevice *dca = CONSOLE; 52*41488Smckusick 53*41488Smckusick dca->dca_irid = 0xFF; 54*41488Smckusick DELAY(100); 55*41488Smckusick dca->dca_ic = 0; 56*41488Smckusick dca->dca_cfcr = CFCR_DLAB; 57*41488Smckusick dca->dca_data = DCABRD(9600) & 0xFF; 58*41488Smckusick dca->dca_ier = DCABRD(9600) >> 8; 59*41488Smckusick dca->dca_cfcr = CFCR_8BITS; 60*41488Smckusick } 61*41488Smckusick 62*41488Smckusick #ifndef SMALL 63*41488Smckusick dcagetchar() 64*41488Smckusick { 65*41488Smckusick register struct dcadevice *dca = CONSOLE; 66*41488Smckusick short stat; 67*41488Smckusick int c; 68*41488Smckusick 69*41488Smckusick if (((stat = dca->dca_lsr) & LSR_RXRDY) == 0) 70*41488Smckusick return(0); 71*41488Smckusick c = dca->dca_data; 72*41488Smckusick return(c); 73*41488Smckusick } 74*41488Smckusick #else 75*41488Smckusick dcagetchar() 76*41488Smckusick { 77*41488Smckusick return(0); 78*41488Smckusick } 79*41488Smckusick #endif 80*41488Smckusick 81*41488Smckusick dcaputchar(c) 82*41488Smckusick register int c; 83*41488Smckusick { 84*41488Smckusick register struct dcadevice *dca = CONSOLE; 85*41488Smckusick register int timo; 86*41488Smckusick short stat; 87*41488Smckusick 88*41488Smckusick /* wait a reasonable time for the transmitter to come ready */ 89*41488Smckusick timo = 50000; 90*41488Smckusick while (((stat = dca->dca_lsr) & LSR_TXRDY) == 0 && --timo) 91*41488Smckusick ; 92*41488Smckusick dca->dca_data = c; 93*41488Smckusick /* wait for this transmission to complete */ 94*41488Smckusick timo = 1000000; 95*41488Smckusick while (((stat = dca->dca_lsr) & LSR_TXRDY) == 0 && --timo) 96*41488Smckusick ; 97*41488Smckusick } 98*41488Smckusick #endif 99