xref: /csrg-svn/sys/hp300/dev/maskbits.h (revision 53932)
1*53932Shibler /*
2*53932Shibler  * Derived from X11R4
3*53932Shibler  */
4*53932Shibler 
5*53932Shibler /* the following notes use the following conventions:
6*53932Shibler SCREEN LEFT				SCREEN RIGHT
7*53932Shibler in this file and maskbits.c, left and right refer to screen coordinates,
8*53932Shibler NOT bit numbering in registers.
9*53932Shibler 
10*53932Shibler starttab[n]
11*53932Shibler 	bits[0,n-1] = 0	bits[n,31] = 1
12*53932Shibler endtab[n] =
13*53932Shibler 	bits[0,n-1] = 1	bits[n,31] = 0
14*53932Shibler 
15*53932Shibler maskbits(x, w, startmask, endmask, nlw)
16*53932Shibler 	for a span of width w starting at position x, returns
17*53932Shibler a mask for ragged bits at start, mask for ragged bits at end,
18*53932Shibler and the number of whole longwords between the ends.
19*53932Shibler 
20*53932Shibler */
21*53932Shibler 
22*53932Shibler #define maskbits(x, w, startmask, endmask, nlw) \
23*53932Shibler     startmask = starttab[(x)&0x1f]; \
24*53932Shibler     endmask = endtab[((x)+(w)) & 0x1f]; \
25*53932Shibler     if (startmask) \
26*53932Shibler 	nlw = (((w) - (32 - ((x)&0x1f))) >> 5); \
27*53932Shibler     else \
28*53932Shibler 	nlw = (w) >> 5;
29*53932Shibler 
30*53932Shibler #define FASTGETBITS(psrc, x, w, dst) \
31*53932Shibler     asm ("bfextu %3{%1:%2},%0" \
32*53932Shibler     : "=d" (dst) : "di" (x), "di" (w), "o" (*(char *)(psrc)))
33*53932Shibler 
34*53932Shibler #define FASTPUTBITS(src, x, w, pdst) \
35*53932Shibler     asm ("bfins %3,%0{%1:%2}" \
36*53932Shibler 	 : "=o" (*(char *)(pdst)) \
37*53932Shibler 	 : "di" (x), "di" (w), "d" (src), "0" (*(char *) (pdst)))
38*53932Shibler 
39*53932Shibler #define getandputrop(psrc, srcbit, dstbit, width, pdst, rop) \
40*53932Shibler { \
41*53932Shibler   register unsigned int _tmpsrc, _tmpdst; \
42*53932Shibler   FASTGETBITS(pdst, dstbit, width, _tmpdst); \
43*53932Shibler   FASTGETBITS(psrc, srcbit, width, _tmpsrc); \
44*53932Shibler   DoRop(_tmpdst, rop, _tmpsrc, _tmpdst); \
45*53932Shibler   FASTPUTBITS(_tmpdst, dstbit, width, pdst); \
46*53932Shibler }
47*53932Shibler 
48*53932Shibler #define getandputrop0(psrc, srcbit, width, pdst, rop) \
49*53932Shibler     	getandputrop(psrc, srcbit, 0, width, pdst, rop)
50*53932Shibler 
51*53932Shibler #define getunalignedword(psrc, x, dst) { \
52*53932Shibler         register int _tmp; \
53*53932Shibler         FASTGETBITS(psrc, x, 32, _tmp); \
54*53932Shibler         dst = _tmp; \
55*53932Shibler }
56*53932Shibler 
57*53932Shibler #define fnCLEAR(src, dst)       (0)
58*53932Shibler #define fnCOPY(src, dst)        (src)
59*53932Shibler #define fnXOR(src, dst)         (src ^ dst)
60*53932Shibler #define fnCOPYINVERTED(src, dst)(~src)
61*53932Shibler 
62*53932Shibler #define DoRop(result, alu, src, dst) \
63*53932Shibler { \
64*53932Shibler     if (alu == RR_COPY) \
65*53932Shibler         result = fnCOPY (src, dst); \
66*53932Shibler     else \
67*53932Shibler         switch (alu) \
68*53932Shibler         { \
69*53932Shibler           case RR_CLEAR: \
70*53932Shibler             result = fnCLEAR (src, dst); \
71*53932Shibler             break; \
72*53932Shibler           case RR_XOR: \
73*53932Shibler             result = fnXOR (src, dst); \
74*53932Shibler             break; \
75*53932Shibler           case RR_COPYINVERTED: \
76*53932Shibler             result = fnCOPYINVERTED (src, dst); \
77*53932Shibler             break; \
78*53932Shibler         } \
79*53932Shibler }
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