141480Smckusick /* 241480Smckusick * Copyright (c) 1988 University of Utah. 341480Smckusick * Copyright (c) 1990 The Regents of the University of California. 441480Smckusick * All rights reserved. 541480Smckusick * 641480Smckusick * This code is derived from software contributed to Berkeley by 741480Smckusick * the Systems Programming Group of the University of Utah Computer 841480Smckusick * Science Department. 941480Smckusick * 1041480Smckusick * %sccs.include.redist.c% 1141480Smckusick * 12*45492Smckusick * from: Utah $Hdr: grf_rb.c 1.1 90/07/09$ 1341480Smckusick * 14*45492Smckusick * @(#)grf_rb.c 7.3 (Berkeley) 11/04/90 1541480Smckusick */ 1641480Smckusick 1741480Smckusick #include "grf.h" 1841480Smckusick #if NGRF > 0 1941480Smckusick 2041480Smckusick /* 2141480Smckusick * Graphics routines for the Renaissance, HP98720 Graphics system. 2241480Smckusick */ 2341480Smckusick #include "param.h" 2441480Smckusick #include "errno.h" 2541480Smckusick 2641480Smckusick #include "grfioctl.h" 2741480Smckusick #include "grfvar.h" 2841480Smckusick #include "grf_rbreg.h" 2941480Smckusick 3041480Smckusick #include "machine/cpu.h" 3141480Smckusick 3241480Smckusick /* 3341480Smckusick * Initialize hardware. 3441480Smckusick * Must point g_display at a grfinfo structure describing the hardware. 3541480Smckusick * Returns 0 if hardware not present, non-zero ow. 3641480Smckusick */ 3741480Smckusick rb_init(gp, addr) 3841480Smckusick struct grf_softc *gp; 3941480Smckusick u_char *addr; 4041480Smckusick { 4141480Smckusick register struct rboxfb *rbp; 4241480Smckusick struct grfinfo *gi = &gp->g_display; 4341480Smckusick int fboff; 4441480Smckusick 4541480Smckusick rbp = (struct rboxfb *) addr; 4641480Smckusick gi->gd_regaddr = (caddr_t) UNIOV(addr); 4741480Smckusick gi->gd_regsize = 0x20000; 4841480Smckusick gi->gd_fbwidth = (rbp->fbwmsb << 8) | rbp->fbwlsb; 4941480Smckusick gi->gd_fbheight = (rbp->fbhmsb << 8) | rbp->fbhlsb; 5041480Smckusick fboff = (rbp->fbomsb << 8) | rbp->fbolsb; 5141480Smckusick gi->gd_fbaddr = (caddr_t) (*(addr + fboff) << 16); 5241480Smckusick gi->gd_fbsize = gi->gd_fbwidth * gi->gd_fbheight; 5341480Smckusick gi->gd_dwidth = (rbp->dwmsb << 8) | rbp->dwlsb; 5441480Smckusick gi->gd_dheight = (rbp->dwmsb << 8) | rbp->dwlsb; 5541480Smckusick gi->gd_planes = 0; /* ?? */ 5641480Smckusick gi->gd_colors = 256; 5741480Smckusick return(1); 5841480Smckusick } 5941480Smckusick 6041480Smckusick /* 6141480Smckusick * Change the mode of the display. 6241480Smckusick * Right now all we can do is grfon/grfoff. 6341480Smckusick * Return a UNIX error number or 0 for success. 6441480Smckusick */ 6541480Smckusick rb_mode(gp, cmd) 6641480Smckusick register struct grf_softc *gp; 6741480Smckusick { 6841480Smckusick register struct rboxfb *rbp; 6941480Smckusick int error = 0; 7041480Smckusick 7141480Smckusick rbp = (struct rboxfb *) IOV(gp->g_display.gd_regaddr); 7241480Smckusick switch (cmd) { 7341480Smckusick /* 7441480Smckusick * The minimal register info here is from the Renaissance X driver. 7541480Smckusick */ 7641480Smckusick case GM_GRFON: 7741480Smckusick case GM_GRFOFF: 7841480Smckusick break; 7941480Smckusick case GM_GRFOVON: 8041480Smckusick rbp->write_enable = 0; 8141480Smckusick rbp->opwen = 0xF; 8241480Smckusick rbp->drive = 0x10; 8341480Smckusick break; 8441480Smckusick case GM_GRFOVOFF: 8541480Smckusick rbp->opwen = 0; 8641480Smckusick rbp->write_enable = 0xffffffff; 8741480Smckusick rbp->drive = 0x01; 8841480Smckusick break; 8941480Smckusick default: 9041480Smckusick error = EINVAL; 9141480Smckusick break; 9241480Smckusick } 9341480Smckusick return(error); 9441480Smckusick } 9541480Smckusick 9641480Smckusick #endif 97