141480Smckusick /* 241480Smckusick * Copyright (c) 1988 University of Utah. 341480Smckusick * Copyright (c) 1982, 1986, 1990 The Regents of the University of California. 441480Smckusick * All rights reserved. 541480Smckusick * 641480Smckusick * This code is derived from software contributed to Berkeley by 741480Smckusick * the Systems Programming Group of the University of Utah Computer 841480Smckusick * Science Department. 941480Smckusick * 1041480Smckusick * %sccs.include.redist.c% 1141480Smckusick * 1241480Smckusick * from: Utah $Hdr: dcmreg.h 1.3 89/08/23$ 1341480Smckusick * 14*43418Shibler * @(#)dcmreg.h 7.3 (Berkeley) 06/22/90 1541480Smckusick */ 1641480Smckusick 1741480Smckusick struct dcmdevice { /* host address, only odd bytes addressed */ 1841480Smckusick u_char dcm_pad0; 1941480Smckusick volatile u_char dcm_rsid; /* Reset / ID 0001 */ 2041480Smckusick u_char dcm_pad1; 2141480Smckusick volatile u_char dcm_ic; /* Interrupt control register 0003 */ 2241480Smckusick u_char dcm_pad2; 2341480Smckusick volatile u_char dcm_sem; /* Semaphore register 0005 */ 2442355Smckusick u_char dcm_pad3[0x7ffa]; /* Unaddressable 0006-7fff */ 2541480Smckusick u_char dcm_pad4; 2641480Smckusick volatile u_char dcm_iir; /* Interrupt ident register 8001 */ 2741480Smckusick u_char dcm_pad5; 2841480Smckusick volatile u_char dcm_cr; /* Command register 8003 */ 2942355Smckusick u_char dcm_pad6[0x3fc]; /* Card scratch 8004-83ff */ 3042355Smckusick struct dcmrfifo { 3142355Smckusick u_char ptr_pad1; 3242355Smckusick volatile u_char data_char; 3342355Smckusick u_char ptr_pad2; 3442355Smckusick volatile u_char data_stat; 3542355Smckusick } dcm_rfifos[4][0x80]; /* Receive queues 8400 */ 3641480Smckusick struct { 3742355Smckusick u_char ptr_pad1; 3842355Smckusick volatile u_char data_data; 3942355Smckusick } dcm_bmap[0x100]; /* Bitmap table 8c00 */ 4041480Smckusick struct { 4142355Smckusick u_char ptr_pad; 4242355Smckusick volatile u_char ptr; 4342355Smckusick } dcm_rhead[4]; /* Fifo head - receive 8e00 */ 4441480Smckusick struct { 4542355Smckusick u_char ptr_pad; 4642355Smckusick volatile u_char ptr; 4742355Smckusick } dcm_rtail[4]; /* Fifo tail - receive 8e08 */ 4841480Smckusick struct { 4942355Smckusick u_char ptr_pad; 5042355Smckusick volatile u_char ptr; 5142355Smckusick } dcm_thead[4]; /* Fifo head - transmit 8e10 */ 5241480Smckusick struct { 5342355Smckusick u_char ptr_pad; 5442355Smckusick volatile u_char ptr; 5542355Smckusick } dcm_ttail[4]; /* Fifo tail - transmit 8e18 */ 5641480Smckusick struct { 5742355Smckusick u_char pad1; 5842355Smckusick volatile u_char dcm_conf; 5942355Smckusick u_char pad2; 6042355Smckusick volatile u_char dcm_baud; 6142355Smckusick } dcm_data[4]; /* Configuration registers 8e20 */ 6241480Smckusick u_char dcm_pad7; 6341480Smckusick volatile u_char dcm_mdmin; /* Modem in 8e31 */ 6441480Smckusick u_char dcm_pad8; 6541480Smckusick volatile u_char dcm_mdmout; /* Modem out 8e33 */ 6641480Smckusick u_char dcm_pad9; 6741480Smckusick volatile u_char dcm_mdmmsk; /* Modem mask 8e35 */ 6841480Smckusick struct { 6941480Smckusick u_char pad1; 7041480Smckusick volatile u_char dcm_data; 7142355Smckusick } dcm_cmdtab[4]; /* Command tables 8e36 */ 7241480Smckusick struct { 7341480Smckusick u_char pad1; 7441480Smckusick volatile u_char dcm_data; 7542355Smckusick } dcm_icrtab[4]; /* Interrupt data 8e3e */ 7641480Smckusick u_char dcm_pad10; 7741480Smckusick volatile u_char dcm_stcon; /* Self test condition 8e47 */ 7842355Smckusick u_char dcm_pad11[0x98]; /* Undef SR regs 8e48-8edf */ 7942355Smckusick struct dcmtfifo { 8041480Smckusick u_char ptr_pad1; 8141480Smckusick volatile u_char data_char; 8242355Smckusick } dcm_tfifos[4][0x10]; /* Transmit queues 8ee0 */ 8341480Smckusick }; 8441480Smckusick 8542355Smckusick /* 8642355Smckusick * Overlay structure for port specific queue "registers". 8742355Smckusick * Starts at offset 0x8E00+(port*2). 8842355Smckusick */ 8942355Smckusick struct dcmpreg { 9042355Smckusick u_char pad0; /* +00 */ 9142355Smckusick volatile u_char r_head; /* +01 */ 9242355Smckusick u_char pad1[7]; /* +02 */ 9342355Smckusick volatile u_char r_tail; /* +09 */ 9442355Smckusick u_char pad2[7]; /* +0A */ 9542355Smckusick volatile u_char t_head; /* +11 */ 9642355Smckusick u_char pad3[7]; /* +12 */ 9742355Smckusick volatile u_char t_tail; /* +19 */ 9842355Smckusick }; 9942355Smckusick #define dcm_preg(d, p) ((struct dcmpreg *)((u_int)(d)+0x8e00+(p)*2)) 10042355Smckusick 10141480Smckusick /* interface reset/id */ 10241480Smckusick #define DCMCON 0x80 /* REMOTE/LOCAL switch, read */ 10341480Smckusick #define DCMID 0x5 /* hardwired card id, read */ 10441480Smckusick #define DCMRS 0x80 /* software reset, write */ 10541480Smckusick 10641480Smckusick /* interrupt control */ 10741480Smckusick #define DCMIPL(x) ((((x) >> 4) & 3) + 3) /* interupt level, read */ 10841480Smckusick #define IC_IR 0x40 /* interupt request, read */ 10941480Smckusick #define IC_IE 0x80 /* interupt enable, write */ 11041480Smckusick #define IC_ID 0x00 /* interupt disable, write */ 11141480Smckusick 11241480Smckusick 11341480Smckusick /* Semaphore control */ 11441480Smckusick #define SEM_BSY 0x80 /* read */ 11541480Smckusick #define SEM_CLR 0xFF /* write */ 11641480Smckusick #define SEM_LOCK(dcm) while ((dcm)->dcm_sem & SEM_BSY) 11741480Smckusick #define SEM_UNLOCK(dcm) (dcm)->dcm_sem = SEM_CLR 11841480Smckusick 11941480Smckusick /* command register */ 12041480Smckusick #define CR_PORT0 0x1 12141480Smckusick #define CR_PORT1 0x2 12241480Smckusick #define CR_PORT2 0x4 12341480Smckusick #define CR_PORT3 0x8 12441480Smckusick #define CR_MODM 0x10 /* change modem output lines */ 12541480Smckusick #define CR_TIMER 0x20 /* 16ms interrupt timer toggle */ 12641480Smckusick #define CR_SELFT 0x40 /* run self test */ 12741480Smckusick #define CR_MASK 0x7f 12841480Smckusick 12941480Smckusick /* interrupt ident register */ 13041480Smckusick #define IIR_PORT0 0x1 13141480Smckusick #define IIR_PORT1 0x2 13241480Smckusick #define IIR_PORT2 0x4 13341480Smckusick #define IIR_PORT3 0x8 13441480Smckusick #define IIR_SELFT 0x10 /* self test completed */ 13541480Smckusick #define IIR_MODM 0x20 /* change in modem input lines */ 13641480Smckusick #define IIR_TIMEO 0x40 /* Time out */ 13741480Smckusick #define IIR_MASK 0x7f 13841480Smckusick 13941480Smckusick /* self test cond reg */ 14041480Smckusick #define ST_OK 0xe0 14141480Smckusick 14241480Smckusick /* Line configuration register */ 14341480Smckusick #define LC_PNO 0x00 14441480Smckusick #define LC_PODD 0x01 14541480Smckusick #define LC_PEVEN 0x02 14641480Smckusick #define LC_PMSK 0x03 14741480Smckusick 14841480Smckusick #define LC_1STOP 0x00 14941480Smckusick #define LC_1HSTOP 0x04 15041480Smckusick #define LC_2STOP 0x08 15141480Smckusick #define LC_STOPMSK 0x0b 15241480Smckusick 15341480Smckusick #define LC_8BITS 0x30 15441480Smckusick #define LC_7BITS 0x20 15541480Smckusick #define LC_6BITS 0x10 15641480Smckusick #define LC_5BITS 0x00 15741480Smckusick #define LC_BITMSK 0x30 15841480Smckusick 15941480Smckusick /* baud reg */ 16041480Smckusick #define BR_0 0x00 16141480Smckusick #define BR_50 0x01 16241480Smckusick #define BR_75 0x02 16341480Smckusick #define BR_110 0x03 16441480Smckusick #define BR_134 0x04 16541480Smckusick #define BR_150 0x05 16641480Smckusick #define BR_300 0x06 16741480Smckusick #define BR_600 0x07 16841480Smckusick #define BR_900 0x08 16941480Smckusick #define BR_1200 0x09 17041480Smckusick #define BR_1800 0x0a 17141480Smckusick #define BR_2400 0x0b 17241480Smckusick #define BR_3600 0x0c 17341480Smckusick #define BR_4800 0x0d 17441480Smckusick #define BR_7200 0x0e 17541480Smckusick #define BR_9600 0x0f 17641480Smckusick #define BR_19200 0x10 17741480Smckusick #define BR_38400 0x11 17841480Smckusick 17941480Smckusick /* modem input register */ 18041480Smckusick #define MI_CTS 0x08 18141480Smckusick #define MI_DM 0x04 18241480Smckusick #define MI_CD 0x02 18341480Smckusick #define MI_RI 0x01 18441480Smckusick 18541480Smckusick /* modem output register */ 18641480Smckusick #define MO_SR 0x04 18741480Smckusick #define MO_DTR 0x02 18841480Smckusick #define MO_RTS 0x01 18941480Smckusick #define MO_ON ((MO_DTR) | (MO_RTS)) 19041480Smckusick #define MO_OFF 0x00 19141480Smckusick 19241480Smckusick /* cmd-tab values, write */ 19341480Smckusick #define CT_CON 0x1 /* configuration change */ 19441480Smckusick #define CT_TX 0x2 /* transmit buffer not empty */ 19541480Smckusick #define CT_BRK 0x4 /* toggle BREAK */ 19641480Smckusick 19741480Smckusick /* icr-tab values, read */ 19841480Smckusick #define IT_TX 0x1 /* transmit buffer empty */ 19941480Smckusick #define IT_SPEC 0x2 /* special character received */ 20041480Smckusick 20141480Smckusick /* data errors */ 20241480Smckusick #define RD_OVF 0x08 20341480Smckusick #define RD_BD 0x10 20441480Smckusick #define RD_PE 0x20 20541480Smckusick #define RD_OE 0x40 20641480Smckusick #define RD_FE 0x80 20741480Smckusick #define RD_MASK 0xf8 20841480Smckusick 20941480Smckusick /* Transmit/Receive masks */ 21041480Smckusick #define TX_MASK 0x0f 21141480Smckusick #define RX_MASK 0xff 21241480Smckusick 21341480Smckusick /* 214*43418Shibler * WARNING: Serial console is assumed to be the lowest select-code card 215*43418Shibler * and that card must be logical unit 0 in the kernel. Also, CONUNIT must 216*43418Shibler * be 1, the port affected by the REMOTE/LOCAL switch. 21741480Smckusick */ 21841480Smckusick #define CONUNIT (1) 219