141480Smckusick /* 241480Smckusick * Copyright (c) 1988 University of Utah. 341480Smckusick * Copyright (c) 1990 The Regents of the University of California. 441480Smckusick * All rights reserved. 541480Smckusick * 641480Smckusick * This code is derived from software contributed to Berkeley by 741480Smckusick * the Systems Programming Group of the University of Utah Computer 841480Smckusick * Science Department. 941480Smckusick * 1041480Smckusick * %sccs.include.redist.c% 1141480Smckusick * 12*53923Shibler * from: Utah $Hdr: hilreg.h 1.10 92/01/21$ 1341480Smckusick * 14*53923Shibler * @(#)hilreg.h 7.4 (Berkeley) 06/05/92 1541480Smckusick */ 1641480Smckusick 17*53923Shibler #ifdef KERNEL 18*53923Shibler #include "hp/dev/iotypes.h" /* XXX */ 19*53923Shibler #else 20*53923Shibler #include <hp/dev/iotypes.h> /* XXX */ 21*53923Shibler #endif 22*53923Shibler 23*53923Shibler #ifdef hp300 2441480Smckusick struct hil_dev { 2541480Smckusick char hil_pad0; 26*53923Shibler vu_char hil_data; 2741480Smckusick char hil_pad1; 28*53923Shibler vu_char hil_cmd; 2941480Smckusick }; 3041480Smckusick 3149311Shibler #define HILADDR ((struct hil_dev *)IIOV(0x428000)) 32*53923Shibler #define BBCADDR ((struct hil_dev *)IIOV(0x420000)) 33*53923Shibler #endif 3441480Smckusick 35*53923Shibler #ifdef hp800 36*53923Shibler #ifdef hp700 37*53923Shibler struct hil_dev { 38*53923Shibler vu_char hil_rsthold; /* (WO) reset hold (and Serial #3) */ 39*53923Shibler vu_char hil_resv1[2047]; 40*53923Shibler vu_char hil_data; /* send/receive data to/from 8042 */ 41*53923Shibler vu_char hil_cmd; /* status/control to/from 8042 */ 42*53923Shibler vu_char hil_resv2[1022]; 43*53923Shibler vu_char hil_rstrel; /* (WO) reset release (and Serial #3) */ 4441480Smckusick 45*53923Shibler }; 46*53923Shibler #else 47*53923Shibler struct hil_dev { 48*53923Shibler vu_int hil_data; 49*53923Shibler vu_int hil_pad; 50*53923Shibler vu_int hil_cmd; 51*53923Shibler }; 52*53923Shibler #endif 53*53923Shibler #endif 54*53923Shibler #define hil_stat hil_cmd 55*53923Shibler 56*53923Shibler #if defined(hp300) || defined(hp700) 57*53923Shibler #define READHILDATA(x) ((x)->hil_data) 58*53923Shibler #define READHILSTAT(x) ((x)->hil_stat) 59*53923Shibler #define READHILCMD(x) ((x)->hil_cmd) 60*53923Shibler #define WRITEHILDATA(x, y) ((x)->hil_data = (y)) 61*53923Shibler #define WRITEHILSTAT(x, y) ((x)->hil_stat = (y)) 62*53923Shibler #define WRITEHILCMD(x, y) ((x)->hil_cmd = (y)) 63*53923Shibler #else 64*53923Shibler #define READHILDATA(x) ((x)->hil_data >> 24) 65*53923Shibler #define READHILSTAT(x) ((x)->hil_stat >> 24) 66*53923Shibler #define READHILCMD(x) ((x)->hil_cmd >> 24) 67*53923Shibler #define WRITEHILDATA(x, y) ((x)->hil_data = ((y) << 24)) 68*53923Shibler #define WRITEHILSTAT(x, y) ((x)->hil_stat = ((y) << 24)) 69*53923Shibler #define WRITEHILCMD(x, y) ((x)->hil_cmd = ((y) << 24)) 70*53923Shibler #endif 71*53923Shibler 72*53923Shibler #ifdef hp300 73*53923Shibler #define splhil() spl1() 74*53923Shibler #else 75*53923Shibler extern int hilspl; 76*53923Shibler #define splhil() splx(hilspl) 77*53923Shibler #endif 78*53923Shibler 7941480Smckusick #define HIL_BUSY 0x02 80*53923Shibler #define HIL_DATA_RDY 0x01 8141480Smckusick 82*53923Shibler #define HILWAIT(hil_dev) while ((READHILSTAT(hil_dev) & HIL_BUSY)) 83*53923Shibler #define HILDATAWAIT(hil_dev) while (!(READHILSTAT(hil_dev) & HIL_DATA_RDY)) 8441480Smckusick 8541480Smckusick /* HIL status bits */ 8641480Smckusick #define HIL_POLLDATA 0x10 /* HIL poll data follows */ 87*53923Shibler #define HIL_COMMAND 0x08 /* Start of original command */ 88*53923Shibler #define HIL_ERROR 0x080 /* HIL error */ 89*53923Shibler #define HIL_RECONFIG 0x080 /* HIL has reconfigured */ 9041480Smckusick #define HIL_STATMASK (HIL_DATA | HIL_COMMAND) 9141480Smckusick 92*53923Shibler #define HIL_SSHIFT 4 /* Bits to shift status over */ 93*53923Shibler #define HIL_SMASK 0xF /* Service request status mask */ 94*53923Shibler #define HIL_DEVMASK 0x07 9541480Smckusick 9641480Smckusick /* HIL status types */ 9741480Smckusick #define HIL_STATUS 0x5 /* HIL status in data register */ 9841480Smckusick #define HIL_DATA 0x6 /* HIL data in data register */ 9941480Smckusick #define HIL_CTRLSHIFT 0x8 /* key + CTRL + SHIFT */ 10041480Smckusick #define HIL_CTRL 0x9 /* key + CTRL */ 10141480Smckusick #define HIL_SHIFT 0xA /* key + SHIFT */ 10241480Smckusick #define HIL_KEY 0xB /* key only */ 103*53923Shibler #define HIL_68K 0x4 /* Data from the 68k is ready */ 10441480Smckusick 10541480Smckusick /* HIL commands */ 10641480Smckusick #define HIL_SETARD 0xA0 /* set auto-repeat delay */ 10741480Smckusick #define HIL_SETARR 0xA2 /* set auto-repeat rate */ 10841480Smckusick #define HIL_SETTONE 0xA3 /* set tone generator */ 109*53923Shibler #define HIL_CNMT 0xB2 /* clear nmi */ 110*53923Shibler #define HIL_INTON 0x5C /* Turn on interrupts. */ 111*53923Shibler #define HIL_INTOFF 0x5D /* Turn off interrupts. */ 112*53923Shibler #define HIL_TRIGGER 0xC5 /* trigger command */ 113*53923Shibler #define HIL_STARTCMD 0xE0 /* start loop command */ 114*53923Shibler #define HIL_TIMEOUT 0xFE /* timeout */ 115*53923Shibler #define HIL_READTIME 0x13 /* Read real time register */ 11641480Smckusick 11741480Smckusick /* Read/write various registers on the 8042. */ 11841480Smckusick #define HIL_READBUSY 0x02 /* internal "busy" register */ 119*53923Shibler #define HIL_READKBDLANG 0x12 /* read keyboard language code */ 12041480Smckusick #define HIL_READKBDSADR 0xF9 12141480Smckusick #define HIL_WRITEKBDSADR 0xE9 122*53923Shibler #define HIL_READLPSTAT 0xFA 123*53923Shibler #define HIL_WRITELPSTAT 0xEA 124*53923Shibler #define HIL_READLPCTRL 0xFB 125*53923Shibler #define HIL_WRITELPCTRL 0xEB 12641480Smckusick 12741480Smckusick /* BUSY bits */ 128*53923Shibler #define BSY_LOOPBUSY 0x04 12941480Smckusick 13041480Smckusick /* LPCTRL bits */ 131*53923Shibler #define LPC_AUTOPOLL 0x01 /* enable auto-polling */ 132*53923Shibler #define LPC_NOERROR 0x02 /* don't report errors */ 133*53923Shibler #define LPC_NORECONF 0x04 /* don't report reconfigure */ 134*53923Shibler #define LPC_KBDCOOK 0x10 /* cook all keyboards */ 135*53923Shibler #define LPC_RECONF 0x80 /* reconfigure the loop */ 13641480Smckusick 13741480Smckusick /* LPSTAT bits */ 138*53923Shibler #define LPS_DEVMASK 0x07 /* number of loop devices */ 139*53923Shibler #define LPS_CONFGOOD 0x08 /* reconfiguration worked */ 140*53923Shibler #define LPS_CONFFAIL 0x80 /* reconfiguration failed */ 14141480Smckusick 14241480Smckusick /* HIL packet headers */ 143*53923Shibler #define HIL_MOUSEDATA 0x2 144*53923Shibler #define HIL_KBDDATA 0x40 14541480Smckusick 146*53923Shibler #define HIL_MOUSEMOTION 0x02 /* mouse movement event */ 147*53923Shibler #define HIL_KBDBUTTON 0x40 /* keyboard button event */ 148*53923Shibler #define HIL_MOUSEBUTTON 0x40 /* mouse button event */ 149*53923Shibler #define HIL_BUTTONBOX 0x60 /* button box event */ 150*53923Shibler #define HIL_TABLET 0x02 /* tablet motion event */ 151*53923Shibler #define HIL_KNOBBOX 0x03 /* knob box motion data */ 15241480Smckusick 153*53923Shibler /* For setting auto repeat on the keyboard */ 154*53923Shibler #define ar_format(x) ~((x - 10) / 10) 155*53923Shibler #define KBD_ARD 400 /* initial delay in msec (10 - 2560) */ 156*53923Shibler #define KBD_ARR 60 /* rate (10 - 2550 msec, 2551 == off) */ 157*53923Shibler 158*53923Shibler #ifdef hp300 15941480Smckusick /* Magic */ 160*53923Shibler #define KBDNMISTAT ((volatile char *)IIOV(0x478005)) 161*53923Shibler #define KBDNMI 0x04 162*53923Shibler #endif 163